init

Appli/Core/Inc/FreeRTOSConfig.h

@@ -0,0 +1,179 @@
+/* USER CODE BEGIN Header */
+/*
+ * FreeRTOS Kernel V10.5.1
+ * Portion Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * Portion Copyright (C) 2019 StMicroelectronics, Inc.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE .
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+/* USER CODE END Header */
+#ifndef __FREERTOS_CONFIG_H
+#define __FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * These parameters and more are described within the 'configuration' section of the
+ * FreeRTOS API documentation available on the FreeRTOS.org web site.
+ *
+ * See http://www.freertos.org/a00110.html
+ *----------------------------------------------------------*/
+
+/* USER CODE BEGIN Includes */
+/* Section where include file can be added */
+/* USER CODE END Includes */
+
+/* Ensure definitions are only used by the compiler, and not by the assembler. */
+#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
+#include <stdint.h>
+extern uint32_t SystemCoreClock;
+#endif
+#ifndef CMSIS_device_header
+#define CMSIS_device_header "stm32h7rsxx.h"
+#endif /* CMSIS_device_header */
+
+#define configENABLE_FPU                         0
+#define configENABLE_MPU                         0
+
+#define configUSE_PREEMPTION                     1
+#define configSUPPORT_STATIC_ALLOCATION          1
+#define configSUPPORT_DYNAMIC_ALLOCATION         1
+#define configUSE_IDLE_HOOK                      1
+#define configUSE_TICK_HOOK                      0
+#define configCPU_CLOCK_HZ                       ( SystemCoreClock )
+#define configTICK_RATE_HZ                       ((TickType_t)1000)
+#define configMAX_PRIORITIES                     ( 56 )
+#define configUSE_SB_COMPLETED_CALLBACK          ( 0 )
+#define configUSE_MINI_LIST_ITEM                ( 1 )
+#define configMINIMAL_STACK_SIZE                 ((uint16_t)128)
+#define configTOTAL_HEAP_SIZE                    ((size_t)50000)
+#define configMAX_TASK_NAME_LEN                  ( 16 )
+#define configHEAP_CLEAR_MEMORY_ON_FREE          0
+#define configUSE_TRACE_FACILITY                 1
+#define configUSE_16_BIT_TICKS                   0
+#define configUSE_MUTEXES                        1
+#define configQUEUE_REGISTRY_SIZE                8
+#define configUSE_RECURSIVE_MUTEXES              1
+#define configUSE_APPLICATION_TASK_TAG           1
+#define configUSE_COUNTING_SEMAPHORES            1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION  0
+/* USER CODE BEGIN MESSAGE_BUFFER_LENGTH_TYPE */
+/* Defaults to size_t for backward compatibility, but can be changed
+   if lengths will always be less than the number of bytes in a size_t. */
+#define configMESSAGE_BUFFER_LENGTH_TYPE         size_t
+/* USER CODE END MESSAGE_BUFFER_LENGTH_TYPE */
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                    0
+#define configMAX_CO_ROUTINE_PRIORITIES          ( 2 )
+
+/* Software timer definitions. */
+#define configUSE_TIMERS                         1
+#define configTIMER_TASK_PRIORITY                ( 2 )
+#define configTIMER_QUEUE_LENGTH                 10
+#define configTIMER_TASK_STACK_DEPTH             256
+
+/* The following flag must be enabled only when using newlib */
+#define configUSE_NEWLIB_REENTRANT          1
+
+/* CMSIS-RTOS V2 flags */
+#define configUSE_OS2_THREAD_SUSPEND_RESUME  1
+#define configUSE_OS2_THREAD_ENUMERATE       1
+#define configUSE_OS2_EVENTFLAGS_FROM_ISR    1
+#define configUSE_OS2_THREAD_FLAGS           1
+#define configUSE_OS2_TIMER                  1
+#define configUSE_OS2_MUTEX                  1
+#define configTEX_S_C_B_SRAM                 ( 0x03UL )
+#define configTOTAL_MPU_REGIONS                16
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet             1
+#define INCLUDE_uxTaskPriorityGet            1
+#define INCLUDE_vTaskDelete                  1
+#define INCLUDE_vTaskCleanUpResources        0
+#define INCLUDE_vTaskSuspend                 1
+#define INCLUDE_xTaskDelayUntil              1
+#define INCLUDE_vTaskDelay                   1
+#define INCLUDE_xTaskGetSchedulerState       1
+#define INCLUDE_xTimerPendFunctionCall       1
+#define INCLUDE_xQueueGetMutexHolder         1
+#define INCLUDE_uxTaskGetStackHighWaterMark  1
+#define INCLUDE_xTaskGetCurrentTaskHandle    1
+#define INCLUDE_eTaskGetState                1
+
+/*
+ * The CMSIS-RTOS V2 FreeRTOS wrapper is dependent on the heap implementation used
+ * by the application thus the correct define need to be enabled below
+ */
+#define USE_FreeRTOS_HEAP_4
+
+/* Cortex-M specific definitions. */
+#ifdef __NVIC_PRIO_BITS
+ /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+ #define configPRIO_BITS         __NVIC_PRIO_BITS
+#else
+ #define configPRIO_BITS         4
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority"
+function. */
+
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY   15
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* Normal assert() semantics without relying on the provision of an assert.h
+header file. */
+/* USER CODE BEGIN 1 */
+#define configASSERT( x ) if ((x) == 0) {taskDISABLE_INTERRUPTS(); for( ;; );}
+/* USER CODE END 1 */
+
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define vPortSVCHandler    SVC_Handler
+#define xPortPendSVHandler PendSV_Handler
+/* IMPORTANT: After 10.3.1 update, Systick_Handler comes from NVIC (if SYS timebase = systick), otherwise from cmsis_os2.c */
+
+#define USE_CUSTOM_SYSTICK_HANDLER_IMPLEMENTATION 0
+
+/* USER CODE BEGIN Defines */
+/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
+#define traceTASK_SWITCHED_OUT() xTaskCallApplicationTaskHook( pxCurrentTCB, (void*)1 )
+#define traceTASK_SWITCHED_IN() xTaskCallApplicationTaskHook( pxCurrentTCB, (void*)0 )
+/* USER CODE END Defines */
+
+#endif /* __FREERTOS_CONFIG_H */

Appli/Core/Inc/RTE_Components.h

@@ -0,0 +1,28 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file
+  * @author  MCD Application Team
+  * @version V2.0.0
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+  /* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef  __RTE_COMPONENTS_H__
+#define  __RTE_COMPONENTS_H__
+
+/* Defines ------------------------------------------------------------------*/
+/* STMicroelectronics.X-CUBE-TOUCHGFX.4.26.1 */
+#define TOUCHGFX_APP
+
+#endif /* __RTE_COMPONENTS_H__ */

Appli/Core/Inc/audio_analysis.h

@@ -0,0 +1,50 @@
+#ifndef AUDIO_ANALYSIS_H
+#define AUDIO_ANALYSIS_H
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* FFT calculee sur 2048 points : le spectre d'un signal reel est symetrique, donc
+ * seule la moitie (0 a Fe/2) est utile -> exactement 1024 points affichables,
+ * correspondant a la capacite du widget Graph cote IHM. */
+#define AUDIO_ANALYSIS_SAMPLE_RATE_HZ 48000U
+#define AUDIO_ANALYSIS_FFT_SIZE       2048U
+#define AUDIO_ANALYSIS_NUM_BINS       (AUDIO_ANALYSIS_FFT_SIZE / 2U)   /* 1024 : 0 a Fe/2 */
+
+/* A appeler une fois au demarrage, comme AudioEffects_Init(). */
+void AudioAnalysis_Init(void);
+
+/* A appeler depuis le chemin audio temps reel (ex: push_to_fifo), un echantillon
+ * a la fois. Ne fait rien (cout quasi nul) tant que l'analyse n'est pas activee. */
+void AudioAnalysis_PushSample(float sample);
+
+/* A appeler depuis la tache IHM (jamais depuis le contexte audio) : si un bloc de
+ * AUDIO_ANALYSIS_FFT_SIZE echantillons est pret, calcule son spectre (fenetrage +
+ * FFT + magnitude en dB). Retourne true si un nouveau spectre vient d'etre calcule. */
+bool AudioAnalysis_Update(void);
+
+/* Spectre courant, AUDIO_ANALYSIS_NUM_BINS valeurs en dB (echelle approximative,
+ * pour affichage uniquement), du bin 0 (continu) au bin NUM_BINS-1 (~Fe/2). Le
+ * pas entre deux bins vaut AUDIO_ANALYSIS_SAMPLE_RATE_HZ / AUDIO_ANALYSIS_FFT_SIZE
+ * (23.4375 Hz ici). Valide apres un AudioAnalysis_Update() ayant retourne true ;
+ * inchange sinon (dernier spectre calcule). */
+const float *AudioAnalysis_GetMagnitudesDb(void);
+
+/* Frequence (en Hz) du bin de plus forte magnitude dans le dernier spectre calcule
+ * (frequence dominante / pic). Valide dans les memes conditions que
+ * AudioAnalysis_GetMagnitudesDb(). */
+float AudioAnalysis_GetPeakFrequencyHz(void);
+
+/* Active/desactive la capture et le calcul (pilote par le toggle de l'ecran Oscillo). */
+void AudioAnalysis_SetEnabled(bool enabled);
+bool AudioAnalysis_IsEnabled(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AUDIO_ANALYSIS_H */

Appli/Core/Inc/audio_effects.h

@@ -0,0 +1,39 @@
+#ifndef AUDIO_EFFECTS_H
+#define AUDIO_EFFECTS_H
+
+#include <stdbool.h>
+#include "fx_octaver.h"
+#include "fx_equalizer.h"
+#include "fx_overdrive.h"
+#include "fx_saturation.h"
+#include "fx_echo.h"
+#include "fx_reverb.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Structure regroupant les parametres de tous les effets. Modifiable directement
+ * (ex: depuis l'IHM) via AudioEffects_GetParams(). L'ordre de traitement fixe est :
+ * octaveur -> egaliseur -> overdrive -> saturation -> echo -> reverberation. */
+typedef struct
+{
+    bool  audio_on_off;
+    float master_volume;   /* volume general en sortie de chaine, 0.0 a 1.0 */
+    FxOctaverParams octaver;
+    FxEqualizerParams equalizer;
+    FxOverdriveParams overdrive;
+    FxSaturationParams saturation;
+    FxEchoParams echo;
+    FxReverbParams reverb;
+} AudioEffectsParams;
+
+void AudioEffects_Init(void);
+float AudioEffects_Process(float input);
+AudioEffectsParams *AudioEffects_GetParams(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AUDIO_EFFECTS_H */

Appli/Core/Inc/audio_looper.h

@@ -0,0 +1,46 @@
+#ifndef AUDIO_LOOPER_H
+#define AUDIO_LOOPER_H
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Effet "repeatButton" de l'ecran Overview : tant que le bouton est maintenu, l'audio
+ * (apres la chaine d'effets) est enregistre ; au relachement, l'enregistrement est
+ * rejoue plus vite, ce qui rend aussi la voix/le son plus aigu (pas de correction de
+ * pitch independante : c'est un simple changement de vitesse de lecture, comme une
+ * bande accéléree). */
+#define AUDIO_LOOPER_SAMPLE_RATE_HZ 48000U
+#define AUDIO_LOOPER_MAX_SECONDS    5U
+#define AUDIO_LOOPER_MAX_SAMPLES    (AUDIO_LOOPER_SAMPLE_RATE_HZ * AUDIO_LOOPER_MAX_SECONDS)
+
+/* Ratio de vitesse de lecture (>1 = plus rapide et plus aigu). 2.0 = une octave au-dessus,
+ * duree divisee par deux. */
+#define AUDIO_LOOPER_PLAYBACK_RATIO 2.0f
+
+/* A appeler une fois au demarrage, comme AudioEffects_Init(). */
+void AudioLooper_Init(void);
+
+/* A appeler depuis la tache IHM sur front montant du bouton (appui). Demarre une
+ * nouvelle capture (ecrase la precedente). */
+void AudioLooper_StartRecording(void);
+
+/* A appeler depuis la tache IHM sur front descendant du bouton (relachement). Termine
+ * la capture et declenche la lecture acceleree de ce qui a ete enregistre. */
+void AudioLooper_StopRecordingAndPlay(void);
+
+/* A appeler depuis le chemin audio temps reel, un echantillon a la fois, juste apres
+ * la chaine d'effets (AudioEffects_Process). Hors enregistrement/lecture, retourne
+ * sample_in inchange. Pendant l'enregistrement, retourne sample_in inchange (l'ecoute
+ * live continue normalement pendant la capture). Pendant la lecture, retourne
+ * l'echantillon rejoue a la place de sample_in, jusqu'a la fin du buffer enregistre. */
+float AudioLooper_Process(float sample_in);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* AUDIO_LOOPER_H */

Appli/Core/Inc/fx_echo.h

@@ -0,0 +1,36 @@
+#ifndef FX_ECHO_H
+#define FX_ECHO_H
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define FX_ECHO_SAMPLE_RATE      48000U
+#define FX_ECHO_MAX_DELAY_MS     1000U
+#define FX_ECHO_BUFFER_SIZE      (FX_ECHO_SAMPLE_RATE * FX_ECHO_MAX_DELAY_MS / 1000U)
+
+typedef struct
+{
+    bool  enabled;
+    float delay_ms;   /* 0 a FX_ECHO_MAX_DELAY_MS */
+    float feedback;   /* 0.0 a <1.0 */
+    float mix;        /* 0.0 (sec) a 1.0 (100% repetitions) */
+} FxEchoParams;
+
+typedef struct
+{
+    int16_t  buffer[FX_ECHO_BUFFER_SIZE];
+    uint32_t write_idx;
+} FxEchoState;
+
+void  FxEcho_Init(FxEchoState *state, FxEchoParams *params);
+float FxEcho_Process(FxEchoState *state, const FxEchoParams *params, float input);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* FX_ECHO_H */

Appli/Core/Inc/fx_equalizer.h

@@ -0,0 +1,52 @@
+#ifndef FX_EQUALIZER_H
+#define FX_EQUALIZER_H
+
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define FX_EQ_NUM_BANDS 10U
+
+typedef struct
+{
+    float freq_hz;   /* frequence centrale de la bande */
+    float gain_db;   /* -24.0 a +24.0 dB */
+    float q;         /* facteur de qualite, typiquement 0.5 a 5.0 */
+} FxEqBand;
+
+typedef struct
+{
+    bool     enabled;
+    FxEqBand bands[FX_EQ_NUM_BANDS];
+} FxEqualizerParams;
+
+typedef struct
+{
+    /* coefficients biquad mis en cache, recalcules seulement si les parametres changent */
+    float b0, b1, b2, a1, a2;
+    /* dernieres valeurs de parametres utilisees pour calculer les coefficients ci-dessus */
+    float last_freq_hz;
+    float last_gain_db;
+    float last_q;
+} FxEqBandState;
+
+typedef struct
+{
+    FxEqBandState band_state[FX_EQ_NUM_BANDS];
+    /* etat du filtre (direct form 1), par bande */
+    float x1[FX_EQ_NUM_BANDS];
+    float x2[FX_EQ_NUM_BANDS];
+    float y1[FX_EQ_NUM_BANDS];
+    float y2[FX_EQ_NUM_BANDS];
+} FxEqualizerState;
+
+void  FxEqualizer_Init(FxEqualizerState *state, FxEqualizerParams *params);
+float FxEqualizer_Process(FxEqualizerState *state, const FxEqualizerParams *params, float input);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* FX_EQUALIZER_H */

Appli/Core/Inc/fx_octaver.h

@@ -0,0 +1,48 @@
+#ifndef FX_OCTAVER_H
+#define FX_OCTAVER_H
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define FX_OCTAVER_BUFFER_SIZE  4096U   /* buffer circulaire (puissance de 2) */
+#define FX_OCTAVER_GRAIN_SIZE   2048U   /* taille de grain, en echantillons (~43ms a 48kHz) :
+                                          * doit largement couvrir la periode des notes les plus
+                                          * graves jouees (ex. do2 ~65Hz, periode ~734 echantillons
+                                          * a 48kHz) pour limiter les artefacts de phase entre les
+                                          * deux grains en fondu croise. */
+#define FX_OCTAVER_NUM_VOICES   4U      /* -2oct, -1oct, +1oct, +2oct (la voie seche est geree a part) */
+
+typedef struct
+{
+    bool  enabled;
+    float level_down2;  /* niveau voix -2 octaves, 0.0 a 1.0 */
+    float level_down1;  /* niveau voix -1 octave,  0.0 a 1.0 */
+    float level_dry;    /* niveau voix originale,  0.0 a 1.0 */
+    float level_up1;    /* niveau voix +1 octave,  0.0 a 1.0 */
+    float level_up2;    /* niveau voix +2 octaves, 0.0 a 1.0 */
+} FxOctaverParams;
+
+typedef struct
+{
+    float delay[2];  /* decalage courant (en echantillons) des deux grains en fondu croise */
+} FxOctaverVoiceState;
+
+typedef struct
+{
+    float    buffer[FX_OCTAVER_BUFFER_SIZE];
+    uint32_t write_idx;
+    FxOctaverVoiceState voices[FX_OCTAVER_NUM_VOICES];
+} FxOctaverState;
+
+void  FxOctaver_Init(FxOctaverState *state, FxOctaverParams *params);
+float FxOctaver_Process(FxOctaverState *state, const FxOctaverParams *params, float input);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* FX_OCTAVER_H */

Appli/Core/Inc/fx_overdrive.h

@@ -0,0 +1,30 @@
+#ifndef FX_OVERDRIVE_H
+#define FX_OVERDRIVE_H
+
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct
+{
+    bool  enabled;
+    float drive;   /* 0.0 a 1.0 : quantite de distorsion */
+    float tone;    /* 0.0 (sombre) a 1.0 (brillant) : filtre passe-bas post-distorsion */
+    float level;   /* gain de compensation en sortie */
+} FxOverdriveParams;
+
+typedef struct
+{
+    float tone_lp_state;
+} FxOverdriveState;
+
+void  FxOverdrive_Init(FxOverdriveState *state, FxOverdriveParams *params);
+float FxOverdrive_Process(FxOverdriveState *state, const FxOverdriveParams *params, float input);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* FX_OVERDRIVE_H */

Appli/Core/Inc/fx_reverb.h

@@ -0,0 +1,50 @@
+#ifndef FX_REVERB_H
+#define FX_REVERB_H
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define FX_REVERB_NUM_COMBS    8U
+#define FX_REVERB_NUM_ALLPASS  4U
+
+typedef struct
+{
+    bool  enabled;
+    float room_size;  /* 0.0 a 1.0 */
+    float damping;    /* 0.0 (brillant) a 1.0 (etouffe) */
+    float mix;        /* 0.0 (sec) a 1.0 (100% reverbere) */
+} FxReverbParams;
+
+typedef struct
+{
+    float   *buffer;
+    uint32_t size;
+    uint32_t idx;
+    float    filter_store;
+} FxCombState;
+
+typedef struct
+{
+    float   *buffer;
+    uint32_t size;
+    uint32_t idx;
+} FxAllpassState;
+
+typedef struct
+{
+    FxCombState    combs[FX_REVERB_NUM_COMBS];
+    FxAllpassState allpass[FX_REVERB_NUM_ALLPASS];
+} FxReverbState;
+
+void  FxReverb_Init(FxReverbState *state, FxReverbParams *params);
+float FxReverb_Process(FxReverbState *state, const FxReverbParams *params, float input);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* FX_REVERB_H */

Appli/Core/Inc/fx_saturation.h

@@ -0,0 +1,30 @@
+#ifndef FX_SATURATION_H
+#define FX_SATURATION_H
+
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct
+{
+    bool  enabled;
+    float drive;   /* 0.0 (aucun effet) a 1.0 (saturation maximale) */
+    float level;   /* gain de compensation en sortie, typiquement 0.0 - 1.0 */
+} FxSaturationParams;
+
+typedef struct
+{
+    float dc_block_x1;
+    float dc_block_y1;
+} FxSaturationState;
+
+void  FxSaturation_Init(FxSaturationState *state, FxSaturationParams *params);
+float FxSaturation_Process(FxSaturationState *state, const FxSaturationParams *params, float input);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* FX_SATURATION_H */

Appli/Core/Inc/jpeg_utils_conf.h

@@ -0,0 +1,62 @@
+/**
+  ******************************************************************************
+  * @file    jpeg_utils_conf.h
+  * @author  MCD Application Team
+  * @brief   jpeg_utils configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+ /* Define to prevent recursive inclusion -------------------------------------*/
+
+#ifndef  __JPEG_UTILS_CONF_H__
+#define  __JPEG_UTILS_CONF_H__
+
+/* Includes ------------------------------------------------------------------*/
+
+#include "stm32h7rsxx_hal.h"
+#include "stm32h7rsxx_hal_jpeg.h"
+
+/* Private define ------------------------------------------------------------*/
+/** @addtogroup JPEG_Private_Defines
+  * @{
+  */
+/* RGB Color format definition for JPEG encoding/Decoding : Should not be modified*/
+#define JPEG_ARGB8888            0  /* ARGB8888 Color Format */
+#define JPEG_RGB888              1  /* RGB888 Color Format   */
+#define JPEG_RGB565              2  /* RGB565 Color Format   */
+
+/*
+ * Define USE_JPEG_DECODER
+ */
+
+#define USE_JPEG_DECODER 1 /* 1 or 0 ********* Value different from default value : 1 ********** */
+/*
+ * Define USE_JPEG_ENCODER
+ */
+
+#define USE_JPEG_ENCODER 0 /* 1 or 0 */
+
+/*
+ * Define JPEG_RGB_FORMAT
+ */
+#define JPEG_RGB_FORMAT JPEG_ARGB8888 /* JPEG_ARGB8888, JPEG_RGB888, JPEG_RGB565 ********* Value different from default value : 0 ********** */
+
+/*
+ * Define JPEG_SWAP_RB
+ */
+#define JPEG_SWAP_RB 0 /* 0 or 1 ********* Value different from default value : 0 ********** */
+
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+
+#endif /* __JPEG_UTILS_CONF_H__ */

Appli/Core/Inc/main.h

@@ -0,0 +1,90 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.h
+  * @brief          : Header for main.c file.
+  *                   This file contains the common defines of the application.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32h7rsxx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+#define FRAME_RATE_Pin GPIO_PIN_3
+#define FRAME_RATE_GPIO_Port GPIOF
+#define RENDER_TIME_Pin GPIO_PIN_2
+#define RENDER_TIME_GPIO_Port GPIOF
+#define ADF1_CK_Pin GPIO_PIN_2
+#define ADF1_CK_GPIO_Port GPIOE
+#define MCU_ACTIVE_Pin GPIO_PIN_4
+#define MCU_ACTIVE_GPIO_Port GPIOF
+#define VSYNC_FREQ_Pin GPIO_PIN_1
+#define VSYNC_FREQ_GPIO_Port GPIOF
+#define LCD_EN_Pin GPIO_PIN_15
+#define LCD_EN_GPIO_Port GPIOE
+#define ADF1_D_Pin GPIO_PIN_6
+#define ADF1_D_GPIO_Port GPIOD
+#define TP_IRQ_Pin GPIO_PIN_3
+#define TP_IRQ_GPIO_Port GPIOE
+#define TP_IRQ_EXTI_IRQn EXTI3_IRQn
+#define LCD_BL_CTRL_Pin GPIO_PIN_15
+#define LCD_BL_CTRL_GPIO_Port GPIOG
+#define MIC_DET_Pin GPIO_PIN_1
+#define MIC_DET_GPIO_Port GPIOH
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */

Appli/Core/Inc/stm32h7rsxx_hal_conf.h

@@ -0,0 +1,520 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32h7rsxx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration template file.
+  *          This file should be copied to the application folder and renamed
+  *          to stm32h7rsxx_hal_conf.h.
+  *
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2022 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32H7RSxx_HAL_CONF_H
+#define STM32H7RSxx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+#define HAL_MODULE_ENABLED
+/* #define HAL_ADC_MODULE_ENABLED   */
+/* #define HAL_CEC_MODULE_ENABLED   */
+/* #define HAL_CORDIC_MODULE_ENABLED   */
+#define HAL_CRC_MODULE_ENABLED
+/* #define HAL_CRYP_MODULE_ENABLED   */
+/* #define HAL_DCMIPP_MODULE_ENABLED   */
+#define HAL_DMA2D_MODULE_ENABLED
+/* #define HAL_DTS_MODULE_ENABLED   */
+/* #define HAL_ETH_MODULE_ENABLED   */
+/* #define HAL_FDCAN_MODULE_ENABLED   */
+/* #define HAL_GFXMMU_MODULE_ENABLED   */
+/* #define HAL_GFXTIM_MODULE_ENABLED   */
+#define HAL_GPU2D_MODULE_ENABLED
+/* #define HAL_HASH_MODULE_ENABLED   */
+/* #define HAL_HCD_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+#define HAL_I2S_MODULE_ENABLED
+/* #define HAL_I3C_MODULE_ENABLED   */
+#define HAL_ICACHE_MODULE_ENABLED
+/* #define HAL_IRDA_MODULE_ENABLED   */
+/* #define HAL_IWDG_MODULE_ENABLED   */
+#define HAL_JPEG_MODULE_ENABLED
+/*  #define HAL_LPTIM_MODULE_ENABLED  */
+#define HAL_LTDC_MODULE_ENABLED
+/* #define HAL_MCE_MODULE_ENABLED   */
+#define HAL_MDF_MODULE_ENABLED
+/* #define HAL_MMC_MODULE_ENABLED   */
+/* #define HAL_NAND_MODULE_ENABLED   */
+/* #define HAL_NOR_MODULE_ENABLED   */
+/* #define HAL_PCD_MODULE_ENABLED   */
+/* #define HAL_PKA_MODULE_ENABLED   */
+/* #define HAL_PSSI_MODULE_ENABLED   */
+/* #define HAL_RAMECC_MODULE_ENABLED   */
+/* #define HAL_RCC_MODULE_ENABLED   */
+/* #define HAL_RNG_MODULE_ENABLED   */
+/* #define HAL_RTC_MODULE_ENABLED   */
+/* #define HAL_SAI_MODULE_ENABLED  */
+/* #define HAL_SD_MODULE_ENABLED   */
+/* #define HAL_SDIO_MODULE_ENABLED   */
+/* #define HAL_SDRAM_MODULE_ENABLED   */
+/* #define HAL_SMARTCARD_MODULE_ENABLED   */
+/* #define HAL_SMBUS_MODULE_ENABLED   */
+/* #define HAL_SPDIFRX_MODULE_ENABLED   */
+/* #define HAL_SPI_MODULE_ENABLED   */
+/* #define HAL_SRAM_MODULE_ENABLED   */
+#define HAL_TIM_MODULE_ENABLED
+#define HAL_UART_MODULE_ENABLED
+/* #define HAL_USART_MODULE_ENABLED   */
+/* #define HAL_WWDG_MODULE_ENABLED   */
+/* #define HAL_XSPI_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+#define HSE_VALUE    24000000UL /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+#define HSE_STARTUP_TIMEOUT    100UL   /*!< Time out for HSE start up (in ms) */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+#define HSI_VALUE          64000000UL /*!< Value of the Internal oscillator in Hz */
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal Low-power oscillator (CSI) default value.
+  *        This value is the default CSI range value after Reset.
+  */
+#if !defined  (CSI_VALUE)
+#define CSI_VALUE          4000000UL  /*!< Value of the Internal oscillator in Hz */
+#endif /* CSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB OTG FS and RNG.
+ *        This internal oscillator is mainly dedicated to provide a high precision clock to
+ *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ *        which is subject to manufacturing process variations.
+  */
+  #if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE        48000000UL /*!< Value of the Internal High Speed oscillator for USB OTG FS/RNG in Hz.
+                                            The real value my vary depending on manufacturing process variations. */
+  #endif /* HSI48_VALUE */
+
+/**
+* @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+#define LSI_VALUE  32000UL              /*!< LSI Typical Value in Hz.
+                                            Value of the Internal Low Speed oscillator in Hz.
+                                              The real value may vary depending on the variations
+                                              in voltage and temperature.*/
+#endif /* LSI_VALUE */
+
+/**
+* @brief External Low Speed oscillator (LSE) value.
+*/
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE    32768UL /*!< Value of the External oscillator in Hz*/
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    5000UL   /*!< Time out for LSE start up (in ms) */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for digital audio interfaces: SPI/I2S, SAI and ADF
+  *        This value is used by the RCC HAL module to provide the digital audio interfaces
+  *        frequency. This clock source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE      48000UL /*!< Value of the external clock source in Hz */
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+#define  VDD_VALUE                    3300UL /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY            (4UL)/*!< tick interrupt priority (lowest by default) */
+#define  USE_RTOS                     0U
+
+/* ########################## Assert Selection ############################## */
+/**
+* @brief Uncomment the line below to expanse the "assert_param" macro in the
+*        HAL drivers code
+*/
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## Register callback feature configuration ############### */
+/**
+* @brief Set below the peripheral configuration  to "1U" to add the support
+*        of HAL callback registration/unregistration feature for the HAL
+*        driver(s). This allows user application to provide specific callback
+*        functions thanks to HAL_PPP_RegisterCallback() rather than overwriting
+*        the default weak callback functions (see each stm32h7rsxx_hal_ppp.h file
+*        for possible callback identifiers defined in HAL_PPP_CallbackIDTypeDef
+*        for each PPP peripheral).
+*/
+#define USE_HAL_ADC_REGISTER_CALLBACKS        1U
+#define USE_HAL_CEC_REGISTER_CALLBACKS        0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DCMIPP_REGISTER_CALLBACKS     0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_GFXMMU_REGISTER_CALLBACKS     0U
+#define USE_HAL_HASH_REGISTER_CALLBACKS       0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        1U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        1U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_JPEG_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_MDF_REGISTER_CALLBACKS        1U
+#define USE_HAL_MMC_REGISTER_CALLBACKS        0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_PKA_REGISTER_CALLBACKS        0U
+#define USE_HAL_PSSI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        1U
+#define USE_HAL_SD_REGISTER_CALLBACKS         0U
+#define USE_HAL_SDIO_REGISTER_CALLBACKS       0U
+#define USE_HAL_SDRAM_REGISTER_CALLBACKS      0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS    0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        1U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       1U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+#define USE_HAL_XSPI_REGISTER_CALLBACKS       1U
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+* Activated: CRC code is present inside driver
+* Deactivated: CRC code cleaned from driver
+*/
+
+#define USE_SPI_CRC                   1U
+
+/* ################## CRYP peripheral configuration ########################## */
+
+/**
+  * @brief  For code optimization purpose, uncomment and set to "1U" the USE_HAL_CRYP_ONLY or USE_HAL_SAES_ONLY,
+  *         to use only one peripheral. Both defines cannot be set to "1U" at the same time.
+  */
+
+/* #define USE_HAL_CRYP_ONLY       1U */
+/* #define USE_HAL_SAES_ONLY       0U */
+
+#define USE_HAL_CRYP_SUSPEND_RESUME   0U
+
+/* ################## HASH peripheral configuration ########################## */
+
+#define USE_HAL_HASH_SUSPEND_RESUME   0U
+
+/* ################## SDMMC peripheral configuration ######################### */
+
+#define USE_SD_TRANSCEIVER            0U
+
+/* ################## SDIO peripheral configuration ######################### */
+
+#define USE_SDIO_TRANSCEIVER          0U
+#define SDIO_MAX_IO_NUMBER            7U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_CEC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_cec.h"
+#endif /* HAL_CEC_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DCMIPP_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_dcmipp.h"
+#endif /* HAL_DCMIPP_MODULE_ENABLED */
+
+#ifdef HAL_DMA2D_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_dma2d.h"
+#endif /* HAL_DMA2D_MODULE_ENABLED */
+
+#ifdef HAL_DTS_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_dts.h"
+#endif /* HAL_DTS_MODULE_ENABLED */
+
+#ifdef HAL_ETH_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_eth.h"
+#endif /* HAL_ETH_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_GFXMMU_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_gfxmmu.h"
+#endif /* HAL_GFXMMU_MODULE_ENABLED */
+
+#ifdef HAL_GFXTIM_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_gfxtim.h"
+#endif /* HAL_GFXTIM_MODULE_ENABLED */
+
+#ifdef HAL_GPU2D_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_gpu2d.h"
+#endif /* HAL_GPU2D_MODULE_ENABLED */
+
+#ifdef HAL_HASH_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_hash.h"
+#endif /* HAL_HASH_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32h7rsxx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_I3C_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_i3c.h"
+#endif /* HAL_I3C_MODULE_ENABLED */
+
+#ifdef HAL_ICACHE_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_icache.h"
+#endif /* HAL_ICACHE_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_JPEG_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_jpeg.h"
+#endif /* HAL_JPEG_MODULE_ENABLED */
+
+#ifdef HAL_LTDC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_ltdc.h"
+#endif /* HAL_LTDC_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_MCE_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_mce.h"
+#endif /* HAL_MCE_MODULE_ENABLED */
+
+#ifdef HAL_MDF_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_mdf.h"
+#endif /* HAL_MDF_MODULE_ENABLED */
+
+#ifdef HAL_MMC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PKA_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_pka.h"
+#endif /* HAL_PKA_MODULE_ENABLED */
+
+#ifdef HAL_PSSI_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_pssi.h"
+#endif /* HAL_PSSI_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_RAMECC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_ramecc.h"
+#endif /* HAL_RAMECC_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_SDIO_MODULE_ENABLED
+#include "stm32h7rsxx_hal_sdio.h"
+#endif /* HAL_SDIO_MODULE_ENABLED */
+
+#ifdef HAL_SDRAM_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_sdram.h"
+#endif /* HAL_SDRAM_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPDIFRX_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_spdifrx.h"
+#endif /* HAL_SPDIFRX_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_XSPI_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_xspi.h"
+#endif /* HAL_XSPI_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+  void assert_failed(uint8_t *file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32H7RSxx_HAL_CONF_H */
+

Appli/Core/Inc/stm32h7rsxx_it.h

@@ -0,0 +1,75 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32h7rsxx_it.h
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+ ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32H7RSxx_IT_H
+#define __STM32H7RSxx_IT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void DebugMon_Handler(void);
+void EXTI3_IRQHandler(void);
+void GPDMA1_Channel0_IRQHandler(void);
+void GPDMA1_Channel2_IRQHandler(void);
+void TIM6_IRQHandler(void);
+void HPDMA1_Channel0_IRQHandler(void);
+void HPDMA1_Channel1_IRQHandler(void);
+void LTDC_IRQHandler(void);
+void DMA2D_IRQHandler(void);
+void JPEG_IRQHandler(void);
+void ADF1_FLT0_IRQHandler(void);
+void GPU2D_IRQHandler(void);
+void GPU2D_ER_IRQHandler(void);
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32H7RSxx_IT_H */

Appli/Core/Inc/stm32h7s78_discovery_conf.h

@@ -0,0 +1,65 @@
+/**
+  ******************************************************************************
+  * @file    stm32h7s78_discovery_conf.h
+  * @author  MCD Application Team
+  * @brief   STM32H7S78-DK board configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2022 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32H7S78_DISCOVERY_CONF_H
+#define STM32H7S78_DISCOVERY_CONF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32h7rsxx_hal.h"
+
+/* COM defines */
+#define USE_COM_LOG                         0U
+#define USE_BSP_COM_FEATURE                 1U
+
+/* Touch Sensing controller defines */
+#define USE_FT5336_TS_CTRL                  1U
+/* TS supported features defines */
+#define USE_TS_GESTURE                      1U
+#define USE_TS_MULTI_TOUCH                  1U
+/* Default TS touch number */
+#define TS_TOUCH_NBR                        2U
+
+/* LCD defines */
+#define LCD_LAYER_0_ADDRESS                 0x90000000U
+#define LCD_LAYER_1_ADDRESS                 0x90200000U
+
+/* Default Audio IN internal buffer size */
+#define DEFAULT_AUDIO_IN_BUFFER_SIZE        2048U
+
+/* IRQ priorities (Default is 15 as lowest priority level) */
+#define BSP_SDRAM_IT_PRIORITY               15U
+#define BSP_BUTTON_USER_IT_PRIORITY         15U
+#define BSP_AUDIO_OUT_IT_PRIORITY           2U   // testé à 1 (au-dessus du micro) sur plusieurs redémarrages : aucun effet -> la contention NVIC n'est pas en cause
+#define BSP_AUDIO_IN_IT_PRIORITY            2U
+#define BSP_SD_IT_PRIORITY                  14U
+#define BSP_SD_RX_IT_PRIORITY               14U
+#define BSP_SD_TX_IT_PRIORITY               15U
+#define BSP_TS_IT_PRIORITY                  15U
+#define BSP_XSPI_RAM_IT_PRIORITY            15U
+#define BSP_XSPI_RAM_DMA_IT_PRIORITY        15U
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32H7S78_DISCOVERY_CONF_H */

Appli/Core/Src/audio_analysis.c

@@ -0,0 +1,155 @@
+#include "audio_analysis.h"
+#include "arm_math.h"
+#include <math.h>
+#include <string.h>
+
+#define FFT_SIZE AUDIO_ANALYSIS_FFT_SIZE
+#define NUM_BINS AUDIO_ANALYSIS_NUM_BINS
+
+/* --- Capture en double buffer (ping-pong), ecrite depuis le chemin audio temps
+ * reel, lue depuis la tache IHM. Un seul ecrivain, un seul lecteur : pas de verrou
+ * necessaire, meme principe que la FIFO audio principale. --- */
+static float    g_capture_buf[2][FFT_SIZE];
+static uint32_t g_capture_fill_idx = 0;
+static uint8_t  g_capture_write_buf = 0;
+static volatile uint8_t g_capture_ready_buf = 0xFFU; /* 0xFF = aucun buffer complet en attente */
+
+static bool g_analysis_enabled = false;
+
+/* --- Fenetre precalculee (a l'init uniquement, jamais recalculee en boucle) --- */
+static float g_hann_window[FFT_SIZE];
+
+/* --- FFT reelle CMSIS-DSP : instance initialisee une fois, buffers de travail --- */
+static arm_rfft_fast_instance_f32 g_rfft_instance;
+static float g_fft_work[FFT_SIZE];   /* echantillons fenetres ; ecrase (scratch) par arm_rfft_fast_f32 */
+static float g_fft_out[FFT_SIZE];    /* spectre complexe empaquete, format CMSIS (voir plus bas) */
+
+static float g_magnitudes_db[NUM_BINS]; /* seule la moitie 0..Fe/2 est conservee */
+static float g_peak_freq_hz = 0.0f;
+
+static void AudioAnalysis_BuildTables(void)
+{
+    for (uint32_t i = 0; i < FFT_SIZE; i++)
+    {
+        /* Fenetre de Hann : reduit les fuites spectrales dues a la troncature du bloc. */
+        g_hann_window[i] = 0.5f - 0.5f * cosf(2.0f * (float)M_PI * (float)i / (float)(FFT_SIZE - 1U));
+    }
+}
+
+void AudioAnalysis_Init(void)
+{
+    memset(g_capture_buf, 0, sizeof(g_capture_buf));
+    g_capture_fill_idx = 0;
+    g_capture_write_buf = 0;
+    g_capture_ready_buf = 0xFFU;
+    g_analysis_enabled = false;
+
+    memset(g_magnitudes_db, 0, sizeof(g_magnitudes_db));
+
+    AudioAnalysis_BuildTables();
+    arm_rfft_fast_init_f32(&g_rfft_instance, FFT_SIZE);
+}
+
+void AudioAnalysis_PushSample(float sample)
+{
+    if (!g_analysis_enabled)
+    {
+        return;
+    }
+
+    g_capture_buf[g_capture_write_buf][g_capture_fill_idx] = sample;
+    g_capture_fill_idx++;
+
+    if (g_capture_fill_idx >= FFT_SIZE)
+    {
+        g_capture_fill_idx = 0;
+        g_capture_ready_buf = g_capture_write_buf;
+        g_capture_write_buf = 1U - g_capture_write_buf;
+    }
+}
+
+bool AudioAnalysis_Update(void)
+{
+    if (!g_analysis_enabled)
+    {
+        return false;
+    }
+
+    uint8_t ready = g_capture_ready_buf;
+    if (ready == 0xFFU)
+    {
+        return false;
+    }
+    g_capture_ready_buf = 0xFFU;
+
+    for (uint32_t i = 0; i < FFT_SIZE; i++)
+    {
+        g_fft_work[i] = g_capture_buf[ready][i] * g_hann_window[i];
+    }
+
+    /* arm_rfft_fast_f32 (forward, ifftFlag=0) empaquete le spectre d'un signal reel
+     * en NUM_BINS paires {re,im}, sauf la premiere qui contient les deux seules
+     * valeurs reelles (DC et Nyquist) : g_fft_out[0]=X[0] (DC), g_fft_out[1]=X[N/2]
+     * (Nyquist, non utilise ici). Pour k=1..NUM_BINS-1 : re=g_fft_out[2k], im=g_fft_out[2k+1]. */
+    arm_rfft_fast_f32(&g_rfft_instance, g_fft_work, g_fft_out, 0);
+
+    /* Magnitude normalisee (une sinusoide plein-echelle donne ~0dB) puis convertie
+     * en dB, avec un plancher pour eviter log(0). Destine a un affichage visuel,
+     * pas a une mesure calibree. Seule la moitie 0..Fe/2 du spectre est conservee :
+     * le spectre d'un signal reel est symetrique, la seconde moitie n'apporte rien. */
+    /* Recherche du pic en meme temps que le calcul des magnitudes. Le bin 0 (continu,
+     * 0Hz) est ignore : une composante DC ne doit pas etre rapportee comme "frequence
+     * dominante". */
+    uint32_t peak_bin = 1U;
+    float peak_mag = 0.0f;
+
+    for (uint32_t i = 0; i < NUM_BINS; i++)
+    {
+        float re = (i == 0U) ? g_fft_out[0] : g_fft_out[2U * i];
+        float im = (i == 0U) ? 0.0f : g_fft_out[2U * i + 1U];
+        float mag = sqrtf(re * re + im * im) / ((float)FFT_SIZE / 4.0f);
+
+        if (i >= 1U && mag > peak_mag)
+        {
+            peak_mag = mag;
+            peak_bin = i;
+        }
+
+        if (mag < 1.0e-6f)
+        {
+            mag = 1.0e-6f;
+        }
+        g_magnitudes_db[i] = 20.0f * log10f(mag);
+    }
+
+    g_peak_freq_hz = (float)peak_bin * (float)AUDIO_ANALYSIS_SAMPLE_RATE_HZ / (float)FFT_SIZE;
+
+    return true;
+}
+
+const float *AudioAnalysis_GetMagnitudesDb(void)
+{
+    return g_magnitudes_db;
+}
+
+float AudioAnalysis_GetPeakFrequencyHz(void)
+{
+    return g_peak_freq_hz;
+}
+
+void AudioAnalysis_SetEnabled(bool enabled)
+{
+    if (enabled && !g_analysis_enabled)
+    {
+        /* Redemarre une capture propre a chaque activation. */
+        g_capture_fill_idx = 0;
+        g_capture_write_buf = 0;
+        g_capture_ready_buf = 0xFFU;
+    }
+    g_analysis_enabled = enabled;
+}
+
+bool AudioAnalysis_IsEnabled(void)
+{
+    return g_analysis_enabled;
+}

Appli/Core/Src/audio_effects.c

@@ -0,0 +1,47 @@
+#include "audio_effects.h"
+
+static AudioEffectsParams g_params;
+
+static FxOctaverState    g_octaverState;
+static FxEqualizerState  g_eqState;
+static FxOverdriveState  g_overdriveState;
+static FxSaturationState g_saturationState;
+static FxEchoState       g_echoState;
+static FxReverbState     g_reverbState;
+
+void AudioEffects_Init(void)
+{
+    g_params.audio_on_off = false;
+    g_params.master_volume = 0.0f;
+    FxOctaver_Init(&g_octaverState, &g_params.octaver);
+    FxEqualizer_Init(&g_eqState, &g_params.equalizer);
+    FxOverdrive_Init(&g_overdriveState, &g_params.overdrive);
+    FxSaturation_Init(&g_saturationState, &g_params.saturation);
+    FxEcho_Init(&g_echoState, &g_params.echo);
+    FxReverb_Init(&g_reverbState, &g_params.reverb);
+}
+
+float AudioEffects_Process(float input)
+{
+    float sample = input;
+    sample = FxOctaver_Process(&g_octaverState, &g_params.octaver, sample);
+    sample = FxEqualizer_Process(&g_eqState, &g_params.equalizer, sample);
+    sample = FxOverdrive_Process(&g_overdriveState, &g_params.overdrive, sample);
+    sample = FxSaturation_Process(&g_saturationState, &g_params.saturation, sample);
+    sample = FxEcho_Process(&g_echoState, &g_params.echo, sample);
+    sample = FxReverb_Process(&g_reverbState, &g_params.reverb, sample);
+
+    /* Coupure de sortie : les effets continuent de tourner (pas de discontinuite
+     * d'etat au reactivation), seule la sortie audible est reduite au silence. */
+    if (!g_params.audio_on_off)
+    {
+        return 0.0f;
+    }
+
+    return sample * g_params.master_volume;
+}
+
+AudioEffectsParams *AudioEffects_GetParams(void)
+{
+    return &g_params;
+}

Appli/Core/Src/audio_looper.c

@@ -0,0 +1,89 @@
+#include "audio_looper.h"
+
+/* 5s a 48kHz en float = 937.5 Ko : ne rentre pas en RAM interne, place en EXTRAM (meme
+ * section/region que le framebuffer TouchGFX, cf. AudioLooperBuffer dans le script de
+ * link). Accede uniquement par ce coeur (pas de DMA dessus) : pas de probleme de
+ * coherence de cache a gerer explicitement. */
+__attribute__((section("AudioLooperBuffer")))
+static float g_buffer[AUDIO_LOOPER_MAX_SAMPLES];
+
+typedef enum
+{
+    LOOPER_IDLE = 0,
+    LOOPER_RECORDING,
+    LOOPER_PLAYBACK
+} LooperState;
+
+/* g_state est ecrit depuis la tache IHM (Start/Stop) et lu/ecrit depuis le contexte
+ * audio temps reel (Process) : meme principe "un seul ecrivain a la fois par variable,
+ * volatile pour le flag d'etat partage" que le reste du projet (cf. audio_analysis.c). */
+static volatile LooperState g_state = LOOPER_IDLE;
+static uint32_t g_record_len = 0;  /* nb d'echantillons valides captures, fige au relachement */
+static uint32_t g_write_idx = 0;   /* ecrit uniquement depuis Process() en RECORDING */
+static float    g_read_pos = 0.0f; /* lu/ecrit uniquement depuis Process() en PLAYBACK */
+
+void AudioLooper_Init(void)
+{
+    g_state = LOOPER_IDLE;
+    g_record_len = 0;
+    g_write_idx = 0;
+    g_read_pos = 0.0f;
+}
+
+void AudioLooper_StartRecording(void)
+{
+    g_write_idx = 0;
+    g_state = LOOPER_RECORDING;
+}
+
+void AudioLooper_StopRecordingAndPlay(void)
+{
+    if (g_state != LOOPER_RECORDING)
+    {
+        return;
+    }
+
+    g_record_len = g_write_idx;
+    g_read_pos = 0.0f;
+    g_state = (g_record_len > 0U) ? LOOPER_PLAYBACK : LOOPER_IDLE;
+}
+
+float AudioLooper_Process(float sample_in)
+{
+    switch (g_state)
+    {
+    case LOOPER_RECORDING:
+        if (g_write_idx < AUDIO_LOOPER_MAX_SAMPLES)
+        {
+            g_buffer[g_write_idx++] = sample_in;
+        }
+        /* Buffer plein (5s atteintes) : on cesse de capturer mais on reste en
+         * enregistrement, l'ecoute live continue jusqu'au relachement du bouton. */
+        return sample_in;
+
+    case LOOPER_PLAYBACK:
+    {
+        uint32_t idx0 = (uint32_t)g_read_pos;
+        if (idx0 >= g_record_len - 1U)
+        {
+            g_state = LOOPER_IDLE;
+            return sample_in;
+        }
+
+        /* Interpolation lineaire entre les deux echantillons encadrant la position de
+         * lecture fractionnaire : necessaire car AUDIO_LOOPER_PLAYBACK_RATIO avance le
+         * pointeur de lecture plus vite qu'un pas entier. */
+        float frac = g_read_pos - (float)idx0;
+        float s0 = g_buffer[idx0];
+        float s1 = g_buffer[idx0 + 1U];
+        float out = s0 + (s1 - s0) * frac;
+
+        g_read_pos += AUDIO_LOOPER_PLAYBACK_RATIO;
+        return out;
+    }
+
+    case LOOPER_IDLE:
+    default:
+        return sample_in;
+    }
+}

Appli/Core/Src/freertos.c

@@ -0,0 +1,79 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * File Name          : freertos.c
+  * Description        : Code for freertos applications
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "FreeRTOS.h"
+#include "task.h"
+#include "main.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN PTD */
+
+/* USER CODE END PTD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN Variables */
+
+/* USER CODE END Variables */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN FunctionPrototypes */
+extern portBASE_TYPE IdleTaskHook(void* p);
+/* USER CODE END FunctionPrototypes */
+
+/* Hook prototypes */
+void vApplicationIdleHook(void);
+
+/* USER CODE BEGIN 2 */
+void vApplicationIdleHook( void )
+{
+   /* vApplicationIdleHook() will only be called if configUSE_IDLE_HOOK is set
+   to 1 in FreeRTOSConfig.h. It will be called on each iteration of the idle
+   task. It is essential that code added to this hook function never attempts
+   to block in any way (for example, call xQueueReceive() with a block time
+   specified, or call vTaskDelay()). If the application makes use of the
+   vTaskDelete() API function (as this demo application does) then it is also
+   important that vApplicationIdleHook() is permitted to return to its calling
+   function, because it is the responsibility of the idle task to clean up
+   memory allocated by the kernel to any task that has since been deleted. */
+  
+   vTaskSetApplicationTaskTag(NULL, IdleTaskHook);
+}
+/* USER CODE END 2 */
+
+/* Private application code --------------------------------------------------*/
+/* USER CODE BEGIN Application */
+
+/* USER CODE END Application */
+

Appli/Core/Src/fx_echo.c

@@ -0,0 +1,38 @@
+#include "fx_echo.h"
+#include <string.h>
+
+void FxEcho_Init(FxEchoState *state, FxEchoParams *params)
+{
+    memset(state->buffer, 0, sizeof(state->buffer));
+    state->write_idx = 0;
+
+    params->enabled  = false;
+    params->delay_ms = 300.0f;
+    params->feedback = 0.35f;
+    params->mix      = 0.3f;
+}
+
+float FxEcho_Process(FxEchoState *state, const FxEchoParams *params, float input)
+{
+    if (!params->enabled)
+    {
+        return input;
+    }
+
+    uint32_t delay_samples = (uint32_t)(params->delay_ms * (FX_ECHO_SAMPLE_RATE / 1000.0f));
+    if (delay_samples >= FX_ECHO_BUFFER_SIZE)
+    {
+        delay_samples = FX_ECHO_BUFFER_SIZE - 1U;
+    }
+
+    uint32_t read_idx = (state->write_idx + FX_ECHO_BUFFER_SIZE - delay_samples) % FX_ECHO_BUFFER_SIZE;
+    float delayed = (float)state->buffer[read_idx] / 32768.0f;
+
+    float to_store = input + delayed * params->feedback;
+    if (to_store > 1.0f) to_store = 1.0f;
+    if (to_store < -1.0f) to_store = -1.0f;
+    state->buffer[state->write_idx] = (int16_t)(to_store * 32767.0f);
+    state->write_idx = (state->write_idx + 1U) % FX_ECHO_BUFFER_SIZE;
+
+    return input * (1.0f - params->mix) + delayed * params->mix;
+}

Appli/Core/Src/fx_equalizer.c

@@ -0,0 +1,82 @@
+#include "fx_equalizer.h"
+#include <math.h>
+#include <stdint.h>
+
+#define FX_EQ_SAMPLE_RATE 48000.0f
+
+static const float fx_eq_default_freqs[FX_EQ_NUM_BANDS] =
+{
+    31.0f, 62.0f, 125.0f, 250.0f, 500.0f, 1000.0f, 2000.0f, 4000.0f, 8000.0f, 16000.0f
+};
+
+void FxEqualizer_Init(FxEqualizerState *state, FxEqualizerParams *params)
+{
+    params->enabled = true;
+    for (uint32_t i = 0; i < FX_EQ_NUM_BANDS; i++)
+    {
+        params->bands[i].freq_hz = fx_eq_default_freqs[i];
+        params->bands[i].gain_db = 0.0f;
+        params->bands[i].q       = 1.0f;
+
+        state->band_state[i].last_freq_hz = -1.0f; /* force le calcul des coefficients au 1er sample */
+        state->band_state[i].last_gain_db = 0.0f;
+        state->band_state[i].last_q       = 0.0f;
+        state->x1[i] = state->x2[i] = state->y1[i] = state->y2[i] = 0.0f;
+    }
+
+    // Pour couper les basses par defaukt et éviter les larsens : 
+    params->bands[0].gain_db = -15.0f;
+    params->bands[1].gain_db = -10.0f;
+    params->bands[2].gain_db = -2.5f;
+}
+
+/* Filtre "peaking EQ" (cloche), formule de l'Audio EQ Cookbook (Robert Bristow-Johnson). */
+static void FxEq_ComputeBandCoeffs(FxEqBandState *bs, const FxEqBand *band)
+{
+    float A     = powf(10.0f, band->gain_db / 40.0f);
+    float w0    = 2.0f * (float)M_PI * band->freq_hz / FX_EQ_SAMPLE_RATE;
+    float alpha = sinf(w0) / (2.0f * band->q);
+    float cosw0 = cosf(w0);
+
+    float a0 = 1.0f + alpha / A;
+    bs->b0 = (1.0f + alpha * A) / a0;
+    bs->b1 = (-2.0f * cosw0) / a0;
+    bs->b2 = (1.0f - alpha * A) / a0;
+    bs->a1 = (-2.0f * cosw0) / a0;
+    bs->a2 = (1.0f - alpha / A) / a0;
+
+    bs->last_freq_hz = band->freq_hz;
+    bs->last_gain_db = band->gain_db;
+    bs->last_q       = band->q;
+}
+
+float FxEqualizer_Process(FxEqualizerState *state, const FxEqualizerParams *params, float input)
+{
+    if (!params->enabled)
+    {
+        return input;
+    }
+
+    float y = input;
+    for (uint32_t i = 0; i < FX_EQ_NUM_BANDS; i++)
+    {
+        const FxEqBand *band = &params->bands[i];
+        FxEqBandState  *bs   = &state->band_state[i];
+
+        if (band->freq_hz != bs->last_freq_hz || band->gain_db != bs->last_gain_db || band->q != bs->last_q)
+        {
+            FxEq_ComputeBandCoeffs(bs, band);
+        }
+
+        float x = y;
+        y = bs->b0 * x + bs->b1 * state->x1[i] + bs->b2 * state->x2[i]
+                        - bs->a1 * state->y1[i] - bs->a2 * state->y2[i];
+
+        state->x2[i] = state->x1[i];
+        state->x1[i] = x;
+        state->y2[i] = state->y1[i];
+        state->y1[i] = y;
+    }
+
+    return y;
+}

Appli/Core/Src/fx_octaver.c

@@ -0,0 +1,147 @@
+#include "fx_octaver.h"
+#include <math.h>
+
+#define FX_OCTAVER_BUFFER_MASK    (FX_OCTAVER_BUFFER_SIZE - 1U)
+#define FX_OCTAVER_ENV_TABLE_SIZE 256U
+
+/* Rapport de vitesse de lecture pour chaque voix : lire le buffer plus vite que
+ * l'ecriture multiplie la frequence (octave au-dessus), plus lentement la divise
+ * (octave en-dessous). */
+static const float fx_octaver_ratios[FX_OCTAVER_NUM_VOICES] =
+{
+    0.25f, /* -2 octaves */
+    0.5f,  /* -1 octave  */
+    2.0f,  /* +1 octave  */
+    4.0f   /* +2 octaves */
+};
+
+/* Fenetre de Hann tabulee (evite un cosf() par grain et par echantillon). */
+static float fx_octaver_env_table[FX_OCTAVER_ENV_TABLE_SIZE + 1U];
+static bool  fx_octaver_env_table_ready = false;
+
+static void FxOctaver_BuildEnvTable(void)
+{
+    if (fx_octaver_env_table_ready)
+    {
+        return;
+    }
+    for (uint32_t i = 0; i <= FX_OCTAVER_ENV_TABLE_SIZE; i++)
+    {
+        float phase = (float)i / (float)FX_OCTAVER_ENV_TABLE_SIZE;
+        fx_octaver_env_table[i] = 0.5f - 0.5f * cosf(2.0f * (float)M_PI * phase);
+    }
+    fx_octaver_env_table_ready = true;
+}
+
+static inline float FxOctaver_EnvLookup(float phase)
+{
+    float pos = phase * (float)FX_OCTAVER_ENV_TABLE_SIZE;
+    uint32_t i0 = (uint32_t)pos;
+    if (i0 >= FX_OCTAVER_ENV_TABLE_SIZE)
+    {
+        i0 = FX_OCTAVER_ENV_TABLE_SIZE - 1U;
+    }
+    float frac = pos - (float)i0;
+    return fx_octaver_env_table[i0] * (1.0f - frac) + fx_octaver_env_table[i0 + 1U] * frac;
+}
+
+static inline float FxOctaver_ReadInterpolated(const float *buffer, uint32_t write_idx, float delay)
+{
+    /* write_idx grandit sans jamais etre replie (compteur perpetuel) ; le convertir
+     * directement en float finirait par perdre en precision (un float ne represente
+     * exactement les entiers que jusqu'a ~16.7 millions, soit quelques minutes a
+     * 48kHz). On calcule donc la position de lecture uniquement a partir de l'index
+     * DEJA REPLIE dans le buffer, qui reste toujours petit. */
+    float write_pos = (float)(write_idx & FX_OCTAVER_BUFFER_MASK);
+    float read_pos = write_pos - delay;
+    while (read_pos < 0.0f)
+    {
+        read_pos += (float)FX_OCTAVER_BUFFER_SIZE;
+    }
+    uint32_t i0 = (uint32_t)read_pos & FX_OCTAVER_BUFFER_MASK;
+    uint32_t i1 = (i0 + 1U) & FX_OCTAVER_BUFFER_MASK;
+    float frac = read_pos - (float)(uint32_t)read_pos;
+    return buffer[i0] * (1.0f - frac) + buffer[i1] * frac;
+}
+
+/* Lecteur de grains a deux pointeurs en fondu croise : chaque pointeur avance
+ * (ou recule) dans le buffer a une vitesse "ratio" differente de celle de
+ * l'ecriture, ce qui change la hauteur percue. Les deux grains sont toujours
+ * en opposition de phase exacte (decales d'un demi-grain a l'origine, et le
+ * meme increment est applique aux deux avant chaque repli) : la fenetre de
+ * Hann du second grain vaut donc toujours 1 moins celle du premier, ce qui
+ * garantit un niveau de sortie constant pendant le fondu et evite un second
+ * calcul de fenetre. */
+static float FxOctaver_ProcessVoice(FxOctaverVoiceState *vs, const float *buffer, uint32_t write_idx, float ratio)
+{
+    float step = 1.0f - ratio;
+
+    for (uint32_t g = 0; g < 2U; g++)
+    {
+        vs->delay[g] += step;
+        if (vs->delay[g] >= (float)FX_OCTAVER_GRAIN_SIZE)
+        {
+            vs->delay[g] -= (float)FX_OCTAVER_GRAIN_SIZE;
+        }
+        else if (vs->delay[g] < 0.0f)
+        {
+            vs->delay[g] += (float)FX_OCTAVER_GRAIN_SIZE;
+        }
+    }
+
+    float phase0 = vs->delay[0] / (float)FX_OCTAVER_GRAIN_SIZE;
+    float env0 = FxOctaver_EnvLookup(phase0);
+    float env1 = 1.0f - env0;
+
+    float sample0 = FxOctaver_ReadInterpolated(buffer, write_idx, vs->delay[0]);
+    float sample1 = FxOctaver_ReadInterpolated(buffer, write_idx, vs->delay[1]);
+
+    return env0 * sample0 + env1 * sample1;
+}
+
+void FxOctaver_Init(FxOctaverState *state, FxOctaverParams *params)
+{
+    params->enabled     = false;
+    params->level_down2 = 0.0f;
+    params->level_down1 = 0.0f;
+    params->level_dry   = 1.0f;
+    params->level_up1   = 0.0f;
+    params->level_up2   = 0.0f;
+
+    for (uint32_t i = 0; i < FX_OCTAVER_BUFFER_SIZE; i++)
+    {
+        state->buffer[i] = 0.0f;
+    }
+    state->write_idx = 0U;
+
+    for (uint32_t v = 0; v < FX_OCTAVER_NUM_VOICES; v++)
+    {
+        state->voices[v].delay[0] = 0.0f;
+        state->voices[v].delay[1] = (float)FX_OCTAVER_GRAIN_SIZE * 0.5f;
+    }
+
+    FxOctaver_BuildEnvTable();
+}
+
+float FxOctaver_Process(FxOctaverState *state, const FxOctaverParams *params, float input)
+{
+    if (!params->enabled)
+    {
+        return input;
+    }
+
+    state->buffer[state->write_idx & FX_OCTAVER_BUFFER_MASK] = input;
+
+    float down2 = FxOctaver_ProcessVoice(&state->voices[0], state->buffer, state->write_idx, fx_octaver_ratios[0]);
+    float down1 = FxOctaver_ProcessVoice(&state->voices[1], state->buffer, state->write_idx, fx_octaver_ratios[1]);
+    float up1   = FxOctaver_ProcessVoice(&state->voices[2], state->buffer, state->write_idx, fx_octaver_ratios[2]);
+    float up2   = FxOctaver_ProcessVoice(&state->voices[3], state->buffer, state->write_idx, fx_octaver_ratios[3]);
+
+    state->write_idx++;
+
+    return input * params->level_dry
+         + down2 * params->level_down2
+         + down1 * params->level_down1
+         + up1   * params->level_up1
+         + up2   * params->level_up2;
+}

Appli/Core/Src/fx_overdrive.c

@@ -0,0 +1,39 @@
+#include "fx_overdrive.h"
+#include <math.h>
+
+void FxOverdrive_Init(FxOverdriveState *state, FxOverdriveParams *params)
+{
+    state->tone_lp_state = 0.0f;
+
+    params->enabled = false;
+    params->drive   = 0.4f;
+    params->tone    = 0.6f;
+    params->level   = 0.7f;
+}
+
+float FxOverdrive_Process(FxOverdriveState *state, const FxOverdriveParams *params, float input)
+{
+    if (!params->enabled)
+    {
+        return input;
+    }
+
+    float driven = input * (1.0f + params->drive * 20.0f);
+
+    /* Ecretage asymetrique (exponentiel) : plus caracteristique/agressif qu'un tanh symetrique. */
+    float shaped;
+    if (driven >= 0.0f)
+    {
+        shaped = 1.0f - expf(-driven);
+    }
+    else
+    {
+        shaped = -1.0f + expf(driven);
+    }
+
+    /* Filtre passe-bas une pole pour la tonalite : coefficient = tone (0..1). */
+    float coeff = 0.05f + params->tone * 0.9f;
+    state->tone_lp_state += coeff * (shaped - state->tone_lp_state);
+
+    return state->tone_lp_state * params->level;
+}

Appli/Core/Src/fx_reverb.c

@@ -0,0 +1,114 @@
+#include "fx_reverb.h"
+#include <string.h>
+
+/* Lignes a retard inspirees de Freeverb (Jezar), redimensionnees de 44.1kHz vers 48kHz. */
+#define FX_REVERB_COMB0 1215U
+#define FX_REVERB_COMB1 1293U
+#define FX_REVERB_COMB2 1390U
+#define FX_REVERB_COMB3 1476U
+#define FX_REVERB_COMB4 1548U
+#define FX_REVERB_COMB5 1623U
+#define FX_REVERB_COMB6 1695U
+#define FX_REVERB_COMB7 1761U
+
+#define FX_REVERB_ALLPASS0 605U
+#define FX_REVERB_ALLPASS1 480U
+#define FX_REVERB_ALLPASS2 371U
+#define FX_REVERB_ALLPASS3 245U
+
+static float fx_reverb_comb_buf0[FX_REVERB_COMB0];
+static float fx_reverb_comb_buf1[FX_REVERB_COMB1];
+static float fx_reverb_comb_buf2[FX_REVERB_COMB2];
+static float fx_reverb_comb_buf3[FX_REVERB_COMB3];
+static float fx_reverb_comb_buf4[FX_REVERB_COMB4];
+static float fx_reverb_comb_buf5[FX_REVERB_COMB5];
+static float fx_reverb_comb_buf6[FX_REVERB_COMB6];
+static float fx_reverb_comb_buf7[FX_REVERB_COMB7];
+
+static float fx_reverb_allpass_buf0[FX_REVERB_ALLPASS0];
+static float fx_reverb_allpass_buf1[FX_REVERB_ALLPASS1];
+static float fx_reverb_allpass_buf2[FX_REVERB_ALLPASS2];
+static float fx_reverb_allpass_buf3[FX_REVERB_ALLPASS3];
+
+static float FxComb_Process(FxCombState *c, float input, float feedback, float damp1, float damp2)
+{
+    float output = c->buffer[c->idx];
+    c->filter_store = (output * damp2) + (c->filter_store * damp1);
+    c->buffer[c->idx] = input + (c->filter_store * feedback);
+    c->idx = (c->idx + 1U) % c->size;
+    return output;
+}
+
+static float FxAllpass_Process(FxAllpassState *a, float input, float feedback)
+{
+    float buf_out = a->buffer[a->idx];
+    float output = -input + buf_out;
+    a->buffer[a->idx] = input + buf_out * feedback;
+    a->idx = (a->idx + 1U) % a->size;
+    return output;
+}
+
+void FxReverb_Init(FxReverbState *state, FxReverbParams *params)
+{
+    params->enabled   = false;
+    params->room_size = 0.5f;
+    params->damping   = 0.5f;
+    params->mix       = 0.3f;
+
+    float *comb_buffers[FX_REVERB_NUM_COMBS] = {
+        fx_reverb_comb_buf0, fx_reverb_comb_buf1, fx_reverb_comb_buf2, fx_reverb_comb_buf3,
+        fx_reverb_comb_buf4, fx_reverb_comb_buf5, fx_reverb_comb_buf6, fx_reverb_comb_buf7
+    };
+    uint32_t comb_sizes[FX_REVERB_NUM_COMBS] = {
+        FX_REVERB_COMB0, FX_REVERB_COMB1, FX_REVERB_COMB2, FX_REVERB_COMB3,
+        FX_REVERB_COMB4, FX_REVERB_COMB5, FX_REVERB_COMB6, FX_REVERB_COMB7
+    };
+    for (uint32_t i = 0; i < FX_REVERB_NUM_COMBS; i++)
+    {
+        state->combs[i].buffer = comb_buffers[i];
+        state->combs[i].size = comb_sizes[i];
+        state->combs[i].idx = 0;
+        state->combs[i].filter_store = 0.0f;
+        memset(comb_buffers[i], 0, comb_sizes[i] * sizeof(float));
+    }
+
+    float *allpass_buffers[FX_REVERB_NUM_ALLPASS] = {
+        fx_reverb_allpass_buf0, fx_reverb_allpass_buf1, fx_reverb_allpass_buf2, fx_reverb_allpass_buf3
+    };
+    uint32_t allpass_sizes[FX_REVERB_NUM_ALLPASS] = {
+        FX_REVERB_ALLPASS0, FX_REVERB_ALLPASS1, FX_REVERB_ALLPASS2, FX_REVERB_ALLPASS3
+    };
+    for (uint32_t i = 0; i < FX_REVERB_NUM_ALLPASS; i++)
+    {
+        state->allpass[i].buffer = allpass_buffers[i];
+        state->allpass[i].size = allpass_sizes[i];
+        state->allpass[i].idx = 0;
+        memset(allpass_buffers[i], 0, allpass_sizes[i] * sizeof(float));
+    }
+}
+
+float FxReverb_Process(FxReverbState *state, const FxReverbParams *params, float input)
+{
+    if (!params->enabled)
+    {
+        return input;
+    }
+
+    float feedback = 0.28f + params->room_size * 0.7f;
+    float damp1 = params->damping * 0.4f;
+    float damp2 = 1.0f - damp1;
+
+    float out = 0.0f;
+    for (uint32_t i = 0; i < FX_REVERB_NUM_COMBS; i++)
+    {
+        out += FxComb_Process(&state->combs[i], input, feedback, damp1, damp2);
+    }
+    out /= (float)FX_REVERB_NUM_COMBS;
+
+    for (uint32_t i = 0; i < FX_REVERB_NUM_ALLPASS; i++)
+    {
+        out = FxAllpass_Process(&state->allpass[i], out, 0.5f);
+    }
+
+    return input * (1.0f - params->mix) + out * params->mix;
+}

Appli/Core/Src/fx_saturation.c

@@ -0,0 +1,32 @@
+#include "fx_saturation.h"
+#include <math.h>
+
+#define FX_SATURATION_DC_BLOCK_R 0.995f
+
+void FxSaturation_Init(FxSaturationState *state, FxSaturationParams *params)
+{
+    state->dc_block_x1 = 0.0f;
+    state->dc_block_y1 = 0.0f;
+
+    params->enabled = false;
+    params->drive   = 0.3f;
+    params->level   = 0.8f;
+}
+
+float FxSaturation_Process(FxSaturationState *state, const FxSaturationParams *params, float input)
+{
+    if (!params->enabled)
+    {
+        return input;
+    }
+
+    float driven = input * (1.0f + params->drive * 12.0f);
+    float shaped = tanhf(driven);
+
+    /* Le tanh sur un signal non symetrique introduit un leger DC : filtre bloqueur de DC. */
+    float y = shaped - state->dc_block_x1 + FX_SATURATION_DC_BLOCK_R * state->dc_block_y1;
+    state->dc_block_x1 = shaped;
+    state->dc_block_y1 = y;
+
+    return y * params->level;
+}

Appli/Core/Src/stm32h7rsxx_hal_msp.c

@@ -0,0 +1,803 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file         stm32h7rsxx_hal_msp.c
+  * @brief        This file provides code for the MSP Initialization
+  *               and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+extern DMA_NodeTypeDef Node_GPDMA1_Channel0;
+
+extern DMA_QListTypeDef List_GPDMA1_Channel0;
+
+extern DMA_HandleTypeDef handle_GPDMA1_Channel0;
+
+extern DMA_HandleTypeDef handle_HPDMA1_Channel1;
+
+extern DMA_HandleTypeDef handle_HPDMA1_Channel0;
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  /* System interrupt init*/
+  /* PendSV_IRQn interrupt configuration */
+  HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0);
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+  * @brief MDF MSP Initialization
+  * This function configures the hardware resources used in this example
+  * @param hmdf: MDF handle pointer
+  * @retval None
+  */
+void HAL_MDF_MspInit(MDF_HandleTypeDef* hmdf)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  DMA_NodeConfTypeDef NodeConfig;
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(IS_MDF_ALL_INSTANCE(hmdf->Instance))
+  {
+    /* USER CODE BEGIN ADF1_MspInit 0 */
+
+    /* USER CODE END ADF1_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADF1;
+    PeriphClkInit.Adf1ClockSelection = RCC_ADF1CLKSOURCE_PLL2P;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_ADF1_CLK_ENABLE();
+
+    __HAL_RCC_GPIOE_CLK_ENABLE();
+    __HAL_RCC_GPIOD_CLK_ENABLE();
+    /**ADF1 GPIO Configuration
+    PE2     ------> ADF1_CCK0
+    PD6     ------> ADF1_SDI0
+    */
+    GPIO_InitStruct.Pin = ADF1_CK_Pin;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;   // était LOW : bien trop lent pour piloter proprement une horloge à 6-12MHz+ vers le micro PDM
+    GPIO_InitStruct.Alternate = GPIO_AF1_ADF1;
+    HAL_GPIO_Init(ADF1_CK_GPIO_Port, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = ADF1_D_Pin;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF3_ADF1;
+    HAL_GPIO_Init(ADF1_D_GPIO_Port, &GPIO_InitStruct);
+
+    /* ADF1 DMA Init */
+    /* GPDMA1_REQUEST_ADF1_FLT0 Init */
+    NodeConfig.NodeType = DMA_GPDMA_LINEAR_NODE;
+    NodeConfig.Init.Request = GPDMA1_REQUEST_ADF1_FLT0;
+    NodeConfig.Init.BlkHWRequest = DMA_BREQ_SINGLE_BURST;
+    NodeConfig.Init.Direction = DMA_PERIPH_TO_MEMORY;
+    NodeConfig.Init.SrcInc = DMA_SINC_FIXED;
+    NodeConfig.Init.DestInc = DMA_DINC_INCREMENTED;
+    NodeConfig.Init.SrcDataWidth = DMA_SRC_DATAWIDTH_WORD;
+    NodeConfig.Init.DestDataWidth = DMA_DEST_DATAWIDTH_WORD;
+    NodeConfig.Init.SrcBurstLength = 1;
+    NodeConfig.Init.DestBurstLength = 1;
+    NodeConfig.Init.TransferAllocatedPort = DMA_SRC_ALLOCATED_PORT0|DMA_DEST_ALLOCATED_PORT1;
+    NodeConfig.Init.TransferEventMode = DMA_TCEM_BLOCK_TRANSFER;
+    NodeConfig.Init.Mode = DMA_NORMAL;
+    NodeConfig.TriggerConfig.TriggerPolarity = DMA_TRIG_POLARITY_MASKED;
+    NodeConfig.DataHandlingConfig.DataExchange = DMA_EXCHANGE_NONE;
+    NodeConfig.DataHandlingConfig.DataAlignment = DMA_DATA_RIGHTALIGN_ZEROPADDED;
+    if (HAL_DMAEx_List_BuildNode(&NodeConfig, &Node_GPDMA1_Channel0) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    if (HAL_DMAEx_List_InsertNode(&List_GPDMA1_Channel0, NULL, &Node_GPDMA1_Channel0) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    if (HAL_DMAEx_List_SetCircularMode(&List_GPDMA1_Channel0) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    handle_GPDMA1_Channel0.Instance = GPDMA1_Channel0;
+    handle_GPDMA1_Channel0.InitLinkedList.Priority = DMA_HIGH_PRIORITY;
+    handle_GPDMA1_Channel0.InitLinkedList.LinkStepMode = DMA_LSM_FULL_EXECUTION;
+    handle_GPDMA1_Channel0.InitLinkedList.LinkAllocatedPort = DMA_LINK_ALLOCATED_PORT1;
+    handle_GPDMA1_Channel0.InitLinkedList.TransferEventMode = DMA_TCEM_BLOCK_TRANSFER;
+    handle_GPDMA1_Channel0.InitLinkedList.LinkedListMode = DMA_LINKEDLIST_CIRCULAR;
+    if (HAL_DMAEx_List_Init(&handle_GPDMA1_Channel0) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    if (HAL_DMAEx_List_LinkQ(&handle_GPDMA1_Channel0, &List_GPDMA1_Channel0) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(hmdf, hdma, handle_GPDMA1_Channel0);
+
+    if (HAL_DMA_ConfigChannelAttributes(&handle_GPDMA1_Channel0, DMA_CHANNEL_NPRIV) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* ADF1 interrupt Init */
+    HAL_NVIC_SetPriority(ADF1_FLT0_IRQn, 2, 0);
+    HAL_NVIC_EnableIRQ(ADF1_FLT0_IRQn);
+    /* USER CODE BEGIN ADF1_MspInit 1 */
+
+    /* USER CODE END ADF1_MspInit 1 */
+
+  }
+
+}
+
+/**
+  * @brief MDF MSP De-Initialization
+  * This function freeze the hardware resources used in this example
+  * @param hmdf: MDF handle pointer
+  * @retval None
+  */
+void HAL_MDF_MspDeInit(MDF_HandleTypeDef* hmdf)
+{
+  if(IS_MDF_ALL_INSTANCE(hmdf->Instance))
+  {
+    /* USER CODE BEGIN ADF1_MspDeInit 0 */
+
+    /* USER CODE END ADF1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_ADF1_CLK_DISABLE();
+
+    /**ADF1 GPIO Configuration
+    PE2     ------> ADF1_CCK0
+    PD6     ------> ADF1_SDI0
+    */
+    HAL_GPIO_DeInit(ADF1_CK_GPIO_Port, ADF1_CK_Pin);
+
+    HAL_GPIO_DeInit(ADF1_D_GPIO_Port, ADF1_D_Pin);
+
+    /* ADF1 DMA DeInit */
+    HAL_DMA_DeInit(hmdf->hdma);
+
+    /* ADF1 interrupt DeInit */
+    HAL_NVIC_DisableIRQ(ADF1_FLT0_IRQn);
+    /* USER CODE BEGIN ADF1_MspDeInit 1 */
+
+    /* USER CODE END ADF1_MspDeInit 1 */
+  }
+
+}
+
+/**
+  * @brief CRC MSP Initialization
+  * This function configures the hardware resources used in this example
+  * @param hcrc: CRC handle pointer
+  * @retval None
+  */
+void HAL_CRC_MspInit(CRC_HandleTypeDef* hcrc)
+{
+  if(hcrc->Instance==CRC)
+  {
+    /* USER CODE BEGIN CRC_MspInit 0 */
+
+    /* USER CODE END CRC_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_CRC_CLK_ENABLE();
+    /* USER CODE BEGIN CRC_MspInit 1 */
+
+    /* USER CODE END CRC_MspInit 1 */
+
+  }
+
+}
+
+/**
+  * @brief CRC MSP De-Initialization
+  * This function freeze the hardware resources used in this example
+  * @param hcrc: CRC handle pointer
+  * @retval None
+  */
+void HAL_CRC_MspDeInit(CRC_HandleTypeDef* hcrc)
+{
+  if(hcrc->Instance==CRC)
+  {
+    /* USER CODE BEGIN CRC_MspDeInit 0 */
+
+    /* USER CODE END CRC_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_CRC_CLK_DISABLE();
+    /* USER CODE BEGIN CRC_MspDeInit 1 */
+
+    /* USER CODE END CRC_MspDeInit 1 */
+  }
+
+}
+
+/**
+  * @brief DMA2D MSP Initialization
+  * This function configures the hardware resources used in this example
+  * @param hdma2d: DMA2D handle pointer
+  * @retval None
+  */
+void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d)
+{
+  if(hdma2d->Instance==DMA2D)
+  {
+    /* USER CODE BEGIN DMA2D_MspInit 0 */
+
+    /* USER CODE END DMA2D_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_DMA2D_CLK_ENABLE();
+    /* DMA2D interrupt Init */
+    HAL_NVIC_SetPriority(DMA2D_IRQn, 5, 0);
+    /* USER CODE BEGIN DMA2D_MspInit 1 */
+
+    /* USER CODE END DMA2D_MspInit 1 */
+
+  }
+
+}
+
+/**
+  * @brief DMA2D MSP De-Initialization
+  * This function freeze the hardware resources used in this example
+  * @param hdma2d: DMA2D handle pointer
+  * @retval None
+  */
+void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d)
+{
+  if(hdma2d->Instance==DMA2D)
+  {
+    /* USER CODE BEGIN DMA2D_MspDeInit 0 */
+
+    /* USER CODE END DMA2D_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_DMA2D_CLK_DISABLE();
+
+    /* DMA2D interrupt DeInit */
+    HAL_NVIC_DisableIRQ(DMA2D_IRQn);
+    /* USER CODE BEGIN DMA2D_MspDeInit 1 */
+
+    /* USER CODE END DMA2D_MspDeInit 1 */
+  }
+
+}
+
+/**
+  * @brief GPU2D MSP Initialization
+  * This function configures the hardware resources used in this example
+  * @param hgpu2d: GPU2D handle pointer
+  * @retval None
+  */
+void HAL_GPU2D_MspInit(GPU2D_HandleTypeDef* hgpu2d)
+{
+  if(hgpu2d->Instance==GPU2D)
+  {
+    /* USER CODE BEGIN GPU2D_MspInit 0 */
+
+    /* USER CODE END GPU2D_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_GPU2D_CLK_ENABLE();
+    /* GPU2D interrupt Init */
+    HAL_NVIC_SetPriority(GPU2D_IRQn, 5, 0);
+    HAL_NVIC_EnableIRQ(GPU2D_IRQn);
+    HAL_NVIC_SetPriority(GPU2D_ER_IRQn, 5, 0);
+    HAL_NVIC_EnableIRQ(GPU2D_ER_IRQn);
+    /* USER CODE BEGIN GPU2D_MspInit 1 */
+
+    /* USER CODE END GPU2D_MspInit 1 */
+
+  }
+
+}
+
+/**
+  * @brief GPU2D MSP De-Initialization
+  * This function freeze the hardware resources used in this example
+  * @param hgpu2d: GPU2D handle pointer
+  * @retval None
+  */
+void HAL_GPU2D_MspDeInit(GPU2D_HandleTypeDef* hgpu2d)
+{
+  if(hgpu2d->Instance==GPU2D)
+  {
+    /* USER CODE BEGIN GPU2D_MspDeInit 0 */
+
+    /* USER CODE END GPU2D_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_GPU2D_CLK_DISABLE();
+
+    /* GPU2D interrupt DeInit */
+    HAL_NVIC_DisableIRQ(GPU2D_IRQn);
+    HAL_NVIC_DisableIRQ(GPU2D_ER_IRQn);
+    /* USER CODE BEGIN GPU2D_MspDeInit 1 */
+
+    /* USER CODE END GPU2D_MspDeInit 1 */
+  }
+
+}
+
+/**
+  * @brief I2C MSP Initialization
+  * This function configures the hardware resources used in this example
+  * @param hi2c: I2C handle pointer
+  * @retval None
+  */
+void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(hi2c->Instance==I2C1)
+  {
+    /* USER CODE BEGIN I2C1_MspInit 0 */
+
+    /* USER CODE END I2C1_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_I2C1_I3C1;
+    PeriphClkInit.I2c1_I3c1ClockSelection = RCC_I2C1_I3C1CLKSOURCE_PCLK1;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    /**I2C1 GPIO Configuration
+    PB9     ------> I2C1_SDA
+    PB6     ------> I2C1_SCL
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_6;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+    /* Peripheral clock enable */
+    __HAL_RCC_I2C1_CLK_ENABLE();
+    /* USER CODE BEGIN I2C1_MspInit 1 */
+
+    /* USER CODE END I2C1_MspInit 1 */
+
+  }
+
+}
+
+/**
+  * @brief I2C MSP De-Initialization
+  * This function freeze the hardware resources used in this example
+  * @param hi2c: I2C handle pointer
+  * @retval None
+  */
+void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c)
+{
+  if(hi2c->Instance==I2C1)
+  {
+    /* USER CODE BEGIN I2C1_MspDeInit 0 */
+
+    /* USER CODE END I2C1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_I2C1_CLK_DISABLE();
+
+    /**I2C1 GPIO Configuration
+    PB9     ------> I2C1_SDA
+    PB6     ------> I2C1_SCL
+    */
+    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_9);
+
+    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_6);
+
+    /* USER CODE BEGIN I2C1_MspDeInit 1 */
+
+    /* USER CODE END I2C1_MspDeInit 1 */
+  }
+
+}
+
+/**
+  * @brief JPEG MSP Initialization
+  * This function configures the hardware resources used in this example
+  * @param hjpeg: JPEG handle pointer
+  * @retval None
+  */
+void HAL_JPEG_MspInit(JPEG_HandleTypeDef* hjpeg)
+{
+  DMA_DataHandlingConfTypeDef DataHandlingConfig;
+  if(hjpeg->Instance==JPEG)
+  {
+    /* USER CODE BEGIN JPEG_MspInit 0 */
+
+    /* USER CODE END JPEG_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_JPEG_CLK_ENABLE();
+
+    /* JPEG DMA Init */
+    /* HPDMA1_REQUEST_JPEG_TX Init */
+    handle_HPDMA1_Channel1.Instance = HPDMA1_Channel1;
+    handle_HPDMA1_Channel1.Init.Request = HPDMA1_REQUEST_JPEG_TX;
+    handle_HPDMA1_Channel1.Init.BlkHWRequest = DMA_BREQ_SINGLE_BURST;
+    handle_HPDMA1_Channel1.Init.Direction = DMA_PERIPH_TO_MEMORY;
+    handle_HPDMA1_Channel1.Init.SrcInc = DMA_SINC_FIXED;
+    handle_HPDMA1_Channel1.Init.DestInc = DMA_DINC_INCREMENTED;
+    handle_HPDMA1_Channel1.Init.SrcDataWidth = DMA_SRC_DATAWIDTH_WORD;
+    handle_HPDMA1_Channel1.Init.DestDataWidth = DMA_DEST_DATAWIDTH_WORD;
+    handle_HPDMA1_Channel1.Init.Priority = DMA_HIGH_PRIORITY;
+    handle_HPDMA1_Channel1.Init.SrcBurstLength = 8;
+    handle_HPDMA1_Channel1.Init.DestBurstLength = 8;
+    handle_HPDMA1_Channel1.Init.TransferAllocatedPort = DMA_SRC_ALLOCATED_PORT1|DMA_DEST_ALLOCATED_PORT0;
+    handle_HPDMA1_Channel1.Init.TransferEventMode = DMA_TCEM_BLOCK_TRANSFER;
+    handle_HPDMA1_Channel1.Init.Mode = DMA_NORMAL;
+    if (HAL_DMA_Init(&handle_HPDMA1_Channel1) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(hjpeg, hdmaout, handle_HPDMA1_Channel1);
+
+    if (HAL_DMA_ConfigChannelAttributes(&handle_HPDMA1_Channel1, DMA_CHANNEL_NPRIV) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* HPDMA1_REQUEST_JPEG_RX Init */
+    handle_HPDMA1_Channel0.Instance = HPDMA1_Channel0;
+    handle_HPDMA1_Channel0.Init.Request = HPDMA1_REQUEST_JPEG_RX;
+    handle_HPDMA1_Channel0.Init.BlkHWRequest = DMA_BREQ_SINGLE_BURST;
+    handle_HPDMA1_Channel0.Init.Direction = DMA_MEMORY_TO_PERIPH;
+    handle_HPDMA1_Channel0.Init.SrcInc = DMA_SINC_INCREMENTED;
+    handle_HPDMA1_Channel0.Init.DestInc = DMA_DINC_FIXED;
+    handle_HPDMA1_Channel0.Init.SrcDataWidth = DMA_SRC_DATAWIDTH_BYTE;
+    handle_HPDMA1_Channel0.Init.DestDataWidth = DMA_DEST_DATAWIDTH_WORD;
+    handle_HPDMA1_Channel0.Init.Priority = DMA_HIGH_PRIORITY;
+    handle_HPDMA1_Channel0.Init.SrcBurstLength = 8;
+    handle_HPDMA1_Channel0.Init.DestBurstLength = 8;
+    handle_HPDMA1_Channel0.Init.TransferAllocatedPort = DMA_SRC_ALLOCATED_PORT0|DMA_DEST_ALLOCATED_PORT1;
+    handle_HPDMA1_Channel0.Init.TransferEventMode = DMA_TCEM_BLOCK_TRANSFER;
+    handle_HPDMA1_Channel0.Init.Mode = DMA_NORMAL;
+    if (HAL_DMA_Init(&handle_HPDMA1_Channel0) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    DataHandlingConfig.DataExchange = DMA_EXCHANGE_NONE;
+    DataHandlingConfig.DataAlignment = DMA_DATA_PACK;
+    if (HAL_DMAEx_ConfigDataHandling(&handle_HPDMA1_Channel0, &DataHandlingConfig) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_LINKDMA(hjpeg, hdmain, handle_HPDMA1_Channel0);
+
+    if (HAL_DMA_ConfigChannelAttributes(&handle_HPDMA1_Channel0, DMA_CHANNEL_NPRIV) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* JPEG interrupt Init */
+    HAL_NVIC_SetPriority(JPEG_IRQn, 8, 0);
+    HAL_NVIC_EnableIRQ(JPEG_IRQn);
+    /* USER CODE BEGIN JPEG_MspInit 1 */
+
+    /* USER CODE END JPEG_MspInit 1 */
+
+  }
+
+}
+
+/**
+  * @brief JPEG MSP De-Initialization
+  * This function freeze the hardware resources used in this example
+  * @param hjpeg: JPEG handle pointer
+  * @retval None
+  */
+void HAL_JPEG_MspDeInit(JPEG_HandleTypeDef* hjpeg)
+{
+  if(hjpeg->Instance==JPEG)
+  {
+    /* USER CODE BEGIN JPEG_MspDeInit 0 */
+
+    /* USER CODE END JPEG_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_JPEG_CLK_DISABLE();
+
+    /* JPEG DMA DeInit */
+    HAL_DMA_DeInit(hjpeg->hdmaout);
+    HAL_DMA_DeInit(hjpeg->hdmain);
+
+    /* JPEG interrupt DeInit */
+    HAL_NVIC_DisableIRQ(JPEG_IRQn);
+    /* USER CODE BEGIN JPEG_MspDeInit 1 */
+
+    /* USER CODE END JPEG_MspDeInit 1 */
+  }
+
+}
+
+/**
+  * @brief LTDC MSP Initialization
+  * This function configures the hardware resources used in this example
+  * @param hltdc: LTDC handle pointer
+  * @retval None
+  */
+void HAL_LTDC_MspInit(LTDC_HandleTypeDef* hltdc)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(hltdc->Instance==LTDC)
+  {
+    /* USER CODE BEGIN LTDC_MspInit 0 */
+
+    /* USER CODE END LTDC_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LTDC;
+    PeriphClkInit.LtdcClockSelection = RCC_LTDCCLKSOURCE_PLL3R;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_LTDC_CLK_ENABLE();
+
+    __HAL_RCC_GPIOF_CLK_ENABLE();
+    __HAL_RCC_GPIOG_CLK_ENABLE();
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    __HAL_RCC_GPIOE_CLK_ENABLE();
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    /**LTDC GPIO Configuration
+    PF0     ------> LTDC_R2
+    PG0     ------> LTDC_R7
+    PB3(JTDO/TRACESWO)     ------> LTDC_R4
+    PG2     ------> LTDC_HSYNC
+    PE11     ------> LTDC_VSYNC
+    PA12     ------> LTDC_B2
+    PA11     ------> LTDC_B3
+    PB4(NJTRST)     ------> LTDC_R3
+    PA9     ------> LTDC_B5
+    PG1     ------> LTDC_R6
+    PA10     ------> LTDC_B4
+    PG14     ------> LTDC_B1
+    PA8     ------> LTDC_B6
+    PG13     ------> LTDC_CLK
+    PA15(JTDI)     ------> LTDC_R5
+    PF7     ------> LTDC_G0
+    PF9     ------> LTDC_R0
+    PF10     ------> LTDC_R1
+    PB12     ------> LTDC_G5
+    PA0     ------> LTDC_G3
+    PA1     ------> LTDC_G2
+    PF11     ------> LTDC_B0
+    PB14     ------> LTDC_DE
+    PB15     ------> LTDC_G7
+    PF15     ------> LTDC_G1
+    PB11     ------> LTDC_G6
+    PB13     ------> LTDC_G4
+    PA6     ------> LTDC_B7
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_0;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF11_LTDC;
+    HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_2|GPIO_PIN_1|GPIO_PIN_14
+                          |GPIO_PIN_13;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF13_LTDC;
+    HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_12|GPIO_PIN_14
+                          |GPIO_PIN_11;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF13_LTDC;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_11;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF11_LTDC;
+    HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_11|GPIO_PIN_8|GPIO_PIN_15
+                          |GPIO_PIN_0|GPIO_PIN_1;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF13_LTDC;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_9|GPIO_PIN_15;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF13_LTDC;
+    HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
+    HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_15|GPIO_PIN_13;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF10_LTDC;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_6;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF12_LTDC;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+    /* LTDC interrupt Init */
+    HAL_NVIC_SetPriority(LTDC_IRQn, 5, 0);
+    /* USER CODE BEGIN LTDC_MspInit 1 */
+
+    /* USER CODE END LTDC_MspInit 1 */
+
+  }
+
+}
+
+/**
+  * @brief LTDC MSP De-Initialization
+  * This function freeze the hardware resources used in this example
+  * @param hltdc: LTDC handle pointer
+  * @retval None
+  */
+void HAL_LTDC_MspDeInit(LTDC_HandleTypeDef* hltdc)
+{
+  if(hltdc->Instance==LTDC)
+  {
+    /* USER CODE BEGIN LTDC_MspDeInit 0 */
+
+    /* USER CODE END LTDC_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_LTDC_CLK_DISABLE();
+
+    /**LTDC GPIO Configuration
+    PF0     ------> LTDC_R2
+    PG0     ------> LTDC_R7
+    PB3(JTDO/TRACESWO)     ------> LTDC_R4
+    PG2     ------> LTDC_HSYNC
+    PE11     ------> LTDC_VSYNC
+    PA12     ------> LTDC_B2
+    PA11     ------> LTDC_B3
+    PB4(NJTRST)     ------> LTDC_R3
+    PA9     ------> LTDC_B5
+    PG1     ------> LTDC_R6
+    PA10     ------> LTDC_B4
+    PG14     ------> LTDC_B1
+    PA8     ------> LTDC_B6
+    PG13     ------> LTDC_CLK
+    PA15(JTDI)     ------> LTDC_R5
+    PF7     ------> LTDC_G0
+    PF9     ------> LTDC_R0
+    PF10     ------> LTDC_R1
+    PB12     ------> LTDC_G5
+    PA0     ------> LTDC_G3
+    PA1     ------> LTDC_G2
+    PF11     ------> LTDC_B0
+    PB14     ------> LTDC_DE
+    PB15     ------> LTDC_G7
+    PF15     ------> LTDC_G1
+    PB11     ------> LTDC_G6
+    PB13     ------> LTDC_G4
+    PA6     ------> LTDC_B7
+    */
+    HAL_GPIO_DeInit(GPIOF, GPIO_PIN_0|GPIO_PIN_7|GPIO_PIN_9|GPIO_PIN_10
+                          |GPIO_PIN_11|GPIO_PIN_15);
+
+    HAL_GPIO_DeInit(GPIOG, GPIO_PIN_0|GPIO_PIN_2|GPIO_PIN_1|GPIO_PIN_14
+                          |GPIO_PIN_13);
+
+    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_12|GPIO_PIN_14
+                          |GPIO_PIN_15|GPIO_PIN_11|GPIO_PIN_13);
+
+    HAL_GPIO_DeInit(GPIOE, GPIO_PIN_11);
+
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_12|GPIO_PIN_11|GPIO_PIN_9|GPIO_PIN_10
+                          |GPIO_PIN_8|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1
+                          |GPIO_PIN_6);
+
+    /* LTDC interrupt DeInit */
+    HAL_NVIC_DisableIRQ(LTDC_IRQn);
+    /* USER CODE BEGIN LTDC_MspDeInit 1 */
+
+    /* USER CODE END LTDC_MspDeInit 1 */
+  }
+
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */

Appli/Core/Src/stm32h7rsxx_hal_timebase_tim.c

@@ -0,0 +1,192 @@
+/**
+  ******************************************************************************
+  * @file    stm32h7rsxx_hal_timebase_tim.c
+  * @author  MCD Application Team
+  * @brief   Template for HAL time base based on the peripheral hardware TIM6.
+  *
+  *          This file override the native HAL time base functions (defined as weak)
+  *          the TIM time base:
+  *           + Initializes the TIM6 peripheral to generate a Period elapsed Event each 1ms
+  *           + HAL_IncTick is called inside HAL_TIM_PeriodElapsedCallback ie each 1ms
+  *
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2024 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************/
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32h7rsxx_hal.h"
+
+/** @addtogroup STM32H7RSxx_HAL_Driver
+  * @{
+  */
+
+/** @addtogroup HAL_TimeBase
+  * @{
+  */
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+#define TIM_CNT_FREQ 1000000U /* Timer counter frequency : 1 MHz */
+#define TIM_FREQ     1000U    /* Timer frequency : 1 kHz => to have 1 ms interrupt */
+
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+TIM_HandleTypeDef htim6;
+
+/* Private function prototypes -----------------------------------------------*/
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1U)
+void TimeBase_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim);
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @brief  This function configures the TIM6 as a time base source.
+  *         The time source is configured  to have 1ms time base with a dedicated
+  *         Tick interrupt priority.
+  * @note   This function is called  automatically at the beginning of program after
+  *         reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig().
+  * @param  TickPriority Tick interrupt priority.
+  * @retval HAL status
+  */
+HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
+{
+  RCC_ClkInitTypeDef    clkconfig;
+  uint32_t              uwTimclock;
+  uint32_t              uwAPB1Prescaler;
+  uint32_t              uwPrescalerValue;
+  uint32_t              pFLatency;
+  HAL_StatusTypeDef     Status;
+
+  /* Enable TIM6 clock */
+  __HAL_RCC_TIM6_CLK_ENABLE();
+
+  /* Get clock configuration */
+  HAL_RCC_GetClockConfig(&clkconfig, &pFLatency);
+
+  /* Get APB1 prescaler */
+  uwAPB1Prescaler = clkconfig.APB1CLKDivider;
+
+  /* Compute TIM6 clock */
+  if (uwAPB1Prescaler == RCC_APB1_DIV1)
+  {
+    uwTimclock = HAL_RCC_GetPCLK1Freq();
+  }
+  else if (uwAPB1Prescaler == RCC_APB1_DIV2)
+  {
+    uwTimclock = 2UL * HAL_RCC_GetPCLK1Freq();
+  }
+  else
+  {
+    if (__HAL_RCC_GET_TIMCLKPRESCALER() == RCC_TIMPRES_DISABLE)
+    {
+      uwTimclock = 2UL * HAL_RCC_GetPCLK1Freq();
+    }
+    else
+    {
+      uwTimclock = 4UL * HAL_RCC_GetPCLK1Freq();
+    }
+  }
+
+  /* Compute the prescaler value to have TIM6 counter clock equal to TIM_CNT_FREQ */
+  uwPrescalerValue = (uint32_t)((uwTimclock / TIM_CNT_FREQ) - 1U);
+
+  /* Initialize TIM6 */
+  htim6.Instance = TIM6;
+
+  /* Initialize TIMx peripheral as follow:
+  + Period = [uwTickFreq * (TIM_CNT_FREQ/TIM_FREQ) - 1]. to have a (uwTickFreq/TIM_FREQ) s time base.
+  + Prescaler = (uwTimclock/TIM_CNT_FREQ - 1) to have a TIM_CNT_FREQ counter clock.
+  + ClockDivision = 0
+  + Counter direction = Up
+  */
+  htim6.Init.Period = ((uint32_t)uwTickFreq  * (TIM_CNT_FREQ / TIM_FREQ)) - 1U;
+  htim6.Init.Prescaler = uwPrescalerValue;
+  htim6.Init.ClockDivision = 0;
+  htim6.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim6.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  Status = HAL_TIM_Base_Init(&htim6);
+  if (Status == HAL_OK)
+  {
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1U)
+    HAL_TIM_RegisterCallback(&htim6, HAL_TIM_PERIOD_ELAPSED_CB_ID, TimeBase_TIM_PeriodElapsedCallback);
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+    /* Start the TIM time Base generation in interrupt mode */
+    Status = HAL_TIM_Base_Start_IT(&htim6);
+    if (Status == HAL_OK)
+    {
+      if (TickPriority < (1UL << __NVIC_PRIO_BITS))
+      {
+        /* Configure the TIM6 global Interrupt priority */
+        HAL_NVIC_SetPriority(TIM6_IRQn, TickPriority, 0);
+
+        /* Enable the TIM6 global Interrupt */
+        HAL_NVIC_EnableIRQ(TIM6_IRQn);
+
+        uwTickPrio = TickPriority;
+      }
+      else
+      {
+        Status = HAL_ERROR;
+      }
+    }
+  }
+
+  /* Return function status */
+  return Status;
+}
+
+/**
+  * @brief  Suspend Tick increment.
+  * @note   Disable the tick increment by disabling TIM6 update interrupt.
+  * @retval None
+  */
+void HAL_SuspendTick(void)
+{
+  /* Disable TIM6 update interrupt */
+  __HAL_TIM_DISABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
+/**
+  * @brief  Resume Tick increment.
+  * @note   Enable the tick increment by enabling TIM6 update interrupt.
+  * @retval None
+  */
+void HAL_ResumeTick(void)
+{
+  /* Enable TIM6 update interrupt */
+  __HAL_TIM_ENABLE_IT(&htim6, TIM_IT_UPDATE);
+}
+
+/**
+  * @brief  Period elapsed callback in non blocking mode
+  * @note   This function is called  when TIM6 interrupt took place, inside
+  * HAL_TIM6_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
+  * a global variable "uwTick" used as application time base.
+  * @param  htim TIM handle
+  * @retval None
+  */
+#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1U)
+void TimeBase_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
+{
+  /* Prevent unused argument(s) compilation warning */
+  UNUSED(htim);
+
+  HAL_IncTick();
+
+}
+#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */

Appli/Core/Src/stm32h7rsxx_it.c

@@ -0,0 +1,337 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32h7rsxx_it.c
+  * @brief   Interrupt Service Routines.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+#include "stm32h7rsxx_it.h"
+
+#include "stm32h7s78_discovery_audio.h"
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+
+/* USER CODE END PD */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN PM */
+
+/* USER CODE END PM */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* Private user code ---------------------------------------------------------*/
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+extern DMA_NodeTypeDef Node_GPDMA1_Channel0;
+extern DMA_QListTypeDef List_GPDMA1_Channel0;
+extern DMA_HandleTypeDef handle_GPDMA1_Channel0;
+extern MDF_HandleTypeDef AdfHandle0;
+extern DMA2D_HandleTypeDef hdma2d;
+extern GPU2D_HandleTypeDef hgpu2d;
+extern DMA_HandleTypeDef handle_HPDMA1_Channel1;
+extern DMA_HandleTypeDef handle_HPDMA1_Channel0;
+extern JPEG_HandleTypeDef hjpeg;
+extern LTDC_HandleTypeDef hltdc;
+extern TIM_HandleTypeDef htim6;
+
+extern DMA_HandleTypeDef hDmaI2sTx;
+
+/* USER CODE BEGIN EV */
+
+/* USER CODE END EV */
+
+/******************************************************************************/
+/*           Cortex Processor Interruption and Exception Handlers          */
+/******************************************************************************/
+/**
+  * @brief This function handles Non maskable interrupt.
+  */
+void NMI_Handler(void)
+{
+  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+
+  /* USER CODE END NonMaskableInt_IRQn 0 */
+  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+   while (1)
+  {
+  }
+  /* USER CODE END NonMaskableInt_IRQn 1 */
+}
+
+/**
+  * @brief This function handles Hard fault interrupt.
+  */
+void HardFault_Handler(void)
+{
+  /* USER CODE BEGIN HardFault_IRQn 0 */
+
+  /* USER CODE END HardFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+    /* USER CODE END W1_HardFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Memory management fault.
+  */
+void MemManage_Handler(void)
+{
+  /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+
+  /* USER CODE END MemoryManagement_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+    /* USER CODE END W1_MemoryManagement_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Pre-fetch fault, memory access fault.
+  */
+void BusFault_Handler(void)
+{
+  /* USER CODE BEGIN BusFault_IRQn 0 */
+
+  /* USER CODE END BusFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+    /* USER CODE END W1_BusFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Undefined instruction or illegal state.
+  */
+void UsageFault_Handler(void)
+{
+  /* USER CODE BEGIN UsageFault_IRQn 0 */
+
+  /* USER CODE END UsageFault_IRQn 0 */
+  while (1)
+  {
+    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+    /* USER CODE END W1_UsageFault_IRQn 0 */
+  }
+}
+
+/**
+  * @brief This function handles Debug monitor.
+  */
+void DebugMon_Handler(void)
+{
+  /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+
+  /* USER CODE END DebugMonitor_IRQn 0 */
+  /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+
+  /* USER CODE END DebugMonitor_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32H7RSxx Peripheral Interrupt Handlers                                    */
+/* Add here the Interrupt Handlers for the used peripherals.                  */
+/* For the available peripheral interrupt handler names,                      */
+/* please refer to the startup file (startup_stm32h7rsxx.s).                    */
+/******************************************************************************/
+
+/**
+  * @brief This function handles EXTI line3 interrupt.
+  */
+void EXTI3_IRQHandler(void)
+{
+  /* USER CODE BEGIN EXTI3_IRQn 0 */
+
+  /* USER CODE END EXTI3_IRQn 0 */
+  HAL_GPIO_EXTI_IRQHandler(TP_IRQ_Pin);
+  /* USER CODE BEGIN EXTI3_IRQn 1 */
+
+  /* USER CODE END EXTI3_IRQn 1 */
+}
+
+/**
+  * @brief This function handles GPDMA1 Channel 0 global interrupt.
+  */
+void GPDMA1_Channel0_IRQHandler(void)
+{
+  /* USER CODE BEGIN GPDMA1_Channel0_IRQn 0 */
+
+  /* USER CODE END GPDMA1_Channel0_IRQn 0 */
+  HAL_DMA_IRQHandler(&handle_GPDMA1_Channel0);
+  /* USER CODE BEGIN GPDMA1_Channel0_IRQn 1 */
+
+  /* USER CODE END GPDMA1_Channel0_IRQn 1 */
+}
+
+void GPDMA1_Channel2_IRQHandler(void)
+{
+	BSP_AUDIO_OUT_IRQHandler(0, AUDIO_OUT_HEADPHONE);
+}
+
+/**
+  * @brief This function handles TIM6 global interrupt.
+  */
+void TIM6_IRQHandler(void)
+{
+  /* USER CODE BEGIN TIM6_IRQn 0 */
+
+  /* USER CODE END TIM6_IRQn 0 */
+  HAL_TIM_IRQHandler(&htim6);
+  /* USER CODE BEGIN TIM6_IRQn 1 */
+
+  /* USER CODE END TIM6_IRQn 1 */
+}
+
+/**
+  * @brief This function handles HPDMA1 Channel 0 global interrupt.
+  */
+void HPDMA1_Channel0_IRQHandler(void)
+{
+  /* USER CODE BEGIN HPDMA1_Channel0_IRQn 0 */
+
+  /* USER CODE END HPDMA1_Channel0_IRQn 0 */
+  HAL_DMA_IRQHandler(&handle_HPDMA1_Channel0);
+  /* USER CODE BEGIN HPDMA1_Channel0_IRQn 1 */
+
+  /* USER CODE END HPDMA1_Channel0_IRQn 1 */
+}
+
+/**
+  * @brief This function handles HPDMA1 Channel 1 global interrupt.
+  */
+void HPDMA1_Channel1_IRQHandler(void)
+{
+  /* USER CODE BEGIN HPDMA1_Channel1_IRQn 0 */
+
+  /* USER CODE END HPDMA1_Channel1_IRQn 0 */
+  HAL_DMA_IRQHandler(&handle_HPDMA1_Channel1);
+  /* USER CODE BEGIN HPDMA1_Channel1_IRQn 1 */
+
+  /* USER CODE END HPDMA1_Channel1_IRQn 1 */
+}
+
+/**
+  * @brief This function handles LTDC global interrupt.
+  */
+void LTDC_IRQHandler(void)
+{
+  /* USER CODE BEGIN LTDC_IRQn 0 */
+
+  /* USER CODE END LTDC_IRQn 0 */
+  HAL_LTDC_IRQHandler(&hltdc);
+  /* USER CODE BEGIN LTDC_IRQn 1 */
+
+  /* USER CODE END LTDC_IRQn 1 */
+}
+
+/**
+  * @brief This function handles DMA2D global interrupt.
+  */
+void DMA2D_IRQHandler(void)
+{
+  /* USER CODE BEGIN DMA2D_IRQn 0 */
+
+  /* USER CODE END DMA2D_IRQn 0 */
+  HAL_DMA2D_IRQHandler(&hdma2d);
+  /* USER CODE BEGIN DMA2D_IRQn 1 */
+
+  /* USER CODE END DMA2D_IRQn 1 */
+}
+
+/**
+  * @brief This function handles JPEG global interrupt.
+  */
+void JPEG_IRQHandler(void)
+{
+  /* USER CODE BEGIN JPEG_IRQn 0 */
+
+  /* USER CODE END JPEG_IRQn 0 */
+  HAL_JPEG_IRQHandler(&hjpeg);
+  /* USER CODE BEGIN JPEG_IRQn 1 */
+
+  /* USER CODE END JPEG_IRQn 1 */
+}
+
+/**
+  * @brief This function handles ADF1 Filter 0 global Interrupt.
+  */
+void ADF1_FLT0_IRQHandler(void)
+{
+  /* USER CODE BEGIN ADF1_FLT0_IRQn 0 */
+
+  /* USER CODE END ADF1_FLT0_IRQn 0 */
+  HAL_MDF_IRQHandler(&AdfHandle0);
+  /* USER CODE BEGIN ADF1_FLT0_IRQn 1 */
+
+  /* USER CODE END ADF1_FLT0_IRQn 1 */
+}
+
+/**
+  * @brief This function handles GPU2D global interrupt.
+  */
+void GPU2D_IRQHandler(void)
+{
+  /* USER CODE BEGIN GPU2D_IRQn 0 */
+
+  /* USER CODE END GPU2D_IRQn 0 */
+  HAL_GPU2D_IRQHandler(&hgpu2d);
+  /* USER CODE BEGIN GPU2D_IRQn 1 */
+
+  /* USER CODE END GPU2D_IRQn 1 */
+}
+
+/**
+  * @brief This function handles GPU2D Error interrupt.
+  */
+void GPU2D_ER_IRQHandler(void)
+{
+  /* USER CODE BEGIN GPU2D_ER_IRQn 0 */
+
+  /* USER CODE END GPU2D_ER_IRQn 0 */
+  HAL_GPU2D_ER_IRQHandler(&hgpu2d);
+  /* USER CODE BEGIN GPU2D_ER_IRQn 1 */
+
+  /* USER CODE END GPU2D_ER_IRQn 1 */
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */

Appli/Core/Src/system_stm32h7rsxx.c

@@ -0,0 +1,304 @@
+/**
+  ******************************************************************************
+  * @file    system_stm32h7rsxx.c
+  * @author  MCD Application Team
+  * @brief   CMSIS Cortex-M7 Device Peripheral Access Layer System Source File
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2022 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  *
+  *   This file provides two functions and one global variable to be called from
+  *   user application:
+  *      - SystemInit(): This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32h7rsxx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (sys_cpu_ck), it can
+  *                                  be used by the user application to setup the
+  *                                  SysTick timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  *   After each device reset the HSI (64 MHz) is used as system clock source.
+  *   Then SystemInit() function is called, in "startup_stm32h7rsxx.s" file, to
+  *   optionally configure the system clock before to branch to main program.
+  *
+  *=============================================================================
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup STM32H7RSxx_System
+  * @{
+  */
+
+/** @addtogroup STM32H7RSxx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32h7rsxx.h"
+#include <math.h>
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32H7RSxx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32H7RSxx_System_Private_Defines
+  * @{
+  */
+#if !defined  (HSE_VALUE)
+  #define HSE_VALUE    24000000UL /*!< Value of the High-Speed External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    64000000UL /*!< Value of the High-Speed Internal oscillator in Hz */
+#endif /* HSI_VALUE */
+
+#if !defined  (CSI_VALUE)
+  #define CSI_VALUE    4000000UL  /*!< Value of the Low-power Internal oscillator in Hz */
+#endif /* CSI_VALUE */
+
+/* Note: Following vector table addresses must be defined in line with linker
+         configuration. */
+/*!< Uncomment the following line or define USER_VECT_TAB_ADDRESS at compiler level if you need
+     to relocate the vector table anywhere in Flash or Sram, else the vector table is kept at
+	 the automatic remap of the selected boot address */
+/* #define USER_VECT_TAB_ADDRESS */
+
+#if defined(USER_VECT_TAB_ADDRESS)
+/*!< Uncomment the following line or define VECT_TAB_SRAM at compiler level if you need
+     to relocate your vector Table in Sram else user remap will be done in Flash. */
+/* #define VECT_TAB_SRAM */
+
+#if defined(VECT_TAB_SRAM)
+#if !defined(VECT_TAB_BASE_ADDRESS)
+#define VECT_TAB_BASE_ADDRESS   ITCM_BASE       /*!< Vector Table base address field.
+                                                     This value must be a multiple of 0x400. */
+#endif
+#if !defined(VECT_TAB_OFFSET)
+#define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table base offset field.
+                                                     This value must be a multiple of 0x400. */
+#endif
+#else
+#if !defined(VECT_TAB_BASE_ADDRESS)
+#define VECT_TAB_BASE_ADDRESS   FLASH_BASE      /*!< Vector Table base address field.
+                                                     This value must be a multiple of 0x400. */
+#endif
+#if !defined(VECT_TAB_OFFSET)
+#define VECT_TAB_OFFSET         0x00000000U     /*!< Vector Table base offset field.
+                                                     This value must be a multiple of 0x400. */
+#endif
+#endif /* VECT_TAB_SRAM */
+#endif /* USER_VECT_TAB_ADDRESS */
+
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/** @addtogroup STM32H7RSxx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32H7RSxx_System_Private_Variables
+  * @{
+  */
+  /* The SystemCoreClock variable is updated in two ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the first function listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
+uint32_t SystemCoreClock = HSI_VALUE;
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32H7RSxx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32H7RSxx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system.
+  * @retval None
+  */
+
+void SystemInit(void)
+{
+  /* Configure the Vector Table location -------------------------------------*/
+#if defined(USER_VECT_TAB_ADDRESS)
+  SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET;
+#endif
+
+  /* FPU settings ------------------------------------------------------------*/
+#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+  SCB->CPACR |= ((3UL << 20U)|(3UL << 22U));  /* set CP10 and CP11 Full Access */
+#endif
+}
+
+/**
+  * @brief  Update SystemCoreClock variable according to RCC registers values.
+  *         The SystemCoreClock variable contains the core clock (sys_cpu_ck), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
+  *
+  *           - If SYSCLK source is CSI, SystemCoreClock will contain the CSI_VALUE(**)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSI_VALUE(*)
+  *             or CSI_VALUE(**) or HSE_VALUE(***) multiplied/divided by the PLL factors.
+  *
+  *         (*) HSI_VALUE is a constant defined in stm32h7rsxx_hal.h file (default value
+  *              64 MHz) but the real value may vary depending on the variations
+  *              in voltage and temperature.
+  *
+  *         (**) CSI_VALUE is a constant defined in stm32h7rsxx_hal.h file (default value
+  *             4 MHz) but the real value may vary depending on the variations
+  *             in voltage and temperature.
+  *
+  *         (***) HSE_VALUE is a constant defined in stm32h7rsxx_hal.h file (default value
+  *              24 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t sysclk, hsivalue, pllsource, pllm, pllp, core_presc;
+  float_t pllfracn, pllvco;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  switch (RCC->CFGR & RCC_CFGR_SWS)
+  {
+  case 0x00:  /* HSI used as system clock source (default after reset) */
+    sysclk = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV) >> RCC_CR_HSIDIV_Pos));
+    break;
+
+  case 0x08:  /* CSI used as system clock source */
+    sysclk = CSI_VALUE;
+    break;
+
+  case 0x10:  /* HSE used as system clock source */
+    sysclk = HSE_VALUE;
+    break;
+
+  case 0x18:  /* PLL1 used as system clock  source */
+    /* PLL1_VCO = (HSE_VALUE or HSI_VALUE or CSI_VALUE/ PLLM) * PLLN
+       SYSCLK = PLL1_VCO / PLL1R
+       */
+    pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC);
+    pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos)  ;
+    if ((RCC->PLLCFGR & RCC_PLLCFGR_PLL1FRACEN) != 0U)
+    {
+      pllfracn = (float_t)(uint32_t)(((RCC->PLL1FRACR & RCC_PLL1FRACR_FRACN)>> RCC_PLL1FRACR_FRACN_Pos));
+    }
+    else
+    {
+      pllfracn = (float_t)0U;
+    }
+
+    if (pllm != 0U)
+    {
+      switch (pllsource)
+      {
+      case 0x02:  /* HSE used as PLL1 clock source */
+        pllvco = ((float_t)HSE_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR1 & RCC_PLL1DIVR1_DIVN) + (pllfracn/(float_t)0x2000) +(float_t)1 );
+        break;
+
+      case 0x01:  /* CSI used as PLL1 clock source */
+        pllvco = ((float_t)CSI_VALUE / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR1 & RCC_PLL1DIVR1_DIVN) + (pllfracn/(float_t)0x2000) +(float_t)1 );
+        break;
+
+      case 0x00:  /* HSI used as PLL1 clock source */
+      default:
+        hsivalue = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV) >> RCC_CR_HSIDIV_Pos));
+        pllvco = ( (float_t)hsivalue / (float_t)pllm) * ((float_t)(uint32_t)(RCC->PLL1DIVR1 & RCC_PLL1DIVR1_DIVN) + (pllfracn/(float_t)0x2000) +(float_t)1 );
+        break;
+      }
+      pllp = (((RCC->PLL1DIVR1 & RCC_PLL1DIVR1_DIVP) >> RCC_PLL1DIVR1_DIVP_Pos) + 1U ) ;
+      sysclk =  (uint32_t)(float_t)(pllvco/(float_t)pllp);
+    }
+    else
+    {
+      sysclk = 0U;
+    }
+    break;
+
+  default:  /* Unexpected, default to HSI used as system clock source (default after reset) */
+    sysclk = (HSI_VALUE >> ((RCC->CR & RCC_CR_HSIDIV) >> RCC_CR_HSIDIV_Pos));
+    break;
+  }
+
+  /* system clock frequency : CM7 CPU frequency  */
+  core_presc = (RCC->CDCFGR & RCC_CDCFGR_CPRE);
+  if (core_presc >= 8U)
+  {
+    SystemCoreClock = (sysclk >> (core_presc - RCC_CDCFGR_CPRE_3 + 1U));
+  }
+  else
+  {
+    SystemCoreClock = sysclk;
+  }
+}
+
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */