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Drivers/STM32H7RSxx_BSP/.DS_Store
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Drivers/STM32H7RSxx_BSP/Components/Common/LICENSE.md
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Copyright 2014-2021 STMicroelectronics.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation and/or
other materials provided with the distribution.
3. Neither the name of the copyright holder nor the names of its contributors
may be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Drivers/STM32H7RSxx_BSP/Components/Common/LICENSE.txt
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This software component is provided to you as part of a software package and
applicable license terms are in the Package_license file. If you received this
software component outside of a package or without applicable license terms,
the terms of the BSD-3-Clause license shall apply.
You may obtain a copy of the BSD-3-Clause at:
https://opensource.org/licenses/BSD-3-Clause
Drivers/STM32H7RSxx_BSP/Components/Common/Release_Notes.html
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<!DOCTYPE html>
<html xmlns="http://www.w3.org/1999/xhtml" lang="en" xml:lang="en">
<head>
<meta charset="utf-8" />
<meta name="generator" content="pandoc" />
<meta name="viewport" content="width=device-width, initial-scale=1.0, user-scalable=yes" />
<title>Release Notes for BSP Common Components Drivers</title>
<style type="text/css">
code{white-space: pre-wrap;}
span.smallcaps{font-variant: small-caps;}
span.underline{text-decoration: underline;}
div.column{display: inline-block; vertical-align: top; width: 50%;}
</style>
<link rel="stylesheet" href="_htmresc/mini-st.css" />
<!--[if lt IE 9]>
<script src="//cdnjs.cloudflare.com/ajax/libs/html5shiv/3.7.3/html5shiv-printshiv.min.js"></script>
<![endif]-->
<link rel="icon" type="image/x-icon" href="_htmresc/favicon.png" />
</head>
<body>
<div class="row">
<div class="col-sm-12 col-lg-4">
<center>
<h1 id="release-notes-for-bsp-common-components-drivers"><small>Release Notes for</small> <mark>BSP Common Components Drivers</mark></h1>
<p>Copyright © 2014-2023 STMicroelectronics<br />
</p>
<a href="https://www.st.com" class="logo"><img src="_htmresc/st_logo.png" alt="ST logo" /></a>
</center>
<h1 id="purpose">Purpose</h1>
<p>This directory contains the BSP Common components drivers.</p>
</div>
<div class="col-sm-12 col-lg-8">
<h1 id="update-history">Update History</h1>
<div class="collapse">
<input type="checkbox" id="collapse-section20" checked aria-hidden="true"> <label for="collapse-section20" aria-hidden="true">V7.3.0 / 28-September-2023</label>
<div>
<h2 id="main-changes">Main Changes</h2>
<h3 id="component-release">Component release</h3>
<ul>
<li>Add Frequency, Exposure and Gain configuration function pointers in camera.h</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section19" aria-hidden="true"> <label for="collapse-section19" aria-hidden="true">V7.2.1 / 16-November-2021</label>
<div>
<h2 id="main-changes-1">Main Changes</h2>
<h3 id="component-release-1">Component release</h3>
<ul>
<li>Update licensing</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section18" aria-hidden="true"> <label for="collapse-section18" aria-hidden="true">V7.2.0 / 11-October-2021</label>
<div>
<h2 id="main-changes-2">Main Changes</h2>
<h3 id="component-release-2">Component release</h3>
<ul>
<li>Add hybrid_sensor.h to support hybrid (env and motion) sensors</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section17" aria-hidden="true"> <label for="collapse-section17" aria-hidden="true">V7.1.0 / 18-Juin-2021</label>
<div>
<h2 id="main-changes-3">Main Changes</h2>
<h3 id="component-release-3">Component release</h3>
<ul>
<li>Add ranging_sensor.h to support ranging sensors</li>
<li>Add light_sensor.h to support ambient light sensors</li>
<li>Rename UTILS_LCD_Drv_t structure into LCD_UTILS_Drv_t</li>
<li>Code spelling and formatting</li>
</ul>
<h2 id="backward-compatibility">Backward Compatibility</h2>
<ul>
<li>This release breaks compatibility with previous versions.</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section16" aria-hidden="true"> <label for="collapse-section16" aria-hidden="true">V7.0.0 / 25-February-2020</label>
<div>
<h2 id="main-changes-4">Main Changes</h2>
<h3 id="component-release-4">Component release</h3>
<ul>
<li>Rename GUI_Drv_t structure into UTILS_LCD_Drv_t</li>
</ul>
<h2 id="backward-compatibility-1">Backward Compatibility</h2>
<ul>
<li>This release breaks compatibility with previous versions.</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section15" aria-hidden="true"> <label for="collapse-section15" aria-hidden="true">V6.0.1 / 15-October-2019</label>
<div>
<h2 id="main-changes-5">Main Changes</h2>
<h3 id="component-release-5">Component release</h3>
<ul>
<li>Update st_logo.png inclusion path in Release notes.</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section14" aria-hidden="true"> <label for="collapse-section14" aria-hidden="true">V6.0.0 / 12-April-2019</label>
<div>
<h2 id="main-changes-6">Main Changes</h2>
<h3 id="component-release-6">Component release</h3>
<p>Official release of BSP Common components drivers in line with STM32Cube BSP drivers development guidelines (UM2298).</p>
<h2 id="backward-compatibility-2">Backward Compatibility</h2>
<p>This release breaks compatibility with previous versions.</p>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section13" aria-hidden="true"> <label for="collapse-section13" aria-hidden="true">V5.1.1 / 31-August-2018</label>
<div>
<h2 id="main-changes-7">Main Changes</h2>
<p>Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)<br />
Correct sensor names in headers files hsensor.h and psensor.h</p>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section12" aria-hidden="true"> <label for="collapse-section12" aria-hidden="true">V5.1.0 / 21-November-2017</label>
<div>
<h2 id="main-changes-8">Main Changes</h2>
<p>Add dpredriver.h: support of DP redriver class<br />
Add pwrmon.h: support of power monitor class<br />
Add usbtypecswitch.h: support of USB type C switch class</p>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section11" aria-hidden="true"> <label for="collapse-section11" aria-hidden="true">V5.0.0 / 01-March-2017</label>
<div>
<h2 id="main-changes-9">Main Changes</h2>
<p>Add hsensor.h: support of humidity class<br />
Add psensor.h: support of pressure class<br />
Update tsensor.h: Temperature can be negative<br />
Update accelero.h: LowPower API can enable or disable the low power mode<br />
Update magneto.h: LowPower API can enable or disable the low power mode</p>
<h2 id="backward-compatibility-3">Backward Compatibility</h2>
<p>This release breaks compatibility with previous versions.</p>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section10" aria-hidden="true"> <label for="collapse-section10" aria-hidden="true">V4.0.1 / 21-July-2015</label>
<div>
<h2 id="main-changes-10">Main Changes</h2>
<p>tsensor.h: Fix compilation issue on <em>TSENSOR_InitTypeDef</em></p>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section9" aria-hidden="true"> <label for="collapse-section9" aria-hidden="true">V4.0.0 / 22-June-2015</label>
<div>
<h2 id="main-changes-11">Main Changes</h2>
<p>accelero.h: add <em>DeInit</em> field in <em>ACCELERO_DrvTypeDef</em> structure<br />
audio.h: add <em>DeInit</em> field in <em>AUDIO_DrvTypeDef</em> structure<br />
idd.h:</p>
<ul>
<li>add <em>Shunt0StabDelay</em>, <em>Shunt1StabDelay</em>, <em>Shunt2StabDelay</em>, <em>Shunt3StabDelay</em>, <em>Shunt4StabDelay</em> and <em>ShuntNbOnBoard</em> fields in <em>IDD_ConfigTypeDef</em> structure<br />
</li>
<li>rename <em>ShuntNumber</em> field to <em>ShuntNbUsed</em> in <em>IDD_ConfigTypeDef</em> structure</li>
</ul>
<p>magneto.h: add <em>DeInit</em> field in <em>MAGNETO_DrvTypeDef</em> structure</p>
<h2 id="backward-compatibility-4">Backward Compatibility</h2>
<p>This release breaks compatibility with previous versions.</p>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section8" aria-hidden="true"> <label for="collapse-section8" aria-hidden="true">V3.0.0 / 28-April-2015</label>
<div>
<h2 id="main-changes-12">Main Changes</h2>
<p>accelero.h: add <em>LowPower</em> field in <em>ACCELERO_DrvTypeDef</em> structure<br />
magneto.h: add <em>LowPower</em> field in <em>MAGNETO_DrvTypeDef</em> structure<br />
gyro.h: add <em>DeInit</em> and <em>LowPower</em> fields in <em>GYRO_DrvTypeDef</em> structure<br />
camera.h: add CAMERA_COLOR_EFFECT_NONE define<br />
idd.h:</p>
<ul>
<li>add <em>MeasureNb</em>, <em>DeltaDelayUnit</em> and <em>DeltaDelayValue</em> fields in <em>IDD_ConfigTypeDef</em> structure<br />
</li>
<li>rename <em>PreDelay</em> field to <em>PreDelayUnit</em> in <em>IDD_ConfigTypeDef</em> structure</li>
</ul>
<h2 id="backward-compatibility-5">Backward Compatibility</h2>
<p>This release breaks compatibility with previous versions.</p>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section7" aria-hidden="true"> <label for="collapse-section7" aria-hidden="true">V2.2.0 / 09-February-2015</label>
<div>
<h2 id="main-changes-13">Main Changes</h2>
<p>Magnetometer driver function prototypes added (magneto.h file)<br />
Update “idd.h” file to provide DeInit() and WakeUp() services in IDD current measurement driver</p>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section6" aria-hidden="true"> <label for="collapse-section6" aria-hidden="true">V2.1.0 / 06-February-2015</label>
<div>
<h2 id="main-changes-14">Main Changes</h2>
<p>IDD current measurement driver function prototypes added (idd.h file)<br />
io.h: add new typedef enum IO_PinState with IO_PIN_RESET and IO_PIN_SET values</p>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section5" aria-hidden="true"> <label for="collapse-section5" aria-hidden="true">V2.0.0 / 15-December-2014</label>
<div>
<h2 id="main-changes-15">Main Changes</h2>
<p>Update “io.h” file to support MFX (Multi Function eXpander) device available on some STM32 boards</p>
<ul>
<li>add new entries for <em>IO_ModeTypedef</em> enumeration structure</li>
<li>update the <em>IO_DrvTypeDef</em> structure</li>
<li>Update all return values and function parameters to uint32_t</li>
<li>Add a return value for <em>Config</em> field</li>
</ul>
<h2 id="backward-compatibility-6">Backward Compatibility</h2>
<p>This release breaks compatibility with previous versions.</p>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section4" aria-hidden="true"> <label for="collapse-section4" aria-hidden="true">V1.2.1 / 02-December-2014</label>
<div>
<h2 id="main-changes-16">Main Changes</h2>
<p>gyro.h: change “__GIRO_H” by “__GYRO_H” to fix compilation issue under Mac OS</p>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section3" aria-hidden="true"> <label for="collapse-section3" aria-hidden="true">V1.2.0 / 18-June-2014</label>
<div>
<h2 id="main-changes-17">Main Changes</h2>
<p>EPD (E Paper Display) driver function prototype added (epd.h file)</p>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section2" aria-hidden="true"> <label for="collapse-section2" aria-hidden="true">V1.1.0 / 21-March-2014</label>
<div>
<h2 id="main-changes-18">Main Changes</h2>
<p>Temperature Sensor driver function prototype added</p>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" aria-hidden="true">V1.0.0 / 18-February-2014</label>
<div>
<h2 id="main-changes-19">Main Changes</h2>
<p>First official release with Accelerometer, Audio, Camera, Gyroscope, IO, LCD and Touch Screen drivers function prototypes</p>
</div>
</div>
</div>
</div>
<footer class="sticky">
For complete documentation on <mark>STM32 Microcontrollers</mark> , visit: <a href="http://www.st.com/STM32">http://www.st.com/STM32</a>
</footer>
</body>
</html>
Drivers/STM32H7RSxx_BSP/Components/Common/Release_Notes.md
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---
pagetitle: Release Notes for BSP Common Components Drivers
lang: en
header-includes: <link rel="icon" type="image/x-icon" href="_htmresc/favicon.png" />
---
::: {.row}
::: {.col-sm-12 .col-lg-4}
<center>
# <small>Release Notes for</small> <mark>BSP Common Components Drivers</mark>
Copyright &copy; 2014-2023 STMicroelectronics\
[![ST logo](_htmresc/st_logo.png)](https://www.st.com){.logo}
</center>
# Purpose
This directory contains the BSP Common components drivers.
:::
::: {.col-sm-12 .col-lg-8}
# Update History
::: {.collapse}
<input type="checkbox" id="collapse-section20" checked aria-hidden="true">
<label for="collapse-section20" aria-hidden="true">V7.3.0 / 28-September-2023</label>
<div>
## Main Changes
### Component release
- Add Frequency, Exposure and Gain configuration function pointers in camera.h
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section19" aria-hidden="true">
<label for="collapse-section19" aria-hidden="true">V7.2.1 / 16-November-2021</label>
<div>
## Main Changes
### Component release
- Update licensing
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section18" aria-hidden="true">
<label for="collapse-section18" aria-hidden="true">V7.2.0 / 11-October-2021</label>
<div>
## Main Changes
### Component release
- Add hybrid_sensor.h to support hybrid (env and motion) sensors
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section17" aria-hidden="true">
<label for="collapse-section17" aria-hidden="true">V7.1.0 / 18-Juin-2021</label>
<div>
## Main Changes
### Component release
- Add ranging_sensor.h to support ranging sensors
- Add light_sensor.h to support ambient light sensors
- Rename UTILS_LCD_Drv_t structure into LCD_UTILS_Drv_t
- Code spelling and formatting
## Backward Compatibility
- This release breaks compatibility with previous versions.
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section16" aria-hidden="true">
<label for="collapse-section16" aria-hidden="true">V7.0.0 / 25-February-2020</label>
<div>
## Main Changes
### Component release
- Rename GUI_Drv_t structure into UTILS_LCD_Drv_t
## Backward Compatibility
- This release breaks compatibility with previous versions.
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section15" aria-hidden="true">
<label for="collapse-section15" aria-hidden="true">V6.0.1 / 15-October-2019</label>
<div>
## Main Changes
### Component release
- Update st_logo.png inclusion path in Release notes.
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section14" aria-hidden="true">
<label for="collapse-section14" aria-hidden="true">V6.0.0 / 12-April-2019</label>
<div>
## Main Changes
### Component release
Official release of BSP Common components drivers in line with STM32Cube BSP drivers development guidelines (UM2298).
## Backward Compatibility
This release breaks compatibility with previous versions.
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section13" aria-hidden="true">
<label for="collapse-section13" aria-hidden="true">V5.1.1 / 31-August-2018</label>
<div>
## Main Changes
Reformat the BSD 3-Clause license declaration in the files header (replace license terms by a web reference to OSI website where those terms lie)
Correct sensor names in headers files hsensor.h and psensor.h
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section12" aria-hidden="true">
<label for="collapse-section12" aria-hidden="true">V5.1.0 / 21-November-2017</label>
<div>
## Main Changes
Add dpredriver.h: support of DP redriver class
Add pwrmon.h: support of power monitor class
Add usbtypecswitch.h: support of USB type C switch class
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section11" aria-hidden="true">
<label for="collapse-section11" aria-hidden="true">V5.0.0 / 01-March-2017</label>
<div>
## Main Changes
Add hsensor.h: support of humidity class
Add psensor.h: support of pressure class
Update tsensor.h: Temperature can be negative
Update accelero.h: LowPower API can enable or disable the low power mode
Update magneto.h: LowPower API can enable or disable the low power mode
## Backward Compatibility
This release breaks compatibility with previous versions.
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section10" aria-hidden="true">
<label for="collapse-section10" aria-hidden="true">V4.0.1 / 21-July-2015</label>
<div>
## Main Changes
tsensor.h: Fix compilation issue on *TSENSOR_InitTypeDef*
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section9" aria-hidden="true">
<label for="collapse-section9" aria-hidden="true">V4.0.0 / 22-June-2015</label>
<div>
## Main Changes
accelero.h: add *DeInit* field in *ACCELERO_DrvTypeDef* structure
audio.h: add *DeInit* field in *AUDIO_DrvTypeDef* structure
idd.h:
- add *Shunt0StabDelay*, *Shunt1StabDelay*, *Shunt2StabDelay*, *Shunt3StabDelay*, *Shunt4StabDelay* and *ShuntNbOnBoard* fields in *IDD_ConfigTypeDef* structure
- rename *ShuntNumber* field to *ShuntNbUsed* in *IDD_ConfigTypeDef* structure
magneto.h: add *DeInit* field in *MAGNETO_DrvTypeDef* structure
## Backward Compatibility
This release breaks compatibility with previous versions.
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section8" aria-hidden="true">
<label for="collapse-section8" aria-hidden="true">V3.0.0 / 28-April-2015</label>
<div>
## Main Changes
accelero.h: add *LowPower* field in *ACCELERO_DrvTypeDef* structure
magneto.h: add *LowPower* field in *MAGNETO_DrvTypeDef* structure
gyro.h: add *DeInit* and *LowPower* fields in *GYRO_DrvTypeDef* structure
camera.h: add CAMERA_COLOR_EFFECT_NONE define
idd.h:
- add *MeasureNb*, *DeltaDelayUnit* and *DeltaDelayValue* fields in *IDD_ConfigTypeDef* structure
- rename *PreDelay* field to *PreDelayUnit* in *IDD_ConfigTypeDef* structure
## Backward Compatibility
This release breaks compatibility with previous versions.
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section7" aria-hidden="true">
<label for="collapse-section7" aria-hidden="true">V2.2.0 / 09-February-2015</label>
<div>
## Main Changes
Magnetometer driver function prototypes added (magneto.h file)
Update "idd.h" file to provide DeInit() and WakeUp() services in IDD current measurement driver
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section6" aria-hidden="true">
<label for="collapse-section6" aria-hidden="true">V2.1.0 / 06-February-2015</label>
<div>
## Main Changes
IDD current measurement driver function prototypes added (idd.h file)
io.h: add new typedef enum IO_PinState with IO_PIN_RESET and IO_PIN_SET values
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section5" aria-hidden="true">
<label for="collapse-section5" aria-hidden="true">V2.0.0 / 15-December-2014</label>
<div>
## Main Changes
Update "io.h" file to support MFX (Multi Function eXpander) device available on some STM32 boards
- add new entries for *IO_ModeTypedef* enumeration structure
- update the *IO_DrvTypeDef* structure
- Update all return values and function parameters to uint32_t
- Add a return value for *Config* field
## Backward Compatibility
This release breaks compatibility with previous versions.
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section4" aria-hidden="true">
<label for="collapse-section4" aria-hidden="true">V1.2.1 / 02-December-2014</label>
<div>
## Main Changes
gyro.h: change “__GIRO_H” by “__GYRO_H” to fix compilation issue under Mac OS
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section3" aria-hidden="true">
<label for="collapse-section3" aria-hidden="true">V1.2.0 / 18-June-2014</label>
<div>
## Main Changes
EPD (E Paper Display) driver function prototype added (epd.h file)
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section2" aria-hidden="true">
<label for="collapse-section2" aria-hidden="true">V1.1.0 / 21-March-2014</label>
<div>
## Main Changes
Temperature Sensor driver function prototype added
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section1" aria-hidden="true">
<label for="collapse-section1" aria-hidden="true">V1.0.0 / 18-February-2014</label>
<div>
## Main Changes
First official release with Accelerometer, Audio, Camera, Gyroscope, IO, LCD and Touch Screen drivers function prototypes
</div>
:::
:::
:::
<footer class="sticky">
For complete documentation on <mark>STM32 Microcontrollers</mark> ,
visit: [http://www.st.com/STM32](http://www.st.com/STM32)
</footer>
Drivers/STM32H7RSxx_BSP/Components/Common/_htmresc/Add button.svg
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<?xml version="1.0" encoding="UTF-8"?>
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Drivers/STM32H7RSxx_BSP/Components/Common/audio.h
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/**
******************************************************************************
* @file audio.h
* @author MCD Application Team
* @brief This header file contains the common defines and functions prototypes
* for the Audio driver.
******************************************************************************
* @attention
*
* Copyright (c) 2018 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef AUDIO_H
#define AUDIO_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include <stdint.h>
/** @addtogroup BSP
* @{
*/
/** @addtogroup Components
* @{
*/
/** @addtogroup AUDIO
* @{
*/
/** @defgroup AUDIO_Exported_Constants
* @{
*/
/**
* @}
*/
/** @defgroup AUDIO_Exported_Types
* @{
*/
/** @defgroup AUDIO_Driver_structure Audio Driver structure
* @{
*/
typedef struct
{
int32_t (*Init)(void *, void *);
int32_t (*DeInit)(void *);
int32_t (*ReadID)(void *, uint32_t *);
int32_t (*Play)(void *);
int32_t (*Pause)(void *);
int32_t (*Resume)(void *);
int32_t (*Stop)(void *, uint32_t);
int32_t (*SetFrequency)(void *, uint32_t);
int32_t (*GetFrequency)(void *);
int32_t (*SetVolume)(void *, uint32_t, uint8_t);
int32_t (*GetVolume)(void *, uint32_t, uint8_t *);
int32_t (*SetMute)(void *, uint32_t);
int32_t (*SetOutputMode)(void *, uint32_t);
int32_t (*SetResolution)(void *, uint32_t);
int32_t (*GetResolution)(void *, uint32_t *);
int32_t (*SetProtocol)(void *, uint32_t);
int32_t (*GetProtocol)(void *, uint32_t *);
int32_t (*Reset)(void *);
} AUDIO_Drv_t;
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* AUDIO_H */
Drivers/STM32H7RSxx_BSP/Components/Common/camera.h
+106
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/**
******************************************************************************
* @file camera.h
* @author MCD Application Team
* @brief This header file contains the common defines and functions prototypes
* for the camera driver.
******************************************************************************
* @attention
*
* Copyright (c) 2018 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef CAMERA_H
#define CAMERA_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include <stdint.h>
/** @addtogroup BSP
* @{
*/
/** @addtogroup Components
* @{
*/
/** @addtogroup CAMERA
* @{
*/
/** @defgroup CAMERA_Exported_Types
* @{
*/
/**
* @}
*/
/** @defgroup CAMERA_Driver_structure Camera Driver structure
* @{
*/
typedef struct
{
int32_t (*Init)(void *, uint32_t, uint32_t);
int32_t (*DeInit)(void *);
int32_t (*ReadID)(void *, uint32_t *);
int32_t (*GetCapabilities)(void *, void *);
int32_t (*SetLightMode)(void *, uint32_t);
int32_t (*SetColorEffect)(void *, uint32_t);
int32_t (*SetBrightness)(void *, int32_t);
int32_t (*SetSaturation)(void *, int32_t);
int32_t (*SetContrast)(void *, int32_t);
int32_t (*SetHueDegree)(void *, int32_t);
int32_t (*MirrorFlipConfig)(void *, uint32_t);
int32_t (*ZoomConfig)(void *, uint32_t);
int32_t (*SetResolution)(void *, uint32_t);
int32_t (*GetResolution)(void *, uint32_t *);
int32_t (*SetPixelFormat)(void *, uint32_t);
int32_t (*GetPixelFormat)(void *, uint32_t *);
int32_t (*NightModeConfig)(void *, uint32_t);
int32_t (*SetFrequency)(void *, int32_t);
int32_t (*SetGain)(void *, int32_t);
int32_t (*SetExposure)(void *, int32_t);
} CAMERA_Drv_t;
/**
* @}
*/
/** @defgroup CAMERA_Exported_Constants
* @{
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* CAMERA_H */
Drivers/STM32H7RSxx_BSP/Components/Common/dpredriver.h
+102
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/**
******************************************************************************
* @file dpredriver.h
* @author MCD Application Team
* @brief This header file contains the functions prototypes for the
* DisplayPort Linear Redriver.
******************************************************************************
* @attention
*
* Copyright (c) 2018 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __DPREDRIVER_H
#define __DPREDRIVER_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include <stdint.h>
/** @addtogroup BSP
* @{
*/
/** @addtogroup Components
* @{
*/
/** @addtogroup DPREDRIVER
* @{
*/
/** @defgroup DPREDRIVER_Exported_Types
* @{
*/
/** @defgroup DPREDRIVER_Channel_Identifier Channel Identifier
* @{
*/
typedef enum
{
CHANNEL_DP0 = 0,
CHANNEL_DP1,
CHANNEL_DP2,
CHANNEL_DP3,
CHANNEL_RX1,
CHANNEL_RX2,
CHANNEL_SSTX
} DPREDRIVER_ChannelId_t;
/**
* @}
*/
/** @defgroup DPREDRIVER_Driver_structure DisplayPort Linear Redriver Driver structure
* @{
*/
typedef struct
{
uint32_t (*Init)(uint16_t);
void (*DeInit)(uint16_t);
uint32_t (*PowerOn)(uint16_t);
uint32_t (*PowerOff)(uint16_t);
uint32_t (*SetEQGain)(uint16_t, DPREDRIVER_ChannelId_t, uint8_t);
uint32_t (*EnableChannel)(uint16_t, DPREDRIVER_ChannelId_t);
uint32_t (*DisableChannel)(uint16_t, DPREDRIVER_ChannelId_t);
} DPREDRIVER_Drv_t;
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __DPREDRIVER_H */
Drivers/STM32H7RSxx_BSP/Components/Common/env_sensor.h
+95
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/**
******************************************************************************
* @file env_sensor.h
* @author MCD Application Team
* @brief This header file contains the functions prototypes for the
* environmental sensor driver
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef ENV_SENSOR_H
#define ENV_SENSOR_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include <stdint.h>
/** @addtogroup BSP BSP
* @{
*/
/** @addtogroup COMPONENTS COMPONENTS
* @{
*/
/** @addtogroup COMMON COMMON
* @{
*/
/** @addtogroup ENV_SENSOR ENV SENSOR
* @{
*/
/** @addtogroup ENV_SENSOR_Public_Types ENV SENSOR Public types
* @{
*/
/**
* @brief ENV SENSOR driver structure definition
*/
typedef struct
{
int32_t (*Init)(void *);
int32_t (*DeInit)(void *);
int32_t (*ReadID)(void *, uint8_t *);
int32_t (*GetCapabilities)(void *, void *);
} ENV_SENSOR_CommonDrv_t;
typedef struct
{
int32_t (*Enable)(void *);
int32_t (*Disable)(void *);
int32_t (*GetOutputDataRate)(void *, float *);
int32_t (*SetOutputDataRate)(void *, float);
int32_t (*GetValue)(void *, float *);
} ENV_SENSOR_FuncDrv_t;
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* ENV_SENSOR_H */
Drivers/STM32H7RSxx_BSP/Components/Common/epd.h
+94
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/**
******************************************************************************
* @file epd.h
* @author MCD Application Team
* @brief This file contains all the functions prototypes for the
* EPD (E Paper Display) driver.
******************************************************************************
* @attention
*
* Copyright (c) 2015 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __EPD_H
#define __EPD_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include <stdint.h>
/** @addtogroup BSP
* @{
*/
/** @addtogroup Components
* @{
*/
/** @addtogroup Common
* @{
*/
/** @addtogroup EPD
* @{
*/
/** @defgroup EPD_Exported_Types
* @{
*/
/** @defgroup EPD_Driver_structure E Paper Display Driver structure
* @{
*/
typedef struct
{
void (*Init)(void);
void (*WritePixel)(uint8_t);
/* Optimized operation */
void (*SetDisplayWindow)(uint16_t, uint16_t, uint16_t, uint16_t);
void (*RefreshDisplay)(void);
void (*CloseChargePump)(void);
uint16_t (*GetEpdPixelWidth)(void);
uint16_t (*GetEpdPixelHeight)(void);
void (*DrawImage)(uint16_t, uint16_t, uint16_t, uint16_t, uint8_t *);
}
EPD_DrvTypeDef;
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* EPD_H */
Drivers/STM32H7RSxx_BSP/Components/Common/hybrid_sensor.h
+108
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@@ -0,0 +1,108 @@
/**
******************************************************************************
* @file hybrid_sensor.h
* @author MCD Application Team
* @brief This header file contains the functions prototypes for the
* hybrid sensor driver
******************************************************************************
* @attention
*
* Copyright (c) 2021 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef HYBRID_SENSOR_H
#define HYBRID_SENSOR_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include <stdint.h>
/** @addtogroup BSP BSP
* @{
*/
/** @addtogroup COMPONENTS COMPONENTS
* @{
*/
/** @addtogroup COMMON COMMON
* @{
*/
/** @addtogroup HYBRID_SENSOR HYBRID SENSOR
* @{
*/
/** @addtogroup HYBRID_SENSOR_Public_Types HYBRID SENSOR Public types
* @{
*/
/**
* @brief HYBRID SENSOR driver structure definition
*/
typedef struct
{
int32_t (*Init)(void *);
int32_t (*DeInit)(void *);
int32_t (*ReadID)(void *, uint8_t *);
int32_t (*GetCapabilities)(void *, void *);
} HYBRID_SENSOR_CommonDrv_t;
typedef struct
{
int32_t (*Enable)(void *);
int32_t (*Disable)(void *);
int32_t (*GetOutputDataRate)(void *, float *);
int32_t (*SetOutputDataRate)(void *, float);
int32_t (*GetValue)(void *, float *);
} HYBRID_ENV_SENSOR_FuncDrv_t;
typedef struct
{
int32_t (*Enable)(void *);
int32_t (*Disable)(void *);
int32_t (*GetSensitivity)(void *, float *);
int32_t (*GetOutputDataRate)(void *, float *);
int32_t (*SetOutputDataRate)(void *, float);
int32_t (*GetFullScale)(void *, int32_t *);
int32_t (*SetFullScale)(void *, int32_t);
int32_t (*GetAxes)(void *, void *);
int32_t (*GetAxesRaw)(void *, void *);
} HYBRID_MOTION_SENSOR_FuncDrv_t;
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* HYBRID_SENSOR_H */
Drivers/STM32H7RSxx_BSP/Components/Common/idd.h
+95
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/**
******************************************************************************
* @file idd.h
* @author MCD Application Team
* @brief This file contains all the functions prototypes for the IDD driver.
******************************************************************************
* @attention
*
* Copyright (c) 2018 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef IDD_H
#define IDD_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include <stdint.h>
/** @addtogroup BSP
* @{
*/
/** @addtogroup Components
* @{
*/
/** @addtogroup IDD
* @{
*/
/** @defgroup IDD_Exported_Types IDD Exported Types
* @{
*/
/** @defgroup IDD_Driver_structure IDD Driver structure
* @{
*/
typedef struct
{
int32_t (*Init)(void *);
int32_t (*DeInit)(void *);
int32_t (*ReadID)(void *, uint32_t *);
int32_t (*Reset)(void *);
int32_t (*LowPower)(void *);
int32_t (*WakeUp)(void *);
int32_t (*Start)(void *);
int32_t (*Config)(void *, void *);
int32_t (*GetValue)(void *, uint32_t *);
int32_t (*EnableIT)(void *);
int32_t (*DisableIT)(void *);
int32_t (*ITStatus)(void *);
int32_t (*ClearIT)(void *);
int32_t (*ErrorEnableIT)(void *);
int32_t (*ErrorClearIT)(void *);
int32_t (*ErrorGetITStatus)(void *);
int32_t (*ErrorDisableIT)(void *);
int32_t (*ErrorGetSrc)(void *);
int32_t (*ErrorGetCode)(void *);
} IDD_Drv_t;
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* IDD_H */
Drivers/STM32H7RSxx_BSP/Components/Common/io.h
+87
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@@ -0,0 +1,87 @@
/**
******************************************************************************
* @file io.h
* @author MCD Application Team
* @brief This file contains all the functions prototypes for the IO driver.
******************************************************************************
* @attention
*
* Copyright (c) 2018 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef IO_H
#define IO_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include <stdint.h>
/** @addtogroup BSP
* @{
*/
/** @addtogroup Components
* @{
*/
/** @addtogroup IO
* @{
*/
/** @defgroup IO_Exported_Types IO Exported Types
* @{
*/
/** @defgroup IO_Driver_structure IO Driver structure
* @{
*/
typedef struct
{
int32_t (*Init)(void *, void *);
int32_t (*DeInit)(void *);
int32_t (*ReadID)(void *, uint32_t *);
int32_t (*Reset)(void *);
int32_t (*Start)(void *, uint32_t);
int32_t (*WritePin)(void *, uint32_t, uint8_t);
int32_t (*ReadPin)(void *, uint32_t);
int32_t (*EnableIT)(void *);
int32_t (*DisableIT)(void *);
int32_t (*ITStatus)(void *, uint32_t);
int32_t (*ClearIT)(void *, uint32_t);
} IO_Drv_t;
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* IO_H */
Drivers/STM32H7RSxx_BSP/Components/Common/lcd.h
+130
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@@ -0,0 +1,130 @@
/**
******************************************************************************
* @file lcd.h
* @author MCD Application Team
* @brief This file contains all the functions prototypes for the LCD driver.
******************************************************************************
* @attention
*
* Copyright (c) 2018 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef LCD_H
#define LCD_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include <stdint.h>
/** @addtogroup BSP
* @{
*/
/** @addtogroup Components
* @{
*/
/** @addtogroup LCD
* @{
*/
/** @defgroup LCD_Exported_Constants LCD Exported Constants
* @{
*/
#define LCD_PIXEL_FORMAT_ARGB8888 0x00000000U /*!< ARGB8888 LTDC pixel format */
#define LCD_PIXEL_FORMAT_RGB888 0x00000001U /*!< RGB888 LTDC pixel format */
#define LCD_PIXEL_FORMAT_RGB565 0x00000002U /*!< RGB565 LTDC pixel format */
#define LCD_PIXEL_FORMAT_ARGB1555 0x00000003U /*!< ARGB1555 LTDC pixel format */
#define LCD_PIXEL_FORMAT_ARGB4444 0x00000004U /*!< ARGB4444 LTDC pixel format */
#define LCD_PIXEL_FORMAT_L8 0x00000005U /*!< L8 LTDC pixel format */
#define LCD_PIXEL_FORMAT_AL44 0x00000006U /*!< AL44 LTDC pixel format */
#define LCD_PIXEL_FORMAT_AL88 0x00000007U /*!< AL88 LTDC pixel format */
/**
* @}
*/
/** @defgroup LCD_Exported_Types
* @{
*/
/** @defgroup LCD_Driver_structure LCD Driver structure
* @{
*/
typedef struct
{
int32_t (*DrawBitmap)(uint32_t, uint32_t, uint32_t, uint8_t *);
int32_t (*FillRGBRect)(uint32_t, uint32_t, uint32_t, uint8_t *, uint32_t, uint32_t);
int32_t (*DrawHLine)(uint32_t, uint32_t, uint32_t, uint32_t, uint32_t);
int32_t (*DrawVLine)(uint32_t, uint32_t, uint32_t, uint32_t, uint32_t);
int32_t (*FillRect)(uint32_t, uint32_t, uint32_t, uint32_t, uint32_t, uint32_t);
int32_t (*GetPixel)(uint32_t, uint32_t, uint32_t, uint32_t *);
int32_t (*SetPixel)(uint32_t, uint32_t, uint32_t, uint32_t);
int32_t (*GetXSize)(uint32_t, uint32_t *);
int32_t (*GetYSize)(uint32_t, uint32_t *);
int32_t (*SetLayer)(uint32_t, uint32_t);
int32_t (*GetFormat)(uint32_t, uint32_t *);
} LCD_UTILS_Drv_t;
typedef struct
{
/* Control functions */
int32_t (*Init)(void *, uint32_t, uint32_t);
int32_t (*DeInit)(void *);
int32_t (*ReadID)(void *, uint32_t *);
int32_t (*DisplayOn)(void *);
int32_t (*DisplayOff)(void *);
int32_t (*SetBrightness)(void *, uint32_t);
int32_t (*GetBrightness)(void *, uint32_t *);
int32_t (*SetOrientation)(void *, uint32_t);
int32_t (*GetOrientation)(void *, uint32_t *);
/* Drawing functions*/
int32_t (*SetCursor)(void *, uint32_t, uint32_t);
int32_t (*DrawBitmap)(void *, uint32_t, uint32_t, uint8_t *);
int32_t (*FillRGBRect)(void *, uint32_t, uint32_t, uint8_t *, uint32_t, uint32_t);
int32_t (*DrawHLine)(void *, uint32_t, uint32_t, uint32_t, uint32_t);
int32_t (*DrawVLine)(void *, uint32_t, uint32_t, uint32_t, uint32_t);
int32_t (*FillRect)(void *, uint32_t, uint32_t, uint32_t, uint32_t, uint32_t);
int32_t (*GetPixel)(void *, uint32_t, uint32_t, uint32_t *);
int32_t (*SetPixel)(void *, uint32_t, uint32_t, uint32_t);
int32_t (*GetXSize)(void *, uint32_t *);
int32_t (*GetYSize)(void *, uint32_t *);
} LCD_Drv_t;
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* LCD_H */
Drivers/STM32H7RSxx_BSP/Components/Common/light_sensor.h
+85
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/**
******************************************************************************
* @file light_sensor.h
* @author IMG SW Application Team
* @brief This header file contains the common defines and functions prototypes
* for the light sensor driver.
******************************************************************************
* @attention
*
* Copyright (c) 2021 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef LIGHT_SENSOR_H
#define LIGHT_SENSOR_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include <stdint.h>
/** @addtogroup BSP
* @{
*/
/** @addtogroup Components
* @{
*/
/** @addtogroup LIGHT_SENSOR
* @{
*/
/** @defgroup LIGHT_SENSOR_Driver_structure Ranging sensor Driver structure
* @{
*/
typedef struct
{
int32_t (*Init)(void *);
int32_t (*DeInit)(void *);
int32_t (*ReadID)(void *, uint32_t *);
int32_t (*GetCapabilities)(void *, void *);
int32_t (*SetExposureTime)(void *, uint32_t);
int32_t (*GetExposureTime)(void *, uint32_t *);
int32_t (*SetGain)(void *, uint8_t, uint32_t);
int32_t (*GetGain)(void *, uint8_t, uint32_t *);
int32_t (*SetInterMeasurementTime)(void *, uint32_t);
int32_t (*GetInterMeasurementTime)(void *, uint32_t *);
int32_t (*Start)(void *, uint32_t);
int32_t (*Stop)(void *);
int32_t (*StartFlicker)(void *, uint8_t, uint8_t);
int32_t (*StopFlicker)(void *);
int32_t (*GetValues)(void *, uint32_t *);
int32_t (*SetControlMode)(void *, uint32_t, uint32_t);
} LIGHT_SENSOR_Drv_t;
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* LIGHT_SENSOR_H */
Drivers/STM32H7RSxx_BSP/Components/Common/motion_sensor.h
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/**
******************************************************************************
* @file motion_sensor.h
* @author MCD Application Team
* @brief This header file contains the functions prototypes for the
* motion sensor driver
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef MOTION_SENSOR_H
#define MOTION_SENSOR_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include <stdint.h>
/** @addtogroup BSP BSP
* @{
*/
/** @addtogroup COMPONENTS COMPONENTS
* @{
*/
/** @addtogroup COMMON COMMON
* @{
*/
/** @addtogroup MOTION_SENSOR MOTION SENSOR
* @{
*/
/** @addtogroup MOTION_SENSOR_Public_Types MOTION SENSOR Public types
* @{
*/
/**
* @brief MOTION SENSOR driver structure definition
*/
typedef struct
{
int32_t (*Init)(void *);
int32_t (*DeInit)(void *);
int32_t (*ReadID)(void *, uint8_t *);
int32_t (*GetCapabilities)(void *, void *);
} MOTION_SENSOR_CommonDrv_t;
typedef struct
{
int32_t (*Enable)(void *);
int32_t (*Disable)(void *);
int32_t (*GetSensitivity)(void *, float *);
int32_t (*GetOutputDataRate)(void *, float *);
int32_t (*SetOutputDataRate)(void *, float);
int32_t (*GetFullScale)(void *, int32_t *);
int32_t (*SetFullScale)(void *, int32_t);
int32_t (*GetAxes)(void *, void *);
int32_t (*GetAxesRaw)(void *, void *);
} MOTION_SENSOR_FuncDrv_t;
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* MOTION_SENSOR_H */
Drivers/STM32H7RSxx_BSP/Components/Common/pwrmon.h
+251
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/**
******************************************************************************
* @file pwrmon.h
* @author MCD Application Team
* @brief This header file contains the functions prototypes for the
* Current/Power Monitor device driver.
******************************************************************************
* @attention
*
* Copyright (c) 2018 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __PWRMON_H
#define __PWRMON_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include <stdint.h>
/** @addtogroup BSP
* @{
*/
/** @addtogroup Components
* @{
*/
/** @addtogroup PWRMON
* @{
*/
/** @defgroup PWRMON_Exported_Types
* @{
*/
/** @defgroup PWRMON_Operating_Mode_enum Power Monitor Operating Mode enums
* @{
*/
typedef enum
{
OPERATING_MODE_TRIGGERED = 0,
OPERATING_MODE_CONTINUOUS,
OPERATING_MODE_NB
} PWRMON_OperatingMode_t;
/**
* @}
*/
/** @defgroup PWRMON_Conversion_Time_enum Power Monitor Conversion_Time enums
* @{
*/
typedef enum
{
CONVERT_TIME_140 = 0,
CONVERT_TIME_204,
CONVERT_TIME_332,
CONVERT_TIME_588,
CONVERT_TIME_1100,
CONVERT_TIME_2116,
CONVERT_TIME_4156,
CONVERT_TIME_8244,
CONVERT_TIME_NB
} PWRMON_ConvertTime_t;
/**
* @}
*/
/** @defgroup PWRMON_Conversion_Time_enum Power Monitor Conversion_Time enums
* @{
*/
typedef enum
{
AVERAGING_MODE_1 = 0,
AVERAGING_MODE_4,
AVERAGING_MODE_16,
AVERAGING_MODE_64,
AVERAGING_MODE_128,
AVERAGING_MODE_256,
AVERAGING_MODE_512,
AVERAGING_MODE_1024,
AVERAGING_MODE_NB
} PWRMON_AveragingMode_t;
/**
* @}
*/
/** @defgroup PWRMON_Device_Configuration_structure Power Monitor Device Configuration structure
* @{
*/
typedef struct
{
PWRMON_ConvertTime_t ShuntConvertTime;
PWRMON_ConvertTime_t BusConvertTime;
PWRMON_AveragingMode_t AveragingMode;
} PWRMON_Config_t;
/**
* @}
*/
/** @defgroup PWRMON_Alert_Polarity_enum Power Monitor Alert Polarity enums
* @{
*/
typedef enum
{
ALERT_POLARITY_NORMAL = 0,
ALERT_POLARITY_INVERTED,
ALERT_POLARITY_NB
} PWRMON_AlertPolarity_t;
/**
* @}
*/
/** @defgroup PWRMON_Alert_Latch_Enable_enum Power Monitor Alert Latch Enable enums
* @{
*/
typedef enum
{
ALERT_LATCH_DISABLE = 0,
ALERT_LATCH_ENABLE,
ALERT_LATCH_NB
} PWRMON_AlertLatchEnable_t;
/**
* @}
*/
/** @defgroup PWRMON_Alert_Function_enum Power Monitor Alert Function enums
* @{
*/
typedef enum
{
ALERT_FUNCTION_NONE = 0,
ALERT_FUNCTION_SOL,
ALERT_FUNCTION_SUL,
ALERT_FUNCTION_BOL,
ALERT_FUNCTION_BUL,
ALERT_FUNCTION_POL,
ALERT_FUNCTION_NB,
} PWRMON_AlertFunction_t;
/**
* @}
*/
/** @defgroup PWRMON_Alert_Configuration_structure Power Monitor Alert Configuration structure
* @{
*/
typedef struct
{
PWRMON_AlertPolarity_t Polarity;
PWRMON_AlertLatchEnable_t LatchEnable;
} PWRMON_AlertPinConfig_t;
/**
* @}
*/
/** @defgroup PWRMON_Voltage_Input_enum Power Monitor Voltage Input enums
* @{
*/
typedef enum
{
VOLTAGE_INPUT_SHUNT = 0,
VOLTAGE_INPUT_BUS,
VOLTAGE_INPUT_ALL,
VOLTAGE_INPUT_NB
} PWRMON_InputSignal_t;
/**
* @}
*/
/** @defgroup PWRMON_Flag_enum Power Monitor Flag enums
* @{
*/
typedef enum
{
FLAG_ALERT_FUNCTION = 0,
FLAG_CONVERSION_READY,
FLAG_MATH_OVERFLOW,
FLAG_NB
} PWRMON_Flag_t;
/**
* @}
*/
/** @defgroup PWRMON_Driver_structure Power Monitor Driver structure
* @{
*/
typedef struct
{
void (*Init)(uint16_t, PWRMON_Config_t *);
void (*DeInit)(uint16_t);
uint16_t (*ReadId)(uint16_t);
void (*Reset)(uint16_t);
void (*SetCalibration)(uint16_t, uint16_t);
uint16_t (*GetCalibration)(uint16_t);
void (*SetAlertFunction)(uint16_t, PWRMON_AlertFunction_t);
PWRMON_AlertFunction_t (*GetAlertFunction)(uint16_t);
void (*AlertPinConfig)(uint16_t, PWRMON_AlertPinConfig_t *);
void (*SetVBusThreshold)(uint16_t, uint16_t);
uint16_t (*GetVBusThreshold)(uint16_t);
void (*SetVShuntThreshold)(uint16_t, int16_t);
int16_t (*GetVShuntThreshold)(uint16_t);
void (*SetPowerThreshold)(uint16_t, uint32_t);
uint32_t (*GetPowerThreshold)(uint16_t);
void (*AlertThresholdEnableIT)(uint16_t);
void (*AlertThresholdDisableIT)(uint16_t);
void (*ConversionReadyEnableIT)(uint16_t);
void (*ConversionReadyDisableIT)(uint16_t);
void (*StartConversion)(uint16_t, PWRMON_InputSignal_t, PWRMON_OperatingMode_t);
void (*StopConversion)(uint16_t);
uint16_t (*GetVBus)(uint16_t);
int16_t (*GetVShunt)(uint16_t);
uint16_t (*GetPower)(uint16_t);
int16_t (*GetCurrent)(uint16_t);
uint8_t (*GetFlag)(uint16_t, PWRMON_Flag_t);
} PWRMON_Drv_t;
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __PWRMON_H */
Drivers/STM32H7RSxx_BSP/Components/Common/ranging_sensor.h
+83
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/**
******************************************************************************
* @file ranging_sensor.h
* @author IMG SW Application Team
* @brief This header file contains the common defines and functions prototypes
* for the ranging sensor driver.
******************************************************************************
* @attention
*
* Copyright (c) 2021 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef RANGING_SENSOR_H
#define RANGING_SENSOR_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include <stdint.h>
/** @addtogroup BSP
* @{
*/
/** @addtogroup Components
* @{
*/
/** @addtogroup RANGING_SENSOR
* @{
*/
/** @defgroup RANGING_SENSOR_Driver_structure Ranging sensor Driver structure
* @{
*/
typedef struct
{
int32_t (*Init)(void *);
int32_t (*DeInit)(void *);
int32_t (*ReadID)(void *, uint32_t *);
int32_t (*GetCapabilities)(void *, void *);
int32_t (*ConfigProfile)(void *, void *);
int32_t (*ConfigROI)(void *, void *);
int32_t (*ConfigIT)(void *, void *);
int32_t (*GetDistance)(void *, void *);
int32_t (*Start)(void *, uint32_t);
int32_t (*Stop)(void *);
int32_t (*SetAddress)(void *, uint32_t);
int32_t (*GetAddress)(void *, uint32_t *);
int32_t (*SetPowerMode)(void *, uint32_t);
int32_t (*GetPowerMode)(void *, uint32_t *);
} RANGING_SENSOR_Drv_t;
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* RANGING_SENSOR_H */
Drivers/STM32H7RSxx_BSP/Components/Common/ts.h
+90
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/**
******************************************************************************
* @file ts.h
* @author MCD Application Team
* @brief This file contains all the functions prototypes for the Touch Screen driver.
******************************************************************************
* @attention
*
* Copyright (c) 2018 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef TS_H
#define TS_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include <stdint.h>
/** @addtogroup BSP
* @{
*/
/** @addtogroup Components
* @{
*/
/** @addtogroup TS
* @{
*/
/** @defgroup TS_Exported_Types
* @{
*/
/** @defgroup TS_Driver_structure Touch Sensor Driver structure
* @{
*/
typedef struct
{
int32_t (*Init)(void *);
int32_t (*DeInit)(void *);
int32_t (*GestureConfig)(void *, void *);
int32_t (*ReadID)(void *, uint32_t *);
int32_t (*GetState)(void *, void *);
int32_t (*GetMultiTouchState)(void *, void *);
int32_t (*GetGesture)(void *, void *);
int32_t (*GetCapabilities)(void *, void *);
int32_t (*EnableIT)(void *);
int32_t (*DisableIT)(void *);
int32_t (*ClearIT)(void *);
int32_t (*ITStatus)(void *);
} TS_Drv_t;
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* TS_H */
Drivers/STM32H7RSxx_BSP/Components/Common/usbtypecswitch.h
+112
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@@ -0,0 +1,112 @@
/**
******************************************************************************
* @file usbtypecswitch.h
* @author MCD Application Team
* @brief This header file contains the functions prototypes for the
* crossbar switch device for USB Type-C systems.
******************************************************************************
* @attention
*
* Copyright (c) 2018 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __USBTYPECSWITCH_H
#define __USBTYPECSWITCH_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include <stdint.h>
/** @addtogroup BSP
* @{
*/
/** @addtogroup Components
* @{
*/
/** @addtogroup TYPECSWITCH
* @{
*/
/** @defgroup TYPECSWITCH_Exported_Types
* @{
*/
typedef enum
{
USB_NORMAL = 0,
USB_FLIPPED,
DFP_D_PIN_ASSIGNMENT_A_NORMAL,
DFP_D_PIN_ASSIGNMENT_A_FLIPPED,
DFP_D_PIN_ASSIGNMENT_B_NORMAL,
DFP_D_PIN_ASSIGNMENT_B_FLIPPED,
DFP_D_PIN_ASSIGNMENT_C_NORMAL,
DFP_D_PIN_ASSIGNMENT_C_FLIPPED,
DFP_D_PIN_ASSIGNMENT_D_NORMAL,
DFP_D_PIN_ASSIGNMENT_D_FLIPPED,
DFP_D_PIN_ASSIGNMENT_E_NORMAL,
DFP_D_PIN_ASSIGNMENT_E_FLIPPED,
DFP_D_PIN_ASSIGNMENT_F_NORMAL,
DFP_D_PIN_ASSIGNMENT_F_FLIPPED,
UFP_D_PIN_ASSIGNMENT_A_NORMAL,
UFP_D_PIN_ASSIGNMENT_A_FLIPPED,
UFP_D_PIN_ASSIGNMENT_B_NORMAL,
UFP_D_PIN_ASSIGNMENT_B_FLIPPED,
UFP_D_PIN_ASSIGNMENT_C_NORMAL,
UFP_D_PIN_ASSIGNMENT_C_FLIPPED,
UFP_D_PIN_ASSIGNMENT_D_NORMAL,
UFP_D_PIN_ASSIGNMENT_D_FLIPPED,
UFP_D_PIN_ASSIGNMENT_E_NORMAL,
UFP_D_PIN_ASSIGNMENT_E_FLIPPED,
UFP_D_PIN_ASSIGNMENT_F_NORMAL,
UFP_D_PIN_ASSIGNMENT_F_FLIPPED
} TYPECSWITCH_Mode_t;
/** @defgroup TYPECSWITCH_Driver_structure USB Type-C Crossbar Switch Driver structure
* @{
*/
typedef struct
{
uint32_t (*Init)(uint16_t);
void (*DeInit)(uint16_t);
uint32_t (*PowerOn)(uint16_t);
uint32_t (*PowerOff)(uint16_t);
uint32_t (*SetMode)(uint16_t, TYPECSWITCH_Mode_t);
uint32_t (*IsSupportedMode)(TYPECSWITCH_Mode_t);
} TYPECSWITCH_Drv_t;
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __USBTYPECSWITCH_H */
Drivers/STM32H7RSxx_BSP/Components/aps256xx/LICENSE.md
+27
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@@ -0,0 +1,27 @@
Copyright 2020(-2023) STMicroelectronics.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation and/or
other materials provided with the distribution.
3. Neither the name of the copyright holder nor the names of its contributors
may be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Drivers/STM32H7RSxx_BSP/Components/aps256xx/LICENSE.txt
+6
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@@ -0,0 +1,6 @@
This software component is provided to you as part of a software package and
applicable license terms are in the Package_license file. If you received this
software component outside of a package or without applicable license terms,
the terms of the BSD-3-Clause license shall apply.
You may obtain a copy of the BSD-3-Clause at:
https://opensource.org/licenses/BSD-3-Clause
Drivers/STM32H7RSxx_BSP/Components/aps256xx/Release_Notes.html
+110
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<!DOCTYPE html>
<html xmlns="http://www.w3.org/1999/xhtml" lang="en" xml:lang="en">
<head>
<meta charset="utf-8" />
<meta name="generator" content="pandoc" />
<meta name="viewport" content="width=device-width, initial-scale=1.0, user-scalable=yes" />
<title>Release Notes for APS256XX 16-Bits OCTOSPI Component Driver</title>
<style type="text/css">
code{white-space: pre-wrap;}
span.smallcaps{font-variant: small-caps;}
span.underline{text-decoration: underline;}
div.column{display: inline-block; vertical-align: top; width: 50%;}
</style>
<link rel="stylesheet" href="_htmresc/mini-st_2020.css" />
<!--[if lt IE 9]>
<script src="//cdnjs.cloudflare.com/ajax/libs/html5shiv/3.7.3/html5shiv-printshiv.min.js"></script>
<![endif]-->
<link rel="icon" type="image/x-icon" href="_htmresc/favicon.png" />
</head>
<body>
<div class="row">
<div class="col-sm-12 col-lg-4">
<center>
<h1 id="release-notes-for-aps256xx-component-driver">Release Notes for <mark>APS256XX</mark> Component Driver</h1>
<p>Copyright © 2020 STMicroelectronics<br />
</p>
<a href="https://www.st.com" class="logo"><img src="_htmresc/st_logo_2020.png" alt="ST logo" /></a>
</center>
<h1 id="purpose">Purpose</h1>
<p>This driver provides a set of functions offered by APS256XX 16-Bits OCTOSPI component</p>
</div>
<div class="col-sm-12 col-lg-8">
<h1 id="update-history">Update History</h1>
<div class="collapse">
<input type="checkbox" id="collapse-section6" checked aria-hidden="true"> <label for="collapse-section6" aria-hidden="true"><strong>V1.0.6 / 08-December-2023</strong></label>
<div>
<h2 id="main-changes">Main Changes</h2>
<ul>
<li>Set correct bit in MR6 register to enter power down</li>
<li>Correct MISRA-C 2012 warning</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section5" aria-hidden="true"> <label for="collapse-section5" aria-hidden="true"><strong>V1.0.5 / 12-December-2022</strong></label>
<div>
<h2 id="main-changes-1">Main Changes</h2>
<ul>
<li>Add XSPI_CCR_SIOO macro</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section4" aria-hidden="true"> <label for="collapse-section4" aria-hidden="true"><strong>V1.0.4 / 09-February-2022</strong></label>
<div>
<h2 id="main-changes-2">Main Changes</h2>
<ul>
<li>Update license</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section4" aria-hidden="true"> <label for="collapse-section4" aria-hidden="true"><strong>V1.0.3 / 06-October-2021</strong></label>
<div>
<h2 id="main-changes-3">Main Changes</h2>
<ul>
<li>Initialize sCommand structure as 0 in “Enable Memory mapped” API to avoid Issues related to non-filled sCommand field</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section3" aria-hidden="true"> <label for="collapse-section3" aria-hidden="true"><strong>V1.0.2 / 23-September-2021</strong></label>
<div>
<h2 id="main-changes-4">Main Changes</h2>
<ul>
<li>Code formatting and spelling</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section2" aria-hidden="true"> <label for="collapse-section2" aria-hidden="true"><strong>V1.0.1 / 30-April-2021</strong></label>
<div>
<h2 id="main-changes-5">Main Changes</h2>
<ul>
<li>Code formatting and spelling</li>
<li>Update memory Command configuration values</li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" aria-hidden="true"><strong>V1.0.0 / 27-March-2020</strong></label>
<div>
<h2 id="main-changes-6">Main Changes</h2>
<ul>
<li>First Official Release of APS256XX 16-bits SPI Component drivers in line with STM32Cube BSP drivers development guidelines (UM2298)</li>
<li>The component drivers are composed of
<ul>
<li>component core drivers files: aps256xx.h/.c</li>
<li>component configuration file: aps256xx_conf_template.h</li>
</ul></li>
</ul>
</div>
</div>
</div>
</div>
<footer class="sticky">
For complete documentation on <mark>STM32 Microcontrollers</mark> , visit: <span style="font-color: blue;"><a href="http://www.st.com/STM32">www.st.com</a></span>
</footer>
</body>
</html>
Drivers/STM32H7RSxx_BSP/Components/aps256xx/Release_Notes.md
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---
pagetitle: Release Notes for APS256XX 16-Bits OCTOSPI Component Driver
lang: en
header-includes: <link rel="icon" type="image/x-icon" href="_htmresc/favicon.png" />
---
::: {.row}
::: {.col-sm-12 .col-lg-4}
<center>
# Release Notes for <mark>APS256XX</mark> Component Driver
Copyright &copy; 2020 STMicroelectronics\
[![ST logo](_htmresc/st_logo_2020.png)](https://www.st.com){.logo}
</center>
# Purpose
This driver provides a set of functions offered by APS256XX 16-Bits OCTOSPI component
:::
::: {.col-sm-12 .col-lg-8}
# Update History
::: {.collapse}
<input type="checkbox" id="collapse-section6" checked aria-hidden="true">
<label for="collapse-section6" aria-hidden="true">__V1.0.6 / 08-December-2023__</label>
<div>
## Main Changes
- Set correct bit in MR6 register to enter power down
- Correct MISRA-C 2012 warning
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section5" aria-hidden="true">
<label for="collapse-section5" aria-hidden="true">__V1.0.5 / 12-December-2022__</label>
<div>
## Main Changes
- Add XSPI_CCR_SIOO macro
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section4" aria-hidden="true">
<label for="collapse-section4" aria-hidden="true">__V1.0.4 / 09-February-2022__</label>
<div>
## Main Changes
- Update license
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section4" aria-hidden="true">
<label for="collapse-section4" aria-hidden="true">__V1.0.3 / 06-October-2021__</label>
<div>
## Main Changes
- Initialize sCommand structure as 0 in “Enable Memory mapped” API to avoid Issues related to non-filled sCommand field
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section3" aria-hidden="true">
<label for="collapse-section3" aria-hidden="true">__V1.0.2 / 23-September-2021__</label>
<div>
## Main Changes
- Code formatting and spelling
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section2" aria-hidden="true">
<label for="collapse-section2" aria-hidden="true">__V1.0.1 / 30-April-2021__</label>
<div>
## Main Changes
- Code formatting and spelling
- Update memory Command configuration values
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section1" aria-hidden="true">
<label for="collapse-section1" aria-hidden="true">__V1.0.0 / 27-March-2020__</label>
<div>
## Main Changes
- First Official Release of APS256XX 16-bits SPI Component drivers in line with STM32Cube BSP drivers development guidelines (UM2298)
- The component drivers are composed of
- component core drivers files: aps256xx.h/.c
- component configuration file: aps256xx_conf_template.h
</div>
:::
:::
:::
<footer class="sticky">
For complete documentation on <mark>STM32 Microcontrollers</mark> ,
visit: [[www.st.com](http://www.st.com/STM32)]{style="font-color: blue;"}
</footer>
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Drivers/STM32H7RSxx_BSP/Components/aps256xx/aps256xx.c
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/**
******************************************************************************
* @file aps256xx.c
* @modify MCD Application Team
* @brief This file provides the APS256XX HSPI drivers.
******************************************************************************
* @attention
*
* Copyright (c) 2021 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "aps256xx.h"
/** @addtogroup BSP
* @{
*/
/** @addtogroup Components
* @{
*/
/** @defgroup APS256XX APS256XX
* @{
*/
/** @defgroup APS256XX_Exported_Functions APS256XX Exported Functions
* @{
*/
/* Read/Write Array Commands *********************/
/**
* @brief Reads an amount of data from the memory.
* @param Ctx Component object pointer
* @param pData Pointer to data to be read
* @param ReadAddr Read start address
* @param Size Size of data to read
* @param LatencyCode Latency used for the access
* @param IOMode I/O Mode used for the access
* @param BurstType Type of burst used for the access
* @retval Memory status
*/
int32_t APS256XX_Read(XSPI_HandleTypeDef *Ctx, uint8_t *pData, uint32_t ReadAddr, uint32_t Size, uint32_t LatencyCode,
uint32_t IOMode, uint32_t BurstType)
{
XSPI_RegularCmdTypeDef sCommand = {0};
/* Initialize the read command */
sCommand.OperationType = HAL_XSPI_OPTYPE_COMMON_CFG;
sCommand.InstructionMode = HAL_XSPI_INSTRUCTION_8_LINES;
sCommand.InstructionWidth = HAL_XSPI_INSTRUCTION_8_BITS;
sCommand.InstructionDTRMode = HAL_XSPI_INSTRUCTION_DTR_DISABLE;
sCommand.Instruction = ((BurstType == 0U) ? APS256XX_READ_LINEAR_BURST_CMD : APS256XX_READ_CMD);
sCommand.AddressMode = HAL_XSPI_ADDRESS_8_LINES;
sCommand.AddressWidth = HAL_XSPI_ADDRESS_32_BITS;
sCommand.AddressDTRMode = HAL_XSPI_ADDRESS_DTR_ENABLE;
sCommand.Address = ReadAddr;
sCommand.AlternateBytesMode = HAL_XSPI_ALT_BYTES_NONE;
sCommand.DataMode = ((IOMode == 0U) ? HAL_XSPI_DATA_8_LINES : HAL_XSPI_DATA_16_LINES);
sCommand.DataDTRMode = HAL_XSPI_DATA_DTR_ENABLE;
sCommand.DataLength = Size;
sCommand.DummyCycles = (LatencyCode - 1U);
sCommand.DQSMode = HAL_XSPI_DQS_ENABLE;
#if defined (XSPI_CCR_SIOO)
sCommand.SIOOMode = HAL_XSPI_SIOO_INST_EVERY_CMD;
#endif
/* Configure the command */
if (HAL_XSPI_Command(Ctx, &sCommand, HAL_XSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
{
return APS256XX_ERROR;
}
/* Reception of the data */
if (HAL_XSPI_Receive(Ctx, pData, HAL_XSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
{
return APS256XX_ERROR;
}
return APS256XX_OK;
}
/**
* @brief Reads an amount of data in DMA mode from the memory.
* @param Ctx Component object pointer
* @param pData Pointer to data to be read
* @param ReadAddr Read start address
* @param Size Size of data to read
* @param LatencyCode Latency used for the access
* @param IOMode I/O Mode used for the access
* @param BurstType Type of burst used for the access
* @retval Memory status
*/
int32_t APS256XX_Read_DMA(XSPI_HandleTypeDef *Ctx, uint8_t *pData, uint32_t ReadAddr, uint32_t Size,
uint32_t LatencyCode, uint32_t IOMode, uint32_t BurstType)
{
XSPI_RegularCmdTypeDef sCommand = {0};
/* Initialize the read command */
sCommand.OperationType = HAL_XSPI_OPTYPE_COMMON_CFG;
sCommand.InstructionMode = HAL_XSPI_INSTRUCTION_8_LINES;
sCommand.InstructionWidth = HAL_XSPI_INSTRUCTION_8_BITS;
sCommand.InstructionDTRMode = HAL_XSPI_INSTRUCTION_DTR_DISABLE;
sCommand.Instruction = ((BurstType == 0U) ? APS256XX_READ_LINEAR_BURST_CMD : APS256XX_READ_CMD);
sCommand.AddressMode = HAL_XSPI_ADDRESS_8_LINES;
sCommand.AddressWidth = HAL_XSPI_ADDRESS_32_BITS;
sCommand.AddressDTRMode = HAL_XSPI_ADDRESS_DTR_ENABLE;
sCommand.Address = ReadAddr;
sCommand.AlternateBytesMode = HAL_XSPI_ALT_BYTES_NONE;
sCommand.DataMode = ((IOMode == 0U) ? HAL_XSPI_DATA_8_LINES : HAL_XSPI_DATA_16_LINES);
sCommand.DataDTRMode = HAL_XSPI_DATA_DTR_ENABLE;
sCommand.DataLength = Size;
sCommand.DummyCycles = (LatencyCode - 1U);
sCommand.DQSMode = HAL_XSPI_DQS_ENABLE;
#if defined (XSPI_CCR_SIOO)
sCommand.SIOOMode = HAL_XSPI_SIOO_INST_EVERY_CMD;
#endif
/* Configure the command */
if (HAL_XSPI_Command(Ctx, &sCommand, HAL_XSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
{
return APS256XX_ERROR;
}
/* Reception of the data */
if (HAL_XSPI_Receive_DMA(Ctx, pData) != HAL_OK)
{
return APS256XX_ERROR;
}
return APS256XX_OK;
}
/**
* @brief Writes an amount of data to the memory.
* @param Ctx Component object pointer
* @param pData Pointer to data to be written
* @param WriteAddr Write start address
* @param Size Size of data to write
* @param LatencyCode Latency used for the access
* @param IOMode I/O Mode used for the access
* @param BurstType Type of burst used for the access
* @retval Memory status
*/
int32_t APS256XX_Write(XSPI_HandleTypeDef *Ctx, uint8_t *pData, uint32_t WriteAddr, uint32_t Size, uint32_t LatencyCode,
uint32_t IOMode, uint32_t BurstType)
{
XSPI_RegularCmdTypeDef sCommand = {0};
/* Initialize the write command */
sCommand.OperationType = HAL_XSPI_OPTYPE_COMMON_CFG;
sCommand.InstructionMode = HAL_XSPI_INSTRUCTION_8_LINES;
sCommand.InstructionWidth = HAL_XSPI_INSTRUCTION_8_BITS;
sCommand.InstructionDTRMode = HAL_XSPI_INSTRUCTION_DTR_DISABLE;
sCommand.Instruction = ((BurstType == 0U) ? APS256XX_WRITE_LINEAR_BURST_CMD : APS256XX_WRITE_CMD);
sCommand.AddressMode = HAL_XSPI_ADDRESS_8_LINES;
sCommand.AddressWidth = HAL_XSPI_ADDRESS_32_BITS;
sCommand.AddressDTRMode = HAL_XSPI_ADDRESS_DTR_ENABLE;
sCommand.Address = WriteAddr;
sCommand.AlternateBytesMode = HAL_XSPI_ALT_BYTES_NONE;
sCommand.DataMode = ((IOMode == 0U) ? HAL_XSPI_DATA_8_LINES : HAL_XSPI_DATA_16_LINES);
sCommand.DataDTRMode = HAL_XSPI_DATA_DTR_ENABLE;
sCommand.DataLength = Size;
sCommand.DummyCycles = (LatencyCode - 1U);
sCommand.DQSMode = HAL_XSPI_DQS_ENABLE;
#if defined (XSPI_CCR_SIOO)
sCommand.SIOOMode = HAL_XSPI_SIOO_INST_EVERY_CMD;
#endif
/* Configure the command */
if (HAL_XSPI_Command(Ctx, &sCommand, HAL_XSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
{
return APS256XX_ERROR;
}
/* Transmission of the data */
if (HAL_XSPI_Transmit(Ctx, pData, HAL_XSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
{
return APS256XX_ERROR;
}
return APS256XX_OK;
}
/**
* @brief Writes an amount of data in DMA mode to the memory.
* @param Ctx Component object pointer
* @param pData Pointer to data to be written
* @param WriteAddr Write start address
* @param Size Size of data to write
* @param LatencyCode Latency used for the access
* @param IOMode I/O Mode used for the access
* @param BurstType Type of burst used for the access
* @retval Memory status
*/
int32_t APS256XX_Write_DMA(XSPI_HandleTypeDef *Ctx, uint8_t *pData, uint32_t WriteAddr, uint32_t Size,
uint32_t LatencyCode, uint32_t IOMode, uint32_t BurstType)
{
XSPI_RegularCmdTypeDef sCommand = {0};
/* Initialize the write command */
sCommand.OperationType = HAL_XSPI_OPTYPE_COMMON_CFG;
sCommand.InstructionMode = HAL_XSPI_INSTRUCTION_8_LINES;
sCommand.InstructionWidth = HAL_XSPI_INSTRUCTION_8_BITS;
sCommand.InstructionDTRMode = HAL_XSPI_INSTRUCTION_DTR_DISABLE;
sCommand.Instruction = ((BurstType == 0U) ? APS256XX_WRITE_LINEAR_BURST_CMD : APS256XX_WRITE_CMD);
sCommand.AddressMode = HAL_XSPI_ADDRESS_8_LINES;
sCommand.AddressWidth = HAL_XSPI_ADDRESS_32_BITS;
sCommand.AddressDTRMode = HAL_XSPI_ADDRESS_DTR_ENABLE;
sCommand.Address = WriteAddr;
sCommand.AlternateBytesMode = HAL_XSPI_ALT_BYTES_NONE;
sCommand.DataMode = ((IOMode == 0U) ? HAL_XSPI_DATA_8_LINES : HAL_XSPI_DATA_16_LINES);
sCommand.DataDTRMode = HAL_XSPI_DATA_DTR_ENABLE;
sCommand.DataLength = Size;
sCommand.DummyCycles = (LatencyCode - 1U);
sCommand.DQSMode = HAL_XSPI_DQS_ENABLE;
#if defined (XSPI_CCR_SIOO)
sCommand.SIOOMode = HAL_XSPI_SIOO_INST_EVERY_CMD;
#endif
/* Configure the command */
if (HAL_XSPI_Command(Ctx, &sCommand, HAL_XSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
{
return APS256XX_ERROR;
}
/* Transmission of the data */
if (HAL_XSPI_Transmit_DMA(Ctx, pData) != HAL_OK)
{
return APS256XX_ERROR;
}
return APS256XX_OK;
}
/**
* @brief Enable memory mapped mode for the memory.
* @param Ctx Component object pointer
* @param ReadLatencyCode Latency used for the read access
* @param WriteLatencyCode Latency used for the write access
* @param IOMode I/O Mode used for the access
* @param BurstType Type of burst used for the access
* @retval Memory status
*/
int32_t APS256XX_EnableMemoryMappedMode(XSPI_HandleTypeDef *Ctx, uint32_t ReadLatencyCode, uint32_t WriteLatencyCode,
uint32_t IOMode, uint32_t BurstType)
{
XSPI_RegularCmdTypeDef sCommand = {0};
XSPI_MemoryMappedTypeDef sMemMappedCfg = {0};
/* Initialize the write command */
sCommand.OperationType = HAL_XSPI_OPTYPE_WRITE_CFG;
sCommand.InstructionMode = HAL_XSPI_INSTRUCTION_8_LINES;
sCommand.InstructionWidth = HAL_XSPI_INSTRUCTION_8_BITS;
sCommand.InstructionDTRMode = HAL_XSPI_INSTRUCTION_DTR_DISABLE;
sCommand.Instruction = ((BurstType == 0U) ? APS256XX_WRITE_LINEAR_BURST_CMD : APS256XX_WRITE_CMD);
sCommand.AddressMode = HAL_XSPI_ADDRESS_8_LINES;
sCommand.AddressWidth = HAL_XSPI_ADDRESS_32_BITS;
sCommand.AddressDTRMode = HAL_XSPI_ADDRESS_DTR_ENABLE;
sCommand.AlternateBytesMode = HAL_XSPI_ALT_BYTES_NONE;
sCommand.DataMode = ((IOMode == 0U) ? HAL_XSPI_DATA_8_LINES : HAL_XSPI_DATA_16_LINES);
sCommand.DataDTRMode = HAL_XSPI_DATA_DTR_ENABLE;
sCommand.DummyCycles = (WriteLatencyCode - 1U);
sCommand.DQSMode = HAL_XSPI_DQS_ENABLE;
#if defined (XSPI_CCR_SIOO)
sCommand.SIOOMode = HAL_XSPI_SIOO_INST_EVERY_CMD;
#endif
if (HAL_XSPI_Command(Ctx, &sCommand, HAL_XSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
{
return APS256XX_ERROR;
}
/* Initialize the read command */
sCommand.OperationType = HAL_XSPI_OPTYPE_READ_CFG;
sCommand.Instruction = ((BurstType == 0U) ? APS256XX_READ_LINEAR_BURST_CMD : APS256XX_READ_CMD);
sCommand.DummyCycles = (ReadLatencyCode - 1U);
if (HAL_XSPI_Command(Ctx, &sCommand, HAL_XSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
{
return APS256XX_ERROR;
}
/* Activation of memory-mapped mode */
sMemMappedCfg.TimeOutActivation = HAL_XSPI_TIMEOUT_COUNTER_DISABLE;
if (HAL_XSPI_MemoryMapped(Ctx, &sMemMappedCfg) != HAL_OK)
{
return APS256XX_ERROR;
}
return APS256XX_OK;
}
/* Register/Setting Commands **************************************************/
/**
* @brief Read mode register value
* @param Ctx Component object pointer
* @param Address Register address
* @param Value Register value pointer
* @param LatencyCode Latency used for the access
* @retval error status
*/
int32_t APS256XX_ReadReg(XSPI_HandleTypeDef *Ctx, uint32_t Address, uint8_t *Value, uint32_t LatencyCode)
{
XSPI_RegularCmdTypeDef sCommand = {0};
/* Initialize the read register command */
sCommand.OperationType = HAL_XSPI_OPTYPE_COMMON_CFG;
sCommand.InstructionMode = HAL_XSPI_INSTRUCTION_8_LINES;
sCommand.InstructionWidth = HAL_XSPI_INSTRUCTION_8_BITS;
sCommand.InstructionDTRMode = HAL_XSPI_INSTRUCTION_DTR_DISABLE;
sCommand.Instruction = APS256XX_READ_REG_CMD;
sCommand.AddressMode = HAL_XSPI_ADDRESS_8_LINES;
sCommand.AddressWidth = HAL_XSPI_ADDRESS_32_BITS;
sCommand.AddressDTRMode = HAL_XSPI_ADDRESS_DTR_ENABLE;
sCommand.Address = Address;
sCommand.AlternateBytesMode = HAL_XSPI_ALT_BYTES_NONE;
sCommand.DataMode = HAL_XSPI_DATA_8_LINES;
sCommand.DataDTRMode = HAL_XSPI_DATA_DTR_ENABLE;
sCommand.DataLength = 2;
sCommand.DummyCycles = (LatencyCode - 1U);
sCommand.DQSMode = HAL_XSPI_DQS_ENABLE;
#if defined (XSPI_CCR_SIOO)
sCommand.SIOOMode = HAL_XSPI_SIOO_INST_EVERY_CMD;
#endif
/* Configure the command */
if (HAL_XSPI_Command(Ctx, &sCommand, HAL_XSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
{
return APS256XX_ERROR;
}
/* Reception of the data */
if (HAL_XSPI_Receive(Ctx, (uint8_t *)Value, HAL_XSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
{
return APS256XX_ERROR;
}
return APS256XX_OK;
}
/**
* @brief Write mode register
* @param Ctx Component object pointer
* @param Address Register address
* @param Value Value to write to register
* @retval error status
*/
int32_t APS256XX_WriteReg(XSPI_HandleTypeDef *Ctx, uint32_t Address, uint8_t Value)
{
XSPI_RegularCmdTypeDef sCommand = {0};
/* Initialize the write register command */
sCommand.OperationType = HAL_XSPI_OPTYPE_COMMON_CFG;
sCommand.InstructionMode = HAL_XSPI_INSTRUCTION_8_LINES;
sCommand.InstructionWidth = HAL_XSPI_INSTRUCTION_8_BITS;
sCommand.InstructionDTRMode = HAL_XSPI_INSTRUCTION_DTR_DISABLE;
sCommand.Instruction = APS256XX_WRITE_REG_CMD;
sCommand.AddressMode = HAL_XSPI_ADDRESS_8_LINES;
sCommand.AddressWidth = HAL_XSPI_ADDRESS_32_BITS;
sCommand.AddressDTRMode = HAL_XSPI_ADDRESS_DTR_ENABLE;
sCommand.Address = Address;
sCommand.AlternateBytesMode = HAL_XSPI_ALT_BYTES_NONE;
sCommand.DataMode = HAL_XSPI_DATA_8_LINES;
sCommand.DataDTRMode = HAL_XSPI_DATA_DTR_ENABLE;
sCommand.DataLength = 2;
sCommand.DummyCycles = 0;
sCommand.DQSMode = HAL_XSPI_DQS_DISABLE;
#if defined (XSPI_CCR_SIOO)
sCommand.SIOOMode = HAL_XSPI_SIOO_INST_EVERY_CMD;
#endif
/* Configure the command */
if (HAL_XSPI_Command(Ctx, &sCommand, HAL_XSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
{
return APS256XX_ERROR;
}
/* Transmission of the data */
if (HAL_XSPI_Transmit(Ctx, (uint8_t *)(&Value), HAL_XSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
{
return APS256XX_ERROR;
}
return APS256XX_OK;
}
/* ID Commands ****************************************************************/
/**
* @brief Read Flash IDs.
* Vendor ID, Device ID, Device Density
* @param Ctx Component object pointer
* @param ID IDs pointer (2 * 8-bits value)
* @param LatencyCode Latency used for the access
* @retval error status
*/
int32_t APS256XX_ReadID(XSPI_HandleTypeDef *Ctx, uint8_t *ID, uint32_t LatencyCode)
{
/* Read the Mode Register 1 and 2 */
if (APS256XX_ReadReg(Ctx, APS256XX_MR1_ADDRESS, ID, LatencyCode) != APS256XX_OK)
{
return APS256XX_ERROR;
}
/* Keep only Vendor ID from Mode Register 1 */
*ID &= (APS256XX_MR1_VENDOR_ID);
/* Keep only Device ID and Device Density from Mode Register 2 */
*(ID + 1) &= (APS256XX_MR2_DEVICE_ID | APS256XX_MR2_DENSITY);
return APS256XX_OK;
}
/* Power down Commands ********************************************************/
/**
* @brief Memory enter deep power-down command
* @param Ctx Component object pointer
* @retval error status
*/
int32_t APS256XX_EnterPowerDown(XSPI_HandleTypeDef *Ctx)
{
/* Update the deep power down value of the MR6 register */
if (APS256XX_WriteReg(Ctx, APS256XX_MR6_ADDRESS, APS256XX_MR6_HS_HALF_SPEED_MODE) != APS256XX_OK)
{
return APS256XX_ERROR;
}
/* --- Memory enter deep power down as soon nCS goes high --- */
/* --- At least 500us should be respected before leaving deep power down --- */
return APS256XX_OK;
}
/**
* @brief Flash leave deep power-down command
* @param Ctx Component object pointer
* @param LatencyCode Latency used for the access
* @retval error status
*/
int32_t APS256XX_LeavePowerDown(XSPI_HandleTypeDef *Ctx)
{
/* --- A dummy command is sent to the memory, as the nCS should be low for at least 60 ns --- */
/* --- Memory takes 150us max to leave deep power down --- */
XSPI_RegularCmdTypeDef sCommand = {0};
/* Initialize the command */
sCommand.OperationType = HAL_XSPI_OPTYPE_COMMON_CFG;
sCommand.InstructionMode = HAL_XSPI_INSTRUCTION_8_LINES;
sCommand.InstructionWidth = HAL_XSPI_INSTRUCTION_8_BITS;
sCommand.InstructionDTRMode = HAL_XSPI_INSTRUCTION_DTR_DISABLE;
sCommand.Instruction = APS256XX_READ_CMD;
sCommand.AddressMode = HAL_XSPI_ADDRESS_8_LINES;
sCommand.AddressWidth = HAL_XSPI_ADDRESS_32_BITS;
sCommand.AddressDTRMode = HAL_XSPI_ADDRESS_DTR_DISABLE;
sCommand.Address = 0;
sCommand.AlternateBytesMode = HAL_XSPI_ALT_BYTES_NONE;
sCommand.DataMode = HAL_XSPI_DATA_NONE;
sCommand.DataLength = 0;
sCommand.DummyCycles = 0;
sCommand.DQSMode = HAL_XSPI_DQS_DISABLE;
#if defined (XSPI_CCR_SIOO)
sCommand.SIOOMode = HAL_XSPI_SIOO_INST_EVERY_CMD;
#endif
/* Configure the command */
if (HAL_XSPI_Command(Ctx, &sCommand, HAL_XSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
{
return APS256XX_ERROR;
}
return APS256XX_OK;
}
/* Reset Command **************************************************************/
/**
* @brief Reset the memory
* @param Ctx Component object pointer
* @retval error status
*/
int32_t APS256XX_Reset(XSPI_HandleTypeDef *Ctx)
{
XSPI_RegularCmdTypeDef sCommand = {0};
/* Initialize the command */
sCommand.OperationType = HAL_XSPI_OPTYPE_COMMON_CFG;
sCommand.InstructionMode = HAL_XSPI_INSTRUCTION_8_LINES;
sCommand.InstructionWidth = HAL_XSPI_INSTRUCTION_8_BITS;
sCommand.InstructionDTRMode = HAL_XSPI_INSTRUCTION_DTR_DISABLE;
sCommand.Instruction = APS256XX_RESET_CMD;
sCommand.AddressMode = HAL_XSPI_ADDRESS_8_LINES;
sCommand.AddressWidth = HAL_XSPI_ADDRESS_24_BITS;
sCommand.AddressDTRMode = HAL_XSPI_ADDRESS_DTR_DISABLE;
sCommand.Address = 0;
sCommand.AlternateBytesMode = HAL_XSPI_ALT_BYTES_NONE;
sCommand.DataMode = HAL_XSPI_DATA_NONE;
sCommand.DataLength = 0;
sCommand.DummyCycles = 0;
sCommand.DQSMode = HAL_XSPI_DQS_DISABLE;
#if defined (XSPI_CCR_SIOO)
sCommand.SIOOMode = HAL_XSPI_SIOO_INST_EVERY_CMD;
#endif
/* Configure the command */
if (HAL_XSPI_Command(Ctx, &sCommand, HAL_XSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK)
{
return APS256XX_ERROR;
}
/* Need to wait tRST */
HAL_Delay(1);
return 0/*APS256XX_OK*/;
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
Drivers/STM32H7RSxx_BSP/Components/aps256xx/aps256xx.h
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/**
******************************************************************************
* @file aps256xx.h
* @author MCD Application Team
* @brief This file contains all the description of the APS256XX 16bits-HSPI PSRAM memory.
******************************************************************************
* @attention
*
* Copyright (c) 2021 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef APS256XX_H
#define APS256XX_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "aps256xx_conf.h"
/** @addtogroup BSP
* @{
*/
/** @addtogroup Components
* @{
*/
/** @addtogroup APS256XX
* @{
*/
/** @defgroup APS256XX_Exported_Types
* @{
*/
/**
* @}
*/
/** @defgroup APS256XX_Exported_Constants
* @{
*/
/**
* @brief APS256XX Configuration
*/
#define APS256XX_RAM_SIZE 0x2000000U /* 256 MBits => 32 MBytes */
/**
* @brief APS256XX Error codes
*/
#define APS256XX_OK (0)
#define APS256XX_ERROR (-1)
/******************************************************************************
* @brief APS256XX Registers
****************************************************************************/
/* Mode Register 0 */
#define APS256XX_MR0_ADDRESS 0x00000000U
#define APS256XX_MR0_DRIVE_STRENGTH 0x03U /*!< Drive Strength */
#define APS256XX_MR0_DS_FULL 0x00U /*!< Drive Strength : Full (25 Ohm) */
#define APS256XX_MR0_DS_HALF 0x01U /*!< Drive Strength : Half (50 Ohm) */
#define APS256XX_MR0_DS_QUART 0x02U /*!< Drive Strength : 1/4 (100 Ohm) */
#define APS256XX_MR0_DS_EIGHT 0x03U /*!< Drive Strength : 1/8 (200 Ohm) */
#define APS256XX_MR0_READ_LATENCY_CODE 0x1CU /*!< Read Latency Code */
#define APS256XX_MR0_RLC_3 0x00U /*!< Read Latency Code : 3 */
#define APS256XX_MR0_RLC_4 0x04U /*!< Read Latency Code : 4 */
#define APS256XX_MR0_RLC_5 0x08U /*!< Read Latency Code : 5 */
#define APS256XX_MR0_RLC_6 0x0CU /*!< Read Latency Code : 6 */
#define APS256XX_MR0_RLC_7 0x10U /*!< Read Latency Code : 7 */
#define APS256XX_MR0_LATENCY_TYPE 0x20U /*!< Latency Type */
/* Mode Register 1 */
#define APS256XX_MR1_ADDRESS 0x00000001U
#define APS256XX_MR1_VENDOR_ID 0x1FU /*!< Vendor Identifier */
#define APS256XX_MR1_VENDOR_ID_APM 0x0DU /*!< Vendor Identifier : APM */
#define APS256XX_MR1_ULP 0x80U /*!< Ultra Low Power Device */
/* Mode Register 2 */
#define APS256XX_MR2_ADDRESS 0x00000002U
#define APS256XX_MR2_DENSITY 0x07U /*!< Device Density */
#define APS256XX_MR2_DENSITY_128_MB 0x05U /*!< Device Density : 128 Mb */
#define APS256XX_MR2_DENSITY_256_MB 0x07U /*!< Device Density : 256 Mb */
#define APS256XX_MR2_DENSITY_512_MB 0x06U /*!< Device Density : 512 Mb */
#define APS256XX_MR2_DEVICE_ID 0x18U /*!< Device Identifier */
#define APS256XX_MR2_DEVID_GEN_1 0x00U /*!< Device Identifier : Generation 1 */
#define APS256XX_MR2_DEVID_GEN_2 0x08U /*!< Device Identifier : Generation 2 */
#define APS256XX_MR2_DEVID_GEN_3 0x10U /*!< Device Identifier : Generation 3 */
#define APS256XX_MR2_DEVID_GEN_4 0x18U /*!< Device Identifier : Generation 4 */
#define APS256XX_MR2_KGD 0xE0U /*!< Good-Die Identifier */
#define APS256XX_MR2_KGD_GOOD_DIE_ID 0xC0U /*!< Good-Die Identifier : PASS */
/* Mode Register 3 */
#define APS256XX_MR3_ADDRESS 0x00000003U
#define APS256XX_MR3_SRF 0x30U /*!< Self Refresh Flag */
#define APS256XX_MR3_SRF_0_5X 0x10U /*!< Self Refresh Flag : 0.5x Refresh */
#define APS256XX_MR3_SRF_1X 0x00U /*!< Self Refresh Flag : 1x Refresh */
#define APS256XX_MR3_SRF_4X 0x20U /*!< Self Refresh Flag : 4x Refresh */
#define APS256XX_MR3_RBXEN 0x80U /*!< Row Boundary Crossing Enable */
/* Mode Register 4 */
#define APS256XX_MR4_ADDRESS 0x00000004U
#define APS256XX_MR4_PASR 0x07U /*!< Partially Address Space Refresh */
#define APS256XX_MR4_PASR_FULL 0x00U /*!< PASR : Full Array */
#define APS256XX_MR4_PASR_BOTTOM_HALF 0x01U /*!< PASR : Bottom 1/2 Array */
#define APS256XX_MR4_PASR_BOTTOM_QUART 0x02U /*!< PASR : Bottom 1/4 Array */
#define APS256XX_MR4_PASR_BOTTOM_EIGHT 0x03U /*!< PASR : Bottom 1/8 Array */
#define APS256XX_MR4_PASR_NONE 0x04U /*!< PASR : None */
#define APS256XX_MR4_PASR_TOP_HALF 0x05U /*!< PASR : Top 1/2 Array */
#define APS256XX_MR4_PASR_TOP_QUART 0x06U /*!< PASR : Top 1/4 Array */
#define APS256XX_MR4_PASR_TOP_EIGHT 0x07U /*!< PASR : Top 1/8 Array */
#define APS256XX_MR4_RF_RATE 0x18U /*!< Refresh Frequency Setting */
#define APS256XX_MR4_RF_4X 0x00U /*!< RF : Always 4x Refresh */
#define APS256XX_MR4_RF_1X 0x08U /*!< RF : Enables 1x Refresh */
#define APS256XX_MR4_RF_0_5X 0x18U /*!< RF : Enables 0.5x Refresh */
#define APS256XX_MR4_WRITE_LATENCY_CODE 0xE0U /*!< Write Latency Code */
#define APS256XX_MR4_WLC_3 0x00U /*!< Write Latency Code : 3 */
#define APS256XX_MR4_WLC_4 0x80U /*!< Write Latency Code : 4 */
#define APS256XX_MR4_WLC_5 0x40U /*!< Write Latency Code : 5 */
#define APS256XX_MR4_WLC_6 0xC0U /*!< Write Latency Code : 6 */
#define APS256XX_MR4_WLC_7 0x20U /*!< Write Latency Code : 7 */
/* Mode Register 6 */
#define APS256XX_MR6_ADDRESS 0x00000006U
#define APS256XX_MR6_HALF_SLEEP 0xF0U /*!< Half Sleep */
#define APS256XX_MR6_HS_HALF_SPEED_MODE 0xF0U /*!< Half Sleep : Half Speed Mode */
#define APS256XX_MR6_HS_DEEP_POWER_DOWN 0xC0U /*!< Half Sleep : Deep Power Down Mode */
/* Mode Register 8 */
#define APS256XX_MR8_ADDRESS 0x00000008U
#define APS256XX_MR8_BL 0x03U /*!< Burst Length */
#define APS256XX_MR8_BL_16_BYTES 0x00U /*!< Burst Length : 16 Byte/Word Wrap */
#define APS256XX_MR8_BL_32_BYTES 0x01U /*!< Burst Length : 32 Byte/Word Wrap */
#define APS256XX_MR8_BL_64_BYTES 0x02U /*!< Burst Length : 64 Byte/Word Wrap */
#define APS256XX_MR8_BL_2K_BYTES 0x03U /*!< Burst Length : 2K Byte/1K Word Wrap */
#define APS256XX_MR8_BT 0x04U /*!< Burst Type */
#define APS256XX_MR8_RBX 0x08U /*!< Row Boundary Crossing Read Enable */
#define APS256XX_MR8_X8_X16 0x40U /*!< IO X8/X16 Mode */
/******************************************************************************
* @brief APS256XX Commands
****************************************************************************/
/* Read Operations */
#define APS256XX_READ_CMD 0x00U /*!< Synchronous Read */
#define APS256XX_READ_LINEAR_BURST_CMD 0x20U /*!< Linear Burst Read */
/* Write Operations */
#define APS256XX_WRITE_CMD 0x80U /*!< Synchronous Write */
#define APS256XX_WRITE_LINEAR_BURST_CMD 0xA0U /*!< Linear Burst Write */
/* Reset Operations */
#define APS256XX_RESET_CMD 0xFFU /*!< Global Reset */
/* Register Operations */
#define APS256XX_READ_REG_CMD 0x40U /*!< Mode Register Read */
#define APS256XX_WRITE_REG_CMD 0xC0U /*!< Mode Register Write */
/**
* @}
*/
/** @defgroup APS256XX_Exported_Types APS256XX Exported Types
* @{
*/
typedef enum
{
APS256XX_BURST_16_BYTES = APS256XX_MR8_BL_16_BYTES,
APS256XX_BURST_32_BYTES = APS256XX_MR8_BL_32_BYTES,
APS256XX_BURST_64_BYTES = APS256XX_MR8_BL_64_BYTES,
APS256XX_BURST_2_KBYTES = APS256XX_MR8_BL_2K_BYTES
} APS256XX_BurstLength_t;
typedef enum
{
APS256XX_READ_LATENCY_3 = APS256XX_MR0_RLC_3,
APS256XX_READ_LATENCY_4 = APS256XX_MR0_RLC_4,
APS256XX_READ_LATENCY_5 = APS256XX_MR0_RLC_5,
APS256XX_READ_LATENCY_6 = APS256XX_MR0_RLC_6,
APS256XX_READ_LATENCY_7 = APS256XX_MR0_RLC_7
} APS256XX_ReadLatencyCode_t;
typedef enum
{
APS256XX_WRITE_LATENCY_3 = APS256XX_MR4_WLC_3,
APS256XX_WRITE_LATENCY_4 = APS256XX_MR4_WLC_4,
APS256XX_WRITE_LATENCY_5 = APS256XX_MR4_WLC_5,
APS256XX_WRITE_LATENCY_6 = APS256XX_MR4_WLC_6,
APS256XX_WRITE_LATENCY_7 = APS256XX_MR4_WLC_7
} APS256XX_WriteLatencyCode_t;
/**
* @}
*/
/** @defgroup APS256XX_Exported_Macros APS256XX Exported Macros
* @{
*/
#define APS256XX_READ_REG_LATENCY(rlc) ((((rlc) & APS256XX_MR0_READ_LATENCY_CODE) >> 2U) + 3U)
#define APS256XX_READ_LATENCY(rlc, type) ((((type) & APS256XX_MR0_LATENCY_TYPE) == 0U) ? \
((((rlc) & APS256XX_MR0_READ_LATENCY_CODE) >> 2U) + 3U) : \
(((((rlc) & APS256XX_MR0_READ_LATENCY_CODE) >> 2U) + 3U)*2U))
#define APS256XX_WRITE_LATENCY(wlc) ((((wlc) & APS256XX_MR4_WRITE_LATENCY_CODE) == 0U) ? 3U : \
((((wlc) & APS256XX_MR4_WLC_7) != 0U) ? 7U : \
((((wlc) & APS256XX_MR4_WLC_5) == 0U) ? 4U : \
((((wlc) & APS256XX_MR4_WLC_4) == 0U) ? 5U : 6U))))
/**
* @}
*/
/** @defgroup APS256XX_Exported_Functions APS256XX Exported Functions
* @{
*/
/* Read/Write Array Commands **************************************************/
int32_t APS256XX_Read(XSPI_HandleTypeDef *Ctx, uint8_t *pData, uint32_t ReadAddr, uint32_t Size, uint32_t LatencyCode,
uint32_t IOMode, uint32_t BurstType);
int32_t APS256XX_Read_DMA(XSPI_HandleTypeDef *Ctx, uint8_t *pData, uint32_t ReadAddr, uint32_t Size,
uint32_t LatencyCode, uint32_t IOMode, uint32_t BurstType);
int32_t APS256XX_Write(XSPI_HandleTypeDef *Ctx, uint8_t *pData, uint32_t WriteAddr, uint32_t Size, uint32_t LatencyCode,
uint32_t IOMode, uint32_t BurstType);
int32_t APS256XX_Write_DMA(XSPI_HandleTypeDef *Ctx, uint8_t *pData, uint32_t WriteAddr, uint32_t Size,
uint32_t LatencyCode, uint32_t IOMode, uint32_t BurstType);
int32_t APS256XX_EnableMemoryMappedMode(XSPI_HandleTypeDef *Ctx, uint32_t ReadLatencyCode, uint32_t WriteLatencyCode,
uint32_t IOMode, uint32_t BurstType);
/* Register/Setting Commands **************************************************/
int32_t APS256XX_ReadReg(XSPI_HandleTypeDef *Ctx, uint32_t Address, uint8_t *Value, uint32_t LatencyCode);
int32_t APS256XX_WriteReg(XSPI_HandleTypeDef *Ctx, uint32_t Address, uint8_t Value);
/* ID Commands ****************************************************************/
int32_t APS256XX_ReadID(XSPI_HandleTypeDef *Ctx, uint8_t *ID, uint32_t LatencyCode);
/* Power down Commands ********************************************************/
int32_t APS256XX_EnterPowerDown(XSPI_HandleTypeDef *Ctx);
int32_t APS256XX_LeavePowerDown(XSPI_HandleTypeDef *Ctx);
/* Reset Command **************************************************************/
int32_t APS256XX_Reset(XSPI_HandleTypeDef *Ctx);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* APS256XX_H */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
Drivers/STM32H7RSxx_BSP/Components/aps256xx/aps256xx_conf_template.h
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/**
******************************************************************************
* @file aps256xx_conf.h
* @author MCD Application Team
* @brief APS256XX 16bits-OSPI PSRAM memory configuration template file.
* This file should be copied to the application folder and renamed
* to aps256xx_conf.h
******************************************************************************
* @attention
*
* Copyright (c) 2021 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef APS256XX_CONF_H
#define APS256XX_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32xxxx_hal.h"
/** @addtogroup BSP
* @{
*/
#define CONF_HSPI_DS APS256XX_MR0_DS_HALF
#define CONF_HSPI_PASR APS256XX_MR4_PASR_FULL
#define CONF_HSPI_RF APS256XX_MR4_RF_4X
#define DEFAULT_READ_LATENCY_CODE APS256XX_READ_LATENCY_5
#define DEFAULT_WRITE_LATENCY_CODE APS256XX_WRITE_LATENCY_5
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* APS256XX_CONF_H */
Drivers/STM32H7RSxx_BSP/Components/mx66uw1g45g/LICENSE.md
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Copyright 2023 STMicroelectronics.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation and/or
other materials provided with the distribution.
3. Neither the name of the copyright holder nor the names of its contributors
may be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Drivers/STM32H7RSxx_BSP/Components/mx66uw1g45g/LICENSE.txt
+6
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This software component is provided to you as part of a software package and
applicable license terms are in the Package_license file. If you received this
software component outside of a package or without applicable license terms,
the terms of the BSD-3-Clause license shall apply.
You may obtain a copy of the BSD-3-Clause at:
https://opensource.org/licenses/BSD-3-Clause
Drivers/STM32H7RSxx_BSP/Components/mx66uw1g45g/Release_Notes.html
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<title>Release Notes for MX66UW1G45G OCTOSPI Component Driver</title>
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<h1 id="release-notes-for-mx66uw1g45g-component-driver">Release Notes for <mark>MX66UW1G45G</mark> Component Driver</h1>
<p>Copyright © 2023 STMicroelectronics<br />
</p>
<a href="https://www.st.com" class="logo"><img src="_htmresc/st_logo_2020.png" alt="ST logo" /></a>
</center>
<h1 id="purpose">Purpose</h1>
<p>This driver provides a set of functions offered by MX66UW1G45G OCTOSPI component</p>
</div>
<div class="col-sm-12 col-lg-8">
<h1 id="update-history">Update History</h1>
<div class="collapse">
<input type="checkbox" id="collapse-section2" checked aria-hidden="true"> <label for="collapse-section2" aria-hidden="true"><strong>V1.1.0 / 08-December-2023</strong></label>
<div>
<h2 id="main-changes">Main Changes</h2>
<ul>
<li>Add implementation of release power-down command</li>
<li>Correct DataLength in case of MX66UW1G45G_DTR_TRANSFER</li>
</ul>
<h2 id="section"></h2>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" aria-hidden="true"><strong>V1.0.0 / 31-May-2023</strong></label>
<div>
<h2 id="main-changes-1">Main Changes</h2>
<ul>
<li>First official release of <strong>MX66UW1G45G</strong> octal SPI driver</li>
</ul>
<h2 id="section-1"></h2>
</div>
</div>
</div>
</div>
<footer class="sticky">
For complete documentation on <mark>STM32 Microcontrollers</mark> , visit: <span style="font-color: blue;"><a href="http://www.st.com/STM32">www.st.com</a></span>
</footer>
</body>
</html>
Drivers/STM32H7RSxx_BSP/Components/mx66uw1g45g/Release_Notes.md
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---
pagetitle: Release Notes for MX66UW1G45G OCTOSPI Component Driver
lang: en
header-includes: <link rel="icon" type="image/x-icon" href="_htmresc/favicon.png" />
---
::: {.row}
::: {.col-sm-12 .col-lg-4}
<center>
# Release Notes for <mark>MX66UW1G45G</mark> Component Driver
Copyright &copy; 2023 STMicroelectronics\
[![ST logo](_htmresc/st_logo_2020.png)](https://www.st.com){.logo}
</center>
# Purpose
This driver provides a set of functions offered by MX66UW1G45G OCTOSPI component
:::
::: {.col-sm-12 .col-lg-8}
# Update History
::: {.collapse}
<input type="checkbox" id="collapse-section2" checked aria-hidden="true">
<label for="collapse-section2" aria-hidden="true">__V1.1.0 / 08-December-2023__</label>
<div>
## Main Changes
- Add implementation of release power-down command
- Correct DataLength in case of MX66UW1G45G_DTR_TRANSFER
##
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section1" aria-hidden="true">
<label for="collapse-section1" aria-hidden="true">__V1.0.0 / 31-May-2023__</label>
<div>
## Main Changes
- First official release of **MX66UW1G45G** octal SPI driver
##
</div>
:::
:::
:::
<footer class="sticky">
For complete documentation on <mark>STM32 Microcontrollers</mark> ,
visit: [[www.st.com](http://www.st.com/STM32)]{style="font-color: blue;"}
</footer>
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/**
******************************************************************************
* @file mx66uw1g45g.h
* @modify MCD Application Team
* @brief This file contains all the description of the
* MX66UW1G45G XSPI memory.
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef MX66UW1G45G_H
#define MX66UW1G45G_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "mx66uw1g45g_conf.h"
/** @addtogroup BSP
* @{
*/
/** @addtogroup Components
* @{
*/
/** @addtogroup MX66UW1G45G
* @{
*/
/** @defgroup MX66UW1G45G_Exported_Constants MX66UW1G45G Exported Constants
* @{
*/
/**
* @brief MX66UW1G45G Size configuration
*/
#define MX66UW1G45G_BLOCK_64K (uint32_t)(64 * 1024) /* 1024 blocks of 64KBytes */
#define MX66UW1G45G_BLOCK_4K (uint32_t)(4 * 1024) /* 16384 sectors of 4KBytes */
#define MX66UW1G45G_FLASH_SIZE (uint32_t)(1024*1024*1024/8) /* 1 Gbits => 128MBytes */
#define MX66UW1G45G_PAGE_SIZE (uint32_t)256 /* 262144 pages of 256 Bytes */
/**
* @brief MX66UW1G45G Timing configuration
*/
#define MX66UW1G45G_BULK_ERASE_MAX_TIME 460000U
#define MX66UW1G45G_BLOCK_ERASE_MAX_TIME 1000U
#define MX66UW1G45G_BLOCK_4K_ERASE_MAX_TIME 400U
#define MX66UW1G45G_WRITE_REG_MAX_TIME 40U
#define MX66UW1G45G_RESET_MAX_TIME 100U /* when SWreset during erase operation */
#define MX66UW1G45G_AUTOPOLLING_INTERVAL_TIME 0x10U
/**
* @brief MX66UW1G45G Error codes
*/
#define MX66UW1G45G_OK (0)
#define MX66UW1G45G_ERROR (-1)
/**
* @brief re-definition of legacy memory mapped functions
*/
#define MX66UW1G45G_EnableMemoryMappedModeDTR MX66UW1G45G_EnableDTRMemoryMappedMode
#define MX66UW1G45G_EnableMemoryMappedModeSTR MX66UW1G45G_EnableSTRMemoryMappedMode
/******************************************************************************
* @brief MX66UW1G45G Commands
****************************************************************************/
/*******************************************************************/
/********************************* SPI ****************************/
/*******************************************************************/
/***** READ/WRITE MEMORY Operations with 3-Byte Address ****************************/
#define MX66UW1G45G_READ_CMD 0x03U /*!< Normal Read 3 Byte Address */
#define MX66UW1G45G_FAST_READ_CMD 0x0BU /*!< Fast Read 3 Byte Address */
#define MX66UW1G45G_PAGE_PROG_CMD 0x02U /*!< Page Program 3 Byte Address */
#define MX66UW1G45G_SECTOR_ERASE_4K_CMD 0x20U /*!< SubSector Erase 4KB 3 Byte Address */
#define MX66UW1G45G_BLOCK_ERASE_64K_CMD 0xD8U /*!< Sector Erase 64KB 3 Byte Address */
#define MX66UW1G45G_BULK_ERASE_CMD 0x60U /*!< Bulk Erase */
/***** READ/WRITE MEMORY Operations with 4-Byte Address ****************************/
#define MX66UW1G45G_4_BYTE_ADDR_READ_CMD 0x13U /*!< Normal Read 4 Byte address */
#define MX66UW1G45G_4_BYTE_ADDR_FAST_READ_CMD 0x0CU /*!< Fast Read 4 Byte address */
#define MX66UW1G45G_4_BYTE_PAGE_PROG_CMD 0x12U /*!< Page Program 4 Byte Address */
#define MX66UW1G45G_4_BYTE_SECTOR_ERASE_4K_CMD 0x21U /*!< SubSector Erase 4KB 4 Byte Address */
#define MX66UW1G45G_4_BYTE_BLOCK_ERASE_64K_CMD 0xDCU /*!< Sector Erase 64KB 4 Byte Address */
/***** Setting commands ************************************************************/
#define MX66UW1G45G_WRITE_ENABLE_CMD 0x06U /*!< Write Enable */
#define MX66UW1G45G_WRITE_DISABLE_CMD 0x04U /*!< Write Disable */
#define MX66UW1G45G_PROG_ERASE_SUSPEND_CMD 0xB0U /*!< Program/Erase suspend */
#define MX66UW1G45G_PROG_ERASE_RESUME_CMD 0x30U /*!< Program/Erase resume */
#define MX66UW1G45G_ENTER_DEEP_POWER_DOWN_CMD 0xB9U /*!< Enter deep power down */
#define MX66UW1G45G_RELEASE_DEEP_POWER_DOWN_CMD 0xABU /*!< Release from deep power down */
#define MX66UW1G45G_SET_BURST_LENGTH_CMD 0xC0U /*!< Set burst length */
#define MX66UW1G45G_ENTER_SECURED_OTP_CMD 0xB1U /*!< Enter secured OTP) */
#define MX66UW1G45G_EXIT_SECURED_OTP_CMD 0xC1U /*!< Exit secured OTP) */
/***** RESET commands ************************************************************/
#define MX66UW1G45G_NOP_CMD 0x00U /*!< No operation */
#define MX66UW1G45G_RESET_ENABLE_CMD 0x66U /*!< Reset Enable */
#define MX66UW1G45G_RESET_MEMORY_CMD 0x99U /*!< Reset Memory */
/***** Register Commands (SPI) ****************************************************/
#define MX66UW1G45G_READ_ID_CMD 0x9FU /*!< Read IDentification */
#define MX66UW1G45G_READ_SERIAL_FLASH_DISCO_PARAM_CMD 0x5AU /*!< Read Serial Flash Discoverable Parameter */
#define MX66UW1G45G_READ_STATUS_REG_CMD 0x05U /*!< Read Status Register */
#define MX66UW1G45G_READ_CFG_REG_CMD 0x15U /*!< Read configuration Register */
#define MX66UW1G45G_WRITE_STATUS_REG_CMD 0x01U /*!< Write Status Register */
#define MX66UW1G45G_READ_CFG_REG2_CMD 0x71U /*!< Read configuration Register2 */
#define MX66UW1G45G_WRITE_CFG_REG2_CMD 0x72U /*!< Write configuration Register2 */
#define MX66UW1G45G_READ_FAST_BOOT_REG_CMD 0x16U /*!< Read fast boot Register */
#define MX66UW1G45G_WRITE_FAST_BOOT_REG_CMD 0x17U /*!< Write fast boot Register */
#define MX66UW1G45G_ERASE_FAST_BOOT_REG_CMD 0x18U /*!< Erase fast boot Register */
#define MX66UW1G45G_READ_SECURITY_REG_CMD 0x2BU /*!< Read security Register */
#define MX66UW1G45G_WRITE_SECURITY_REG_CMD 0x2FU /*!< Write security Register */
#define MX66UW1G45G_READ_LOCK_REG_CMD 0x2DU /*!< Read lock Register */
#define MX66UW1G45G_WRITE_LOCK_REG_CMD 0x2CU /*!< Write lock Register */
#define MX66UW1G45G_READ_DPB_REG_CMD 0xE0U /*!< Read DPB register */
#define MX66UW1G45G_WRITE_DPB_REG_CMD 0xE1U /*!< Write DPB register */
#define MX66UW1G45G_READ_SPB_STATUS_CMD 0xE2U /*!< Read SPB status */
#define MX66UW1G45G_WRITE_SPB_BIT_CMD 0xE3U /*!< SPB bit program */
#define MX66UW1G45G_ERASE_ALL_SPB_CMD 0xE4U /*!< Erase all SPB bit */
#define MX66UW1G45G_WRITE_PROTECT_SEL_CMD 0x68U /*!< Write Protect selection */
#define MX66UW1G45G_GANG_BLOCK_LOCK_CMD 0x7EU /*!< Gang block lock: whole chip write protect */
#define MX66UW1G45G_GANG_BLOCK_UNLOCK_CMD 0x98U /*!< Gang block unlock: whole chip write unprotect */
#define MX66UW1G45G_READ_PASSWORD_REGISTER_CMD 0x27U /*!< Read Password */
#define MX66UW1G45G_WRITE_PASSWORD_REGISTER_CMD 0x28U /*!< Write Password */
#define MX66UW1G45G_PASSWORD_UNLOCK_CMD 0x29U /*!< Unlock Password */
/*******************************************************************/
/********************************* OPI ****************************/
/*******************************************************************/
/***** READ/WRITE MEMORY Operations ****************************/
#define MX66UW1G45G_OCTA_READ_CMD 0xEC13U /*!< Octa IO Read */
#define MX66UW1G45G_OCTA_READ_DTR_CMD 0xEE11U /*!< Octa IO Read DTR */
#define MX66UW1G45G_OCTA_PAGE_PROG_CMD 0x12EDU /*!< Octa Page Program */
#define MX66UW1G45G_OCTA_SECTOR_ERASE_4K_CMD 0x21DEU /*!< Octa SubSector Erase 4KB */
#define MX66UW1G45G_OCTA_BLOCK_ERASE_64K_CMD 0xDC23U /*!< Octa Sector Erase 64KB 3 */
#define MX66UW1G45G_OCTA_BULK_ERASE_CMD 0x609FU /*!< Octa Bulk Erase */
/***** Setting commands ************************************************************/
#define MX66UW1G45G_OCTA_WRITE_ENABLE_CMD 0x06F9U /*!< Octa Write Enable */
#define MX66UW1G45G_OCTA_WRITE_DISABLE_CMD 0x04FBU /*!< Octa Write Disable */
#define MX66UW1G45G_OCTA_PROG_ERASE_SUSPEND_CMD 0xB04FU /*!< Octa Program/Erase suspend */
#define MX66UW1G45G_OCTA_PROG_ERASE_RESUME_CMD 0x30CFU /*!< Octa Program/Erase resume */
#define MX66UW1G45G_OCTA_ENTER_DEEP_POWER_DOWN_CMD 0xB946U /*!< Octa Enter deep power down */
#define MX66UW1G45G_OCTA_RELEASE_DEEP_POWER_DOWN_CMD 0xAB54U /*!< Octa Release from deep power down */
#define MX66UW1G45G_OCTA_SET_BURST_LENGTH_CMD 0xC03FU /*!< Octa Set burst length */
#define MX66UW1G45G_OCTA_ENTER_SECURED_OTP_CMD 0xB14EU /*!< Octa Enter secured OTP) */
#define MX66UW1G45G_OCTA_EXIT_SECURED_OTP_CMD 0xC13EU /*!< Octa Exit secured OTP) */
/***** RESET commands ************************************************************/
#define MX66UW1G45G_OCTA_NOP_CMD 0x00FFU /*!< Octa No operation */
#define MX66UW1G45G_OCTA_RESET_ENABLE_CMD 0x6699U /*!< Octa Reset Enable */
#define MX66UW1G45G_OCTA_RESET_MEMORY_CMD 0x9966U /*!< Octa Reset Memory */
/***** Register Commands (OPI) ****************************************************/
#define MX66UW1G45G_OCTA_READ_ID_CMD 0x9F60U /*!< Octa Read IDentification */
#define MX66UW1G45G_OCTA_READ_SERIAL_FLASH_DISCO_PARAM_CMD 0x5AA5U /*!< Octa Read Serial Flash Discoverable Parameter */
#define MX66UW1G45G_OCTA_READ_STATUS_REG_CMD 0x05FAU /*!< Octa Read Status Register */
#define MX66UW1G45G_OCTA_READ_CFG_REG_CMD 0x15EAU /*!< Octa Read configuration Register */
#define MX66UW1G45G_OCTA_WRITE_STATUS_REG_CMD 0x01FEU /*!< Octa Write Status Register */
#define MX66UW1G45G_OCTA_READ_CFG_REG2_CMD 0x718EU /*!< Octa Read configuration Register2 */
#define MX66UW1G45G_OCTA_WRITE_CFG_REG2_CMD 0x728DU /*!< Octa Write configuration Register2 */
#define MX66UW1G45G_OCTA_READ_FAST_BOOT_REG_CMD 0x16E9U /*!< Octa Read fast boot Register */
#define MX66UW1G45G_OCTA_WRITE_FAST_BOOT_REG_CMD 0x17E8U /*!< Octa Write fast boot Register */
#define MX66UW1G45G_OCTA_ERASE_FAST_BOOT_REG_CMD 0x18E7U /*!< Octa Erase fast boot Register */
#define MX66UW1G45G_OCTA_READ_SECURITY_REG_CMD 0x2BD4U /*!< Octa Read security Register */
#define MX66UW1G45G_OCTA_WRITE_SECURITY_REG_CMD 0x2FD0U /*!< Octa Write security Register */
#define MX66UW1G45G_OCTA_READ_LOCK_REG_CMD 0x2DD2U /*!< Octa Read lock Register */
#define MX66UW1G45G_OCTA_WRITE_LOCK_REG_CMD 0x2CD3U /*!< Octa Write lock Register */
#define MX66UW1G45G_OCTA_READ_DPB_REG_CMD 0xE01FU /*!< Octa Read DPB register */
#define MX66UW1G45G_OCTA_WRITE_DPB_REG_CMD 0xE11EU /*!< Octa Write DPB register */
#define MX66UW1G45G_OCTA_READ_SPB_STATUS_CMD 0xE21DU /*!< Octa Read SPB status */
#define MX66UW1G45G_OCTA_WRITE_SPB_BIT_CMD 0xE31CU /*!< Octa SPB bit program */
#define MX66UW1G45G_OCTA_ERASE_ALL_SPB_CMD 0xE41BU /*!< Octa Erase all SPB bit */
#define MX66UW1G45G_OCTA_WRITE_PROTECT_SEL_CMD 0x6897U /*!< Octa Write Protect selection */
#define MX66UW1G45G_OCTA_GANG_BLOCK_LOCK_CMD 0x7E81U /*!< Octa Gang block lock: whole chip write protect */
#define MX66UW1G45G_OCTA_GANG_BLOCK_UNLOCK_CMD 0x9867U /*!< Octa Gang block unlock: whole chip write unprote*/
#define MX66UW1G45G_OCTA_READ_PASSWORD_REGISTER_CMD 0x27D8U /*!< Octa Read Password */
#define MX66UW1G45G_OCTA_WRITE_PASSWORD_REGISTER_CMD 0x28D7U /*!< Octa Write Password */
#define MX66UW1G45G_OCTA_PASSWORD_UNLOCK_CMD 0x29D6U /*!< Octa Unlock Password */
/******************************************************************************
* @brief MX66UW1G45G Registers
****************************************************************************/
/* Status Register */
#define MX66UW1G45G_SR_WIP 0x01U /*!< Write in progress */
#define MX66UW1G45G_SR_WEL 0x02U /*!< Write enable latch */
#define MX66UW1G45G_SR_PB 0x3CU /*!< Block protected against program and erase operations */
/* Configuration Register 1 */
#define MX66UW1G45G_CR1_ODS 0x07U /*!< Output driver strength */
#define MX66UW1G45G_CR1_TB 0x08U /*!< Top / bottom selected */
#define MX66UW1G45G_CR1_PBE 0x10U /*!< Preamble bit enable */
/* Configuration Register 2 */
/* Address : 0x00000000 */
#define MX66UW1G45G_CR2_REG1_ADDR 0x00000000U /*!< CR2 register address 0x00000000 */
#define MX66UW1G45G_CR2_SOPI 0x01U /*!< STR OPI Enable */
#define MX66UW1G45G_CR2_DOPI 0x02U /*!< DTR OPI Enable */
/* Address : 0x00000200 */
#define MX66UW1G45G_CR2_REG2_ADDR 0x00000200U /*!< CR2 register address 0x00000200 */
#define MX66UW1G45G_CR2_DQSPRC 0x01U /*!< DTR DQS pre-cycle */
#define MX66UW1G45G_CR2_DOS 0x02U /*!< DQS on STR mode */
/* Address : 0x00000300 */
#define MX66UW1G45G_CR2_REG3_ADDR 0x00000300U /*!< CR2 register address 0x00000300 */
#define MX66UW1G45G_CR2_DC 0x07U /*!< Dummy cycle */
#define MX66UW1G45G_CR2_DC_20_CYCLES 0x00U /*!< 20 Dummy cycles */
#define MX66UW1G45G_CR2_DC_18_CYCLES 0x01U /*!< 18 Dummy cycles */
#define MX66UW1G45G_CR2_DC_16_CYCLES 0x02U /*!< 16 Dummy cycles */
#define MX66UW1G45G_CR2_DC_14_CYCLES 0x03U /*!< 14 Dummy cycles */
#define MX66UW1G45G_CR2_DC_12_CYCLES 0x04U /*!< 12 Dummy cycles */
#define MX66UW1G45G_CR2_DC_10_CYCLES 0x05U /*!< 10 Dummy cycles */
#define MX66UW1G45G_CR2_DC_8_CYCLES 0x06U /*!< 8 Dummy cycles */
#define MX66UW1G45G_CR2_DC_6_CYCLES 0x07U /*!< 6 Dummy cycles */
/* Address : 0x00000500 */
#define MX66UW1G45G_CR2_REG4_ADDR 0x00000500U /*!< CR2 register address 0x00000500 */
#define MX66UW1G45G_CR2_PPTSEL 0x01U /*!< Preamble pattern selection */
/* Address : 0x40000000 */
#define MX66UW1G45G_CR2_REG5_ADDR 0x40000000U /*!< CR2 register address 0x40000000 */
#define MX66UW1G45G_CR2_DEFSOPI 0x01U /*!< Enable SOPI after power on reset */
#define MX66UW1G45G_CR2_DEFDOPI 0x02U /*!< Enable DOPI after power on reset */
/* Security Register */
#define MX66UW1G45G_SECR_SOI 0x01U /*!< Secured OTP indicator */
#define MX66UW1G45G_SECR_LDSO 0x02U /*!< Lock-down secured OTP */
#define MX66UW1G45G_SECR_PSB 0x04U /*!< Program suspend bit */
#define MX66UW1G45G_SECR_ESB 0x08U /*!< Erase suspend bit */
#define MX66UW1G45G_SECR_P_FAIL 0x20U /*!< Program fail flag */
#define MX66UW1G45G_SECR_E_FAIL 0x40U /*!< Erase fail flag */
#define MX66UW1G45G_SECR_WPSEL 0x80U /*!< Write protection selection */
#define XSPI_ALTERNATE_BYTE_PATTERN 0x00U
/**
* @}
*/
/** @defgroup MX66UW1G45G_Exported_Types MX66UW1G45G Exported Types
* @{
*/
typedef struct
{
uint32_t FlashSize; /*!< Size of the flash */
uint32_t EraseSectorSize; /*!< Size of sectors for the erase operation */
uint32_t EraseSectorsNumber; /*!< Number of sectors for the erase operation */
uint32_t EraseSubSectorSize; /*!< Size of subsector for the erase operation */
uint32_t EraseSubSectorNumber; /*!< Number of subsector for the erase operation */
uint32_t EraseSubSector1Size; /*!< Size of subsector 1 for the erase operation */
uint32_t EraseSubSector1Number; /*!< Number of subsector 1 for the erase operation */
uint32_t ProgPageSize; /*!< Size of pages for the program operation */
uint32_t ProgPagesNumber; /*!< Number of pages for the program operation */
} MX66UW1G45G_Info_t;
typedef enum
{
MX66UW1G45G_SPI_MODE = 0, /*!< 1-1-1 commands, Power on H/W default setting */
MX66UW1G45G_OPI_MODE /*!< 8-8-8 commands */
} MX66UW1G45G_Interface_t;
typedef enum
{
MX66UW1G45G_STR_TRANSFER = 0, /*!< Single Transfer Rate */
MX66UW1G45G_DTR_TRANSFER /*!< Double Transfer Rate */
} MX66UW1G45G_Transfer_t;
typedef enum
{
MX66UW1G45G_ERASE_4K = 0, /*!< 4K size Sector erase */
MX66UW1G45G_ERASE_64K, /*!< 64K size Block erase */
MX66UW1G45G_ERASE_BULK /*!< Whole bulk erase */
} MX66UW1G45G_Erase_t;
typedef enum
{
MX66UW1G45G_3BYTES_SIZE = 0, /*!< 3 Bytes address mode */
MX66UW1G45G_4BYTES_SIZE /*!< 4 Bytes address mode */
} MX66UW1G45G_AddressWidth_t;
/**
* @}
*/
/** @defgroup MX66UW1G45G_Exported_Functions MX66UW1G45G Exported Functions
* @{
*/
/* Function by commands combined */
int32_t MX66UW1G45G_GetFlashInfo(MX66UW1G45G_Info_t *pInfo);
int32_t MX66UW1G45G_AutoPollingMemReady(XSPI_HandleTypeDef *Ctx, MX66UW1G45G_Interface_t Mode,
MX66UW1G45G_Transfer_t Rate);
/* Read/Write Array Commands **************************************************/
int32_t MX66UW1G45G_ReadSTR(XSPI_HandleTypeDef *Ctx, MX66UW1G45G_Interface_t Mode,
MX66UW1G45G_AddressWidth_t AddressWidth, uint8_t *pData, uint32_t ReadAddr, uint32_t Size);
int32_t MX66UW1G45G_ReadDTR(XSPI_HandleTypeDef *Ctx, uint8_t *pData, uint32_t ReadAddr, uint32_t Size);
int32_t MX66UW1G45G_PageProgram(XSPI_HandleTypeDef *Ctx, MX66UW1G45G_Interface_t Mode,
MX66UW1G45G_AddressWidth_t AddressWidth, uint8_t *pData, uint32_t WriteAddr,
uint32_t Size);
int32_t MX66UW1G45G_PageProgramDTR(XSPI_HandleTypeDef *Ctx, uint8_t *pData, uint32_t WriteAddr, uint32_t Size);
int32_t MX66UW1G45G_BlockErase(XSPI_HandleTypeDef *Ctx, MX66UW1G45G_Interface_t Mode, MX66UW1G45G_Transfer_t Rate,
MX66UW1G45G_AddressWidth_t AddressWidth, uint32_t BlockAddress,
MX66UW1G45G_Erase_t BlockSize);
int32_t MX66UW1G45G_ChipErase(XSPI_HandleTypeDef *Ctx, MX66UW1G45G_Interface_t Mode, MX66UW1G45G_Transfer_t Rate);
int32_t MX66UW1G45G_EnableMemoryMappedModeSTR(XSPI_HandleTypeDef *Ctx, MX66UW1G45G_Interface_t Mode,
MX66UW1G45G_AddressWidth_t AddressWidth);
int32_t MX66UW1G45G_EnableMemoryMappedModeDTR(XSPI_HandleTypeDef *Ctx, MX66UW1G45G_Interface_t Mode);
int32_t MX66UW1G45G_Suspend(XSPI_HandleTypeDef *Ctx, MX66UW1G45G_Interface_t Mode, MX66UW1G45G_Transfer_t Rate);
int32_t MX66UW1G45G_Resume(XSPI_HandleTypeDef *Ctx, MX66UW1G45G_Interface_t Mode, MX66UW1G45G_Transfer_t Rate);
/* Register/Setting Commands **************************************************/
int32_t MX66UW1G45G_WriteEnable(XSPI_HandleTypeDef *Ctx, MX66UW1G45G_Interface_t Mode, MX66UW1G45G_Transfer_t Rate);
int32_t MX66UW1G45G_WriteDisable(XSPI_HandleTypeDef *Ctx, MX66UW1G45G_Interface_t Mode, MX66UW1G45G_Transfer_t Rate);
int32_t MX66UW1G45G_ReadStatusRegister(XSPI_HandleTypeDef *Ctx, MX66UW1G45G_Interface_t Mode,
MX66UW1G45G_Transfer_t Rate, uint8_t *Value);
int32_t MX66UW1G45G_WriteStatusRegister(XSPI_HandleTypeDef *Ctx, MX66UW1G45G_Interface_t Mode,
MX66UW1G45G_Transfer_t Rate, uint8_t Value);
int32_t MX66UW1G45G_WriteCfgRegister(XSPI_HandleTypeDef *Ctx, MX66UW1G45G_Interface_t Mode,
MX66UW1G45G_Transfer_t Rate, uint8_t Value);
int32_t MX66UW1G45G_ReadCfgRegister(XSPI_HandleTypeDef *Ctx, MX66UW1G45G_Interface_t Mode,
MX66UW1G45G_Transfer_t Rate, uint8_t *Value);
int32_t MX66UW1G45G_WriteCfg2Register(XSPI_HandleTypeDef *Ctx, MX66UW1G45G_Interface_t Mode,
MX66UW1G45G_Transfer_t Rate, uint32_t WriteAddr, uint8_t Value);
int32_t MX66UW1G45G_ReadCfg2Register(XSPI_HandleTypeDef *Ctx, MX66UW1G45G_Interface_t Mode,
MX66UW1G45G_Transfer_t Rate, uint32_t ReadAddr, uint8_t *Value);
int32_t MX66UW1G45G_WriteSecurityRegister(XSPI_HandleTypeDef *Ctx, MX66UW1G45G_Interface_t Mode,
MX66UW1G45G_Transfer_t Rate, uint8_t Value);
int32_t MX66UW1G45G_ReadSecurityRegister(XSPI_HandleTypeDef *Ctx, MX66UW1G45G_Interface_t Mode,
MX66UW1G45G_Transfer_t Rate, uint8_t *Value);
/* ID/Security Commands *******************************************************/
int32_t MX66UW1G45G_ReadID(XSPI_HandleTypeDef *Ctx, MX66UW1G45G_Interface_t Mode, MX66UW1G45G_Transfer_t Rate,
uint8_t *ID);
/* Reset Commands *************************************************************/
int32_t MX66UW1G45G_ResetEnable(XSPI_HandleTypeDef *Ctx, MX66UW1G45G_Interface_t Mode, MX66UW1G45G_Transfer_t Rate);
int32_t MX66UW1G45G_ResetMemory(XSPI_HandleTypeDef *Ctx, MX66UW1G45G_Interface_t Mode, MX66UW1G45G_Transfer_t Rate);
int32_t MX66UW1G45G_NoOperation(XSPI_HandleTypeDef *Ctx, MX66UW1G45G_Interface_t Mode, MX66UW1G45G_Transfer_t Rate);
int32_t MX66UW1G45G_EnterPowerDown(XSPI_HandleTypeDef *Ctx, MX66UW1G45G_Interface_t Mode,
MX66UW1G45G_Transfer_t Rate);
int32_t MX66UW1G45G_ReleasePowerDown(XSPI_HandleTypeDef *Ctx, MX66UW1G45G_Interface_t Mode,
MX66UW1G45G_Transfer_t Rate);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* MX66UW1G45G_H */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
Drivers/STM32H7RSxx_BSP/Components/mx66uw1g45g/mx66uw1g45g_conf_template.h
+51
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/**
******************************************************************************
* @file mx66uw1g45g_conf.h
* @author MCD Application Team
* @brief MX66UW1G45G OctoSPI memory configuration template file.
* This file should be copied to the application folder and renamed
* to mx66uw1g45g_conf.h
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef MX66UW1G45G_CONF_H
#define MX66UW1G45G_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32xxxx_hal.h"
/** @addtogroup BSP
* @{
*/
#define CONF_OSPI_ODS MX66UW1G45G_CR_ODS_24 /* MX66UW1G45G Output Driver Strength */
#define DUMMY_CYCLES_READ 8U
#define DUMMY_CYCLES_READ_OCTAL 6U
#define DUMMY_CYCLES_READ_OCTAL_DTR 6U
#define DUMMY_CYCLES_REG_OCTAL 4U
#define DUMMY_CYCLES_REG_OCTAL_DTR 5U
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* MX66UW1G45G_CONF_H */
Drivers/STM32H7RSxx_BSP/Components/wm8904/LICENSE.md
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Copyright 2023 STMicroelectronics.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation and/or
other materials provided with the distribution.
3. Neither the name of the copyright holder nor the names of its contributors
may be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Drivers/STM32H7RSxx_BSP/Components/wm8904/LICENSE.txt
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This software component is provided to you as part of a software package and
applicable license terms are in the Package_license file. If you received this
software component outside of a package or without applicable license terms,
the terms of the BSD-3-Clause license shall apply.
You may obtain a copy of the BSD-3-Clause at:
https://opensource.org/licenses/BSD-3-Clause
Drivers/STM32H7RSxx_BSP/Components/wm8904/Release_Notes.html
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<!DOCTYPE html>
<html xmlns="http://www.w3.org/1999/xhtml" lang="en" xml:lang="en">
<head>
<meta charset="utf-8" />
<meta name="generator" content="pandoc" />
<meta name="viewport" content="width=device-width, initial-scale=1.0, user-scalable=yes" />
<title>Release Notes for WM8904 Audio Codec Component Driver</title>
<style>
code{white-space: pre-wrap;}
span.smallcaps{font-variant: small-caps;}
div.columns{display: flex; gap: min(4vw, 1.5em);}
div.column{flex: auto; overflow-x: auto;}
div.hanging-indent{margin-left: 1.5em; text-indent: -1.5em;}
/* The extra [class] is a hack that increases specificity enough to
override a similar rule in reveal.js */
ul.task-list[class]{list-style: none;}
ul.task-list li input[type="checkbox"] {
font-size: inherit;
width: 0.8em;
margin: 0 0.8em 0.2em -1.6em;
vertical-align: middle;
}
.display.math{display: block; text-align: center; margin: 0.5rem auto;}
</style>
<link rel="stylesheet" href="_htmresc/mini-st_2020.css" />
<link rel="icon" type="image/x-icon" href="_htmresc/favicon.png" />
</head>
<body>
<div class="row">
<div class="col-sm-12 col-lg-4">
<center>
<h1 id="release-notes-for-wm8904-component-driver">Release Notes for
<mark>WM8904</mark> Component Driver</h1>
<p>Copyright © 2024 STMicroelectronics<br />
</p>
<a href="https://www.st.com" class="logo"><img
src="_htmresc/st_logo_2020.png" alt="ST logo" /></a>
</center>
<h1 id="purpose">Purpose</h1>
<p>This driver provides a set of audio functions offered by WM8904 Codec
component</p>
</div>
<section id="update-history" class="col-sm-12 col-lg-8">
<h1>Update History</h1>
<div class="collapse">
<input type="checkbox" id="collapse-section3" checked aria-hidden="true">
<label for="collapse-section3" aria-hidden="true"><strong>V1.1.1 /
15-September-2025</strong></label>
<h2 id="main-changes">Main Changes</h2>
<ul>
<li>Maintenance release of <strong>WM8904</strong> Audio Codec
driver</li>
<li>Changes compared with V1.1.0 release
<ul>
<li>Reduce excessive initialization delay by checking stabilization
ready flag instead of waiting a fixed time</li>
<li>Update initialization to use output device passed as parameter
instead of current device which is not yet initialized</li>
</ul></li>
</ul>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section2" aria-hidden="true">
<label for="collapse-section2" aria-hidden="true"><strong>V1.1.0 /
20-September-2024</strong></label>
<h2 id="main-changes-1">Main Changes</h2>
<ul>
<li>First maintenance release of <strong>WM8904</strong> Audio Codec
driver</li>
<li>Changes compared with V1.0.0 release
<ul>
<li>Update input devices to be defined as bitfields</li>
<li>Implement LINE_IN2 and digital microphone path</li>
<li>Add 24KHz audio frequency support</li>
<li>Update IsInitialized variable at the end of init function
WM8904_Init()</li>
</ul></li>
</ul>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section1" aria-hidden="true">
<label for="collapse-section1" aria-hidden="true"><strong>V1.0.0 /
28-February-2024</strong></label>
<h2 id="main-changes-2">Main Changes</h2>
<ul>
<li>First official release of <strong>WM8904</strong> Audio Codec
driver</li>
</ul>
</div>
</section>
</div>
<footer class="sticky">
For complete documentation on <mark>STM32 Microcontrollers</mark> ,
visit: <span style="font-color: blue;"><a
href="http://www.st.com/STM32">www.st.com</a></span>
</footer>
</body>
</html>
Drivers/STM32H7RSxx_BSP/Components/wm8904/Release_Notes.md
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---
pagetitle: Release Notes for WM8904 Audio Codec Component Driver
lang: en
header-includes: <link rel="icon" type="image/x-icon" href="_htmresc/favicon.png" />
---
::: {.row}
::: {.col-sm-12 .col-lg-4}
<center>
# Release Notes for <mark>WM8904</mark> Component Driver
Copyright &copy; 2024 STMicroelectronics\
[![ST logo](_htmresc/st_logo_2020.png)](https://www.st.com){.logo}
</center>
# Purpose
This driver provides a set of audio functions offered by WM8904 Codec component
:::
::: {.col-sm-12 .col-lg-8}
# Update History
::: {.collapse}
<input type="checkbox" id="collapse-section3" checked aria-hidden="true">
<label for="collapse-section3" aria-hidden="true">__V1.1.1 / 15-September-2025__</label>
<div>
## Main Changes
- Maintenance release of **WM8904** Audio Codec driver
- Changes compared with V1.1.0 release
- Reduce excessive initialization delay by checking stabilization ready flag instead of waiting a fixed time
- Update initialization to use output device passed as parameter instead of current device which is not yet initialized
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section2" aria-hidden="true">
<label for="collapse-section2" aria-hidden="true">__V1.1.0 / 20-September-2024__</label>
<div>
## Main Changes
- First maintenance release of **WM8904** Audio Codec driver
- Changes compared with V1.0.0 release
- Update input devices to be defined as bitfields
- Implement LINE_IN2 and digital microphone path
- Add 24KHz audio frequency support
- Update IsInitialized variable at the end of init function WM8904_Init()
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section1" aria-hidden="true">
<label for="collapse-section1" aria-hidden="true">__V1.0.0 / 28-February-2024__</label>
<div>
## Main Changes
- First official release of **WM8904** Audio Codec driver
</div>
:::
:::
:::
<footer class="sticky">
For complete documentation on <mark>STM32 Microcontrollers</mark> ,
visit: [[www.st.com](http://www.st.com/STM32)]{style="font-color: blue;"}
</footer>
Drivers/STM32H7RSxx_BSP/Components/wm8904/_htmresc/Add button.svg
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Drivers/STM32H7RSxx_BSP/Components/wm8904/wm8904.c
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Drivers/STM32H7RSxx_BSP/Components/wm8904/wm8904.h
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/**
******************************************************************************
* @file wm8904.h
* @author MCD Application Team
* @brief This file contains all the functions prototypes for the
* wm8904.c driver.
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef WM8904_H
#define WM8904_H
/* Includes ------------------------------------------------------------------*/
#include "wm8904_reg.h"
#include <stddef.h>
/** @addtogroup BSP
* @{
*/
/** @addtogroup Component
* @{
*/
/** @addtogroup WM8904
* @{
*/
/** @defgroup WM8904_Exported_Types Exported Types
* @{
*/
typedef int32_t (*WM8904_Init_Func) (void);
typedef int32_t (*WM8904_DeInit_Func) (void);
typedef int32_t (*WM8904_GetTick_Func) (void);
typedef int32_t (*WM8904_WriteReg_Func)(uint16_t, uint16_t, uint8_t*, uint16_t);
typedef int32_t (*WM8904_ReadReg_Func) (uint16_t, uint16_t, uint8_t*, uint16_t);
typedef struct
{
WM8904_Init_Func Init;
WM8904_DeInit_Func DeInit;
uint16_t Address;
WM8904_WriteReg_Func WriteReg;
WM8904_ReadReg_Func ReadReg;
WM8904_GetTick_Func GetTick;
} WM8904_IO_t;
typedef struct
{
WM8904_IO_t IO;
wm8904_ctx_t Ctx;
uint8_t IsInitialized;
} WM8904_Object_t;
typedef struct
{
uint32_t InputDevice;
uint32_t OutputDevice;
uint32_t Frequency;
uint32_t Resolution;
uint32_t Volume;
} WM8904_Init_t;
typedef struct
{
int32_t ( *Init ) ( WM8904_Object_t *, WM8904_Init_t* );
int32_t ( *DeInit ) ( WM8904_Object_t * );
int32_t ( *ReadID ) ( WM8904_Object_t *, uint32_t * );
int32_t ( *Play ) ( WM8904_Object_t * );
int32_t ( *Pause ) ( WM8904_Object_t * );
int32_t ( *Resume ) ( WM8904_Object_t * );
int32_t ( *Stop ) ( WM8904_Object_t *, uint32_t );
int32_t ( *SetFrequency ) ( WM8904_Object_t *, uint32_t );
int32_t ( *GetFrequency ) ( WM8904_Object_t *, uint32_t*);
int32_t ( *SetVolume ) ( WM8904_Object_t *, uint32_t, uint8_t );
int32_t ( *GetVolume ) ( WM8904_Object_t *, uint32_t, uint8_t*);
int32_t ( *SetMute ) ( WM8904_Object_t *, uint32_t );
int32_t ( *SetOutputMode ) ( WM8904_Object_t *, uint32_t );
int32_t ( *SetResolution ) ( WM8904_Object_t *, uint32_t );
int32_t ( *GetResolution ) ( WM8904_Object_t *, uint32_t*);
int32_t ( *SetProtocol ) ( WM8904_Object_t *, uint32_t );
int32_t ( *GetProtocol ) ( WM8904_Object_t *, uint32_t*);
int32_t ( *Reset ) ( WM8904_Object_t * );
} WM8904_Drv_t;
/**
* @}
*/
/** @defgroup WM8904_Exported_Constants Exported Constants
* @{
*/
#define WM8904_OK (0)
#define WM8904_ERROR (-1)
/******************************************************************************/
/*************************** Codec User defines ******************************/
/******************************************************************************/
/* Audio Input Device */
#define WM8904_IN_NONE 0x0000U
#define WM8904_IN_MIC1 0x0100U
#define WM8904_IN_MIC2 0x0200U
#define WM8904_IN_MIC1_MIC2 0x0300U
#define WM8904_IN_LINE1 0x0400U
#define WM8904_IN_LINE2 0x0800U
#define WM8904_IN_DIGITAL_MIC1 0x1000U
#define WM8904_IN_DIGITAL_MIC2 0x2000U
/* Audio Output Device */
#define WM8904_OUT_NONE 0x0000U
#define WM8904_OUT_HEADPHONE 0x0001U
#define WM8904_OUT_LINE 0x0002U
#define WM8904_OUT_BOTH 0x0003U
/* AUDIO FREQUENCY */
#define WM8904_FREQUENCY_192K 192000U
#define WM8904_FREQUENCY_176K 176400U
#define WM8904_FREQUENCY_96K 96000U
#define WM8904_FREQUENCY_88K 88200U
#define WM8904_FREQUENCY_48K 48000U
#define WM8904_FREQUENCY_44K 44100U
#define WM8904_FREQUENCY_32K 32000U
#define WM8904_FREQUENCY_24K 24000U
#define WM8904_FREQUENCY_22K 22050U
#define WM8904_FREQUENCY_16K 16000U
#define WM8904_FREQUENCY_11K 11025U
#define WM8904_FREQUENCY_8K 8000U
/* AUDIO RESOLUTION */
#define WM8904_RESOLUTION_16B 0x00U
#define WM8904_RESOLUTION_20B 0x01U
#define WM8904_RESOLUTION_24B 0x02U
#define WM8904_RESOLUTION_32B 0x03U
/* Codec stop options */
#define WM8904_PDWN_HW 0x00U
#define WM8904_PDWN_SW 0x01U
/* Volume Input Output selection */
#define VOLUME_INPUT 0U
#define VOLUME_OUTPUT 1U
/* MUTE commands */
#define WM8904_MUTE_ON 1U
#define WM8904_MUTE_OFF 0U
/* AUDIO PROTOCOL */
#define WM8904_PROTOCOL_R_JUSTIFIED 0x0000U
#define WM8904_PROTOCOL_L_JUSTIFIED 0x0001U
#define WM8904_PROTOCOL_I2S 0x0002U
#define WM8904_PROTOCOL_DSP 0x0003U
/**
* @brief WM8904 ID
*/
#define WM8904_ID 0x8904U
#define WM8904_ID_MASK 0xFFFFU
/**
* @}
*/
/** @addtogroup WM8904_Exported_Variables
* @{
*/
/* Audio driver structure */
extern WM8904_Drv_t WM8904_Driver;
/**
* @}
*/
/** @addtogroup WM8904_Exported_Functions
* @{
*/
/*------------------------------------------------------------------------------
Audio Codec functions
------------------------------------------------------------------------------*/
/* High Layer codec functions */
int32_t WM8904_RegisterBusIO (WM8904_Object_t *pObj, const WM8904_IO_t *pIO);
int32_t WM8904_Init(WM8904_Object_t *pObj, WM8904_Init_t *pInit);
int32_t WM8904_DeInit(WM8904_Object_t *pObj);
int32_t WM8904_ReadID(WM8904_Object_t *pObj, uint32_t *Id);
int32_t WM8904_Play(WM8904_Object_t *pObj);
int32_t WM8904_Pause(WM8904_Object_t *pObj);
int32_t WM8904_Resume(WM8904_Object_t *pObj);
int32_t WM8904_Stop(WM8904_Object_t *pObj, uint32_t CodecPdwnMode);
int32_t WM8904_SetVolume(WM8904_Object_t *pObj, uint32_t InputOutput, uint8_t Volume);
int32_t WM8904_GetVolume(WM8904_Object_t *pObj, uint32_t InputOutput, uint8_t *Volume);
int32_t WM8904_SetMute(WM8904_Object_t *pObj, uint32_t Cmd);
int32_t WM8904_SetOutputMode(WM8904_Object_t *pObj, uint32_t Output);
int32_t WM8904_SetResolution(WM8904_Object_t *pObj, uint32_t Resolution);
int32_t WM8904_GetResolution(WM8904_Object_t *pObj, uint32_t *Resolution);
int32_t WM8904_SetProtocol(WM8904_Object_t *pObj, uint32_t Protocol);
int32_t WM8904_GetProtocol(WM8904_Object_t *pObj, uint32_t *Protocol);
int32_t WM8904_SetFrequency(WM8904_Object_t *pObj, uint32_t AudioFreq);
int32_t WM8904_GetFrequency(WM8904_Object_t *pObj, uint32_t *AudioFreq);
int32_t WM8904_Reset(WM8904_Object_t *pObj);
/**
* @}
*/
#endif /* WM8904_H */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
Drivers/STM32H7RSxx_BSP/Components/wm8904/wm8904_reg.c
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/**
******************************************************************************
* @file wm8904_reg.c
* @author MCD Application Team
* @brief This file provides unitary register function to control the WM8904
* Audio Codec driver.
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "wm8904_reg.h"
/** @addtogroup BSP
* @{
*/
/** @addtogroup Components
* @{
*/
/** @addtogroup wm8904
* @brief This file provides a set of functions needed to drive the
* WM8904 audio codec.
* @{
*/
/************** Generic Function *******************/
/*******************************************************************************
* Function Name : wm8904_read_reg
* Description : Generic Reading function. It must be full-filled with either
* I2C or SPI reading functions
* Input : Register Address, length of buffer
* Output : data Read
*******************************************************************************/
int32_t wm8904_read_reg(const wm8904_ctx_t *ctx, uint16_t reg, uint16_t* data, uint16_t length)
{
int32_t ret;
uint16_t tmp;
ret = ctx->ReadReg(ctx->handle, reg, (uint8_t *)data, length);
if(ret >= 0)
{
tmp = ((uint16_t)(*data >> 8) & 0x00FFU);
tmp |= ((uint16_t)(*data << 8) & 0xFF00U);
*data = tmp;
}
return ret;
}
/*******************************************************************************
* Function Name : wm8904_write_reg
* Description : Generic Writing function. It must be full-filled with either
* I2C or SPI writing function
* Input : Register Address, data to be written, length of buffer
* Output : None
*******************************************************************************/
int32_t wm8904_write_reg(const wm8904_ctx_t *ctx, uint16_t reg, const uint16_t *data, uint16_t length)
{
uint16_t tmp;
tmp = ((uint16_t)(*data >> 8) & 0x00FFU);
tmp |= ((uint16_t)(*data << 8) & 0xFF00U);
return ctx->WriteReg(ctx->handle, reg, (uint8_t *)&tmp, length);
}
/******************************************************************************/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
Drivers/STM32H7RSxx_BSP/Components/wm8904/wm8904_reg.h
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/**
******************************************************************************
* @file wm8904_reg.h
* @author MCD Application Team
* @brief Header of wm8904_reg.c
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef WM8904_REG_H
#define WM8904_REG_H
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
/** @addtogroup BSP
* @{
*/
/** @addtogroup Component
* @{
*/
/** @addtogroup WM8904
* @{
*/
/** @addtogroup WM8904_Exported_Constants
* @{
*/
/******************************************************************************/
/****************************** REGISTER MAPPING ******************************/
/******************************************************************************/
/* SW Reset */
#define WM8904_SW_RESET 0x0000U
/* Bias Control */
#define WM8904_BIAS_CONTROL0 0x0004U
#define WM8904_VMID_CONTROL0 0x0005U
#define WM8904_MIC_BIAS_CONTROL0 0x0006U
#define WM8904_MIC_BIAS_CONTROL1 0x0007U
#define WM8904_ANALOG_ADC0 0x000AU
/* Power Management */
#define WM8904_PWR_MANAGEMENT0 0x000CU
#define WM8904_PWR_MANAGEMENT2 0x000EU
#define WM8904_PWR_MANAGEMENT3 0x000FU
#define WM8904_PWR_MANAGEMENT6 0x0012U
/* Clock Rates */
#define WM8904_CLOCK_RATES0 0x0014U
#define WM8904_CLOCK_RATES1 0x0015U
#define WM8904_CLOCK_RATES2 0x0016U
/* Audio Interface */
#define WM8904_AUDIO_INTERFACE0 0x0018U
#define WM8904_AUDIO_INTERFACE1 0x0019U
#define WM8904_AUDIO_INTERFACE2 0x001AU
#define WM8904_AUDIO_INTERFACE3 0x001BU
/* DAC */
#define WM8904_DAC_DIGITAL_VOL_LEFT 0x001EU
#define WM8904_DAC_DIGITAL_VOL_RIGHT 0x001FU
#define WM8904_DAC_DIGITAL0 0x0020U
#define WM8904_DAC_DIGITAL1 0x0021U
/* ADC */
#define WM8904_ADC_DIGITAL_VOL_LEFT 0x0024U
#define WM8904_ADC_DIGITAL_VOL_RIGHT 0x0025U
#define WM8904_ADC_DIGITAL0 0x0026U
#define WM8904_DIGITAL_MICROPHONE0 0x0027U
/* DRC */
#define WM8904_DRC0 0x0028U
#define WM8904_DRC1 0x0029U
#define WM8904_DRC2 0x002AU
#define WM8904_DRC3 0x002BU
/* Analog */
#define WM8904_ANALOG_LEFT_INPUT0 0x002CU
#define WM8904_ANALOG_RIGHT_INPUT0 0x002DU
#define WM8904_ANALOG_LEFT_INPUT1 0x002EU
#define WM8904_ANALOG_RIGHT_INPUT1 0x002FU
#define WM8904_ANALOG_OUTPUT1_LEFT 0x0039U
#define WM8904_ANALOG_OUTPUT1_RIGHT 0x003AU
#define WM8904_ANALOG_OUTPUT2_LEFT 0x003BU
#define WM8904_ANALOG_OUTPUT2_RIGHT 0x003CU
#define WM8904_ANALOG_OUTPUT12_ZC 0x003DU
/* DC Servo */
#define WM8904_DC_SERVO0 0x0043U
#define WM8904_DC_SERVO1 0x0044U
#define WM8904_DC_SERVO2 0x0045U
#define WM8904_DC_SERVO4 0x0047U
#define WM8904_DC_SERVO5 0x0048U
#define WM8904_DC_SERVO6 0x0049U
#define WM8904_DC_SERVO7 0x004AU
#define WM8904_DC_SERVO8 0x004BU
#define WM8904_DC_SERVO9 0x004CU
#define WM8904_DC_SERVO_READBACK0 0x004DU
/* Analog */
#define WM8904_ANALOG_HP0 0x005AU
#define WM8904_ANALOG_LINEOUT0 0x005EU
/* Charge pump */
#define WM8904_CHARGE_PUMP0 0x0062U
/* Class W/G */
#define WM8904_CLASS_W0 0x0068U
/* Write Sequencer */
#define WM8904_WRITE_SEQUENCER0 0x006CU
#define WM8904_WRITE_SEQUENCER1 0x006DU
#define WM8904_WRITE_SEQUENCER2 0x006EU
#define WM8904_WRITE_SEQUENCER3 0x006FU
#define WM8904_WRITE_SEQUENCER4 0x0070U
/* FLL Control */
#define WM8904_FLL_CONTROL1 0x0074U
#define WM8904_FLL_CONTROL2 0x0075U
#define WM8904_FLL_CONTROL3 0x0076U
#define WM8904_FLL_CONTROL4 0x0077U
#define WM8904_FLL_CONTROL5 0x0078U
/* GPIO Control */
#define WM8904_GPIO_CONTROL1 0x0079U
#define WM8904_GPIO_CONTROL2 0x007AU
#define WM8904_GPIO_CONTROL3 0x007BU
#define WM8904_GPIO_CONTROL4 0x007CU
#define WM8904_DIGITAL_PULLS 0x007EU
/* Interrupt */
#define WM8904_INTERRUPT_STATUS 0x007FU
#define WM8904_INTERRUPT_STATUS_MASK 0x0080U
#define WM8904_INTERRUPT_POLARITY 0x0081U
#define WM8904_INTERRUPT_DEBOUNCE 0x0082U
/* EQ */
#define WM8904_EQ1 0x0086U
#define WM8904_EQ2 0x0087U
#define WM8904_EQ3 0x0088U
#define WM8904_EQ4 0x0089U
#define WM8904_EQ5 0x008AU
#define WM8904_EQ6 0x008BU
#define WM8904_EQ7 0x008CU
#define WM8904_EQ8 0x008DU
#define WM8904_EQ9 0x008EU
#define WM8904_EQ10 0x008FU
#define WM8904_EQ11 0x0090U
#define WM8904_EQ12 0x0091U
#define WM8904_EQ13 0x0092U
#define WM8904_EQ14 0x0093U
#define WM8904_EQ15 0x0094U
#define WM8904_EQ16 0x0095U
#define WM8904_EQ17 0x0096U
#define WM8904_EQ18 0x0097U
#define WM8904_EQ19 0x0098U
#define WM8904_EQ20 0x0099U
#define WM8904_EQ21 0x009AU
#define WM8904_EQ22 0x009BU
#define WM8904_EQ23 0x009CU
#define WM8904_EQ24 0x009DU
#define WM8904_ADC_TEST0 0x00C6U
#define WM8904_FLL_TEST0 0x00F7U
#define WM8904_FLL_TEST1 0x00F8U
/**
* @}
*/
/************** Generic Function *******************/
typedef int32_t (*WM8904_Write_Func)(void *, uint16_t, uint8_t*, uint16_t);
typedef int32_t (*WM8904_Read_Func) (void *, uint16_t, uint8_t*, uint16_t);
typedef struct
{
WM8904_Write_Func WriteReg;
WM8904_Read_Func ReadReg;
void *handle;
} wm8904_ctx_t;
/*******************************************************************************
* Register : Generic - All
* Address : Generic - All
* Bit Group Name: None
* Permission : W
*******************************************************************************/
int32_t wm8904_write_reg(const wm8904_ctx_t *ctx, uint16_t reg, const uint16_t *data, uint16_t length);
int32_t wm8904_read_reg(const wm8904_ctx_t *ctx, uint16_t reg, uint16_t* data, uint16_t length);
#ifdef __cplusplus
}
#endif
#endif /* WM8904_REG_H */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
Drivers/STM32H7RSxx_BSP/STM32H7S78-DK/.DS_Store
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BIN
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Drivers/STM32H7RSxx_BSP/STM32H7S78-DK/LICENSE.md
+27
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Copyright 2022(-2023) STMicroelectronics.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation and/or
other materials provided with the distribution.
3. Neither the name of the copyright holder nor the names of its contributors
may be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Drivers/STM32H7RSxx_BSP/STM32H7S78-DK/LICENSE.txt
+6
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This software component is provided to you as part of a software package and
applicable license terms are in the Package_license file. If you received this
software component outside of a package or without applicable license terms,
the terms of the BSD-3-Clause license shall apply.
You may obtain a copy of the BSD-3-Clause at:
https://opensource.org/licenses/BSD-3-Clause
Drivers/STM32H7RSxx_BSP/STM32H7S78-DK/README.md
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# BSP STM32H7S78-DK Component
![latest tag](https://img.shields.io/github/v/tag/STMicroelectronics/stm32h7s78-dk.svg?color=brightgreen)
## Overview
**STM32Cube** is an STMicroelectronics original initiative to ease developers' life by reducing efforts, time and cost.
**STM32Cube** covers the overall STM32 products portfolio. It includes a comprehensive embedded software platform delivered for each STM32 series.
* The CMSIS modules (core and device) corresponding to the ARM(tm) core implemented in this STM32 product.
* The STM32 HAL-LL drivers, an abstraction layer offering a set of APIs ensuring maximized portability across the STM32 portfolio.
* The BSP drivers of each evaluation, demonstration or nucleo board provided for this STM32 series.
* A consistent set of middleware libraries such as RTOS, USB, FatFS, graphics, touch sensing library...
* A full set of software projects (basic examples, applications, and demonstrations) for each board provided for this STM32 series.
Two models of publication are proposed for the STM32Cube embedded software:
* The monolithic **MCU Package**: all STM32Cube software modules of one STM32 series are present (Drivers, Middleware, Projects, Utilities) in the repository (usual name **STM32Cubexx**, xx corresponding to the STM32 series).
* The **MCU component**: each STM32Cube software module being part of the STM32Cube MCU Package, is delivered as an individual repository, allowing the user to select and get only the required software functions.
## Description
This **stm32h7s78-dk** MCU component repository is one element of the **STM32CubeH7RS** MCU embedded software package, providing the **STM32H7RS-DK** BSP BOARD component part.
## Release note
Details about the content of this release are available in the release note [here](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/stm32h7s78-dk/blob/main/Release_Notes.html).
## Compatibility information
Below is the list of the BSP *component* drivers to be used with this BSP *board* driver. It is **crucial** that you use a consistent set of CMSIS - HAL - BSP versions, as mentioned in [this](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/STM32CubeH7/blob/master/Release_Notes.html) release note.
* [stm32-bsp-common](https://github.com/STMicroelectronics/stm32-bsp-common)
* [stm32-aps256xx](https://github.com/STMicroelectronics/stm32-aps256xx)
* [stm32-gt911](https://github.com/STMicroelectronics/stm32-gt911)
* [stm32-lan8742](https://github.com/STMicroelectronics/stm32-lan8742)
* [stm32-mx66uw1g45g](https://github.com/STMicroelectronics/stm32-mx66uw1g45g)
* [stm32-ov5640](https://github.com/STMicroelectronics/stm32-ov5640)
* [stm32-rk050hr18](https://github.com/STMicroelectronics/stm32-rk050hr18)
* [stm32-tcpp0203](https://github.com/STMicroelectronics/stm32-tcpp0203)
* [stm32-wm8904](https://github.com/STMicroelectronics/stm32-wm8904)
## Troubleshooting
Please refer to the [CONTRIBUTING.md](CONTRIBUTING.md) guide.
Drivers/STM32H7RSxx_BSP/STM32H7S78-DK/Release_Notes.html
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<!DOCTYPE html>
<html xmlns="http://www.w3.org/1999/xhtml" lang="en" xml:lang="en">
<head>
<meta charset="utf-8" />
<meta name="generator" content="pandoc" />
<meta name="viewport" content="width=device-width, initial-scale=1.0, user-scalable=yes" />
<title>Release Notes for STM32H7S78-DK Drivers</title>
<style type="text/css">
code{white-space: pre-wrap;}
span.smallcaps{font-variant: small-caps;}
span.underline{text-decoration: underline;}
div.column{display: inline-block; vertical-align: top; width: 50%;}
</style>
<link rel="stylesheet" href="_htmresc/mini-st_2020.css" />
<!--[if lt IE 9]>
<script src="//cdnjs.cloudflare.com/ajax/libs/html5shiv/3.7.3/html5shiv-printshiv.min.js"></script>
<![endif]-->
<link rel="icon" type="image/x-icon" href="_htmresc/favicon.png" />
</head>
<body>
<div class="row">
<div class="col-sm-12 col-lg-4">
<center>
<h1 id="release-notes-for">Release Notes for</h1>
<h1 id="stm32h7s78-dk"><mark>STM32H7S78-DK</mark></h1>
<p>Copyright © 2024 STMicroelectronics<br />
</p>
<a href="https://www.st.com" class="logo"><img src="_htmresc/st_logo_2020.png" alt="ST logo" /></a>
</center>
<h1 id="purpose">Purpose</h1>
<p>This driver provides a set of functions to manage:</p>
<ul>
<li>1-Gbit Octo-SPI NOR flash memory, 256-Mbit Hexadeca-SPI PSRAM, I2S audio codec, 5" LCD module with capacitive touch panel, user LEDs and push-button available on STM32H7S78-DK Kit from STMicroelectronics</li>
</ul>
</div>
<div class="col-sm-12 col-lg-8">
<h1 id="update-history">Update History</h1>
<div class="collapse">
<input type="checkbox" id="collapse-section3" checked aria-hidden="true"> <label for="collapse-section3" aria-hidden="true"><strong>V1.0.2 / 12-September-2025</strong></label>
<div>
<h2 id="maintenance-release">Maintenance release</h2>
<h2 id="contents">Contents</h2>
<ul>
<li>Fix Misra-C 2012 Rule 12.2 violations</li>
</ul>
<h2 id="supported-devices-and-boards">Supported Devices and boards</h2>
<ul>
<li>STM32H7S7L8H6H</li>
<li>STM32H7S78-DK</li>
</ul>
<h2 id="known-limitations">Known Limitations</h2>
<ul>
<li>None</li>
</ul>
<h2 id="dependencies">Dependencies</h2>
<ul>
<li>None</li>
</ul>
<h2 id="notes">Notes</h2>
<ul>
<li>None</li>
</ul>
<p><br />
</p>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section2" aria-hidden="true"> <label for="collapse-section2" aria-hidden="true"><strong>V1.0.1 / 19-December-2024</strong></label>
<div>
<h2 id="maintenance-release-1">Maintenance release</h2>
<h2 id="contents-1">Contents</h2>
<ul>
<li>Enable Hardware flow control of SD handle in MX_SDMMC1_SD_Init()</li>
</ul>
<h2 id="supported-devices-and-boards-1">Supported Devices and boards</h2>
<ul>
<li>STM32H7S7L8H6H</li>
<li>STM32H7S78-DK</li>
</ul>
<h2 id="known-limitations-1">Known Limitations</h2>
<ul>
<li>None</li>
</ul>
<h2 id="dependencies-1">Dependencies</h2>
<ul>
<li>None</li>
</ul>
<h2 id="notes-1">Notes</h2>
<ul>
<li>None</li>
</ul>
<p><br />
</p>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" aria-hidden="true"><strong>V1.0.0 / 28-February-2024</strong></label>
<div>
<h2 id="first-release">First release</h2>
<h3 id="official-release-of-stm32h7s78-dk-bsp-board-drivers">Official release of <strong>STM32H7S78-DK</strong> BSP Board drivers</h3>
<h2 id="contents-2">Contents</h2>
<ul>
<li>Official release of board drivers for <strong>Discovery kit with STM32H7S7L8</strong></li>
</ul>
<h2 id="supported-devices-and-boards-2">Supported Devices and boards</h2>
<ul>
<li>STM32H7S7L8H6H</li>
<li>STM32H7S78-DK</li>
</ul>
<h2 id="known-limitations-2">Known Limitations</h2>
<ul>
<li>None</li>
</ul>
<h2 id="dependencies-2">Dependencies</h2>
<ul>
<li>None</li>
</ul>
<h2 id="notes-2">Notes</h2>
<p>stm32h7s78_discovery_conf_template.h file must be copied in user application as stm32h7rsxx_discovery_conf.h with optional configuration update</p>
<p><br />
</p>
</div>
</div>
</div>
</div>
<footer class="sticky">
<div class="columns">
<div class="column" style="width:95%;">
<p>For complete documentation on STM32, visit: <a href="http://www.st.com">www.st.com</a></p>
<p><em>This release note uses up to date web standards and, for this reason, should not be opened with Internet Explorer but preferably with popular browsers such as Google Chrome, Mozilla Firefox, Opera or Microsoft Edge.</em></p>
</div><div class="column" style="width:5%;">
<p><abbr title="Based on template cx566953 version 2.0">Info</abbr></p>
</div>
</div>
</footer>
</body>
</html>
Drivers/STM32H7RSxx_BSP/STM32H7S78-DK/Release_Notes.md
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---
pagetitle: Release Notes for STM32H7S78-DK Drivers
lang: en
header-includes: <link rel="icon" type="image/x-icon" href="_htmresc/favicon.png" />
---
::: {.row}
::: {.col-sm-12 .col-lg-4}
<center>
# Release Notes for
# <mark>STM32H7S78-DK</mark>
Copyright &copy; 2024 STMicroelectronics\
[![ST logo](_htmresc/st_logo_2020.png)](https://www.st.com){.logo}
</center>
# Purpose
This driver provides a set of functions to manage:
- 1-Gbit Octo-SPI NOR flash memory, 256-Mbit Hexadeca-SPI PSRAM, I2S audio codec, 5" LCD module with capacitive touch panel, user LEDs and push-button available on STM32H7S78-DK Kit from STMicroelectronics
:::
::: {.col-sm-12 .col-lg-8}
# Update History
::: {.collapse}
<input type="checkbox" id="collapse-section3" checked aria-hidden="true">
<label for="collapse-section3" aria-hidden="true">__V1.0.2 / 12-September-2025__</label>
<div>
## Maintenance release
## Contents
- Fix Misra-C 2012 Rule 12.2 violations
## Supported Devices and boards
- STM32H7S7L8H6H
- STM32H7S78-DK
## Known Limitations
- None
## Dependencies
- None
## Notes
- None
\
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section2" aria-hidden="true">
<label for="collapse-section2" aria-hidden="true">__V1.0.1 / 19-December-2024__</label>
<div>
## Maintenance release
## Contents
- Enable Hardware flow control of SD handle in MX_SDMMC1_SD_Init()
## Supported Devices and boards
- STM32H7S7L8H6H
- STM32H7S78-DK
## Known Limitations
- None
## Dependencies
- None
## Notes
- None
\
</div>
:::
::: {.collapse}
<input type="checkbox" id="collapse-section1" aria-hidden="true">
<label for="collapse-section1" aria-hidden="true">__V1.0.0 / 28-February-2024__</label>
<div>
## First release
### Official release of **STM32H7S78-DK** BSP Board drivers
## Contents
- Official release of board drivers for **Discovery kit with STM32H7S7L8**
## Supported Devices and boards
- STM32H7S7L8H6H
- STM32H7S78-DK
## Known Limitations
- None
## Dependencies
- None
## Notes
stm32h7s78_discovery_conf_template.h file must be copied in user application as stm32h7rsxx_discovery_conf.h with optional configuration update
\
</div>
:::
:::
:::
<footer class="sticky">
::: {.columns}
::: {.column width="95%"}
For complete documentation on STM32,
visit: [www.st.com](http://www.st.com)
*This release note uses up to date web standards and, for this reason, should not be opened with Internet Explorer but preferably with popular browsers such as Google Chrome, Mozilla Firefox, Opera or Microsoft Edge.*
:::
::: {.column width="5%"}
<abbr title="Based on template cx566953 version 2.0">Info</abbr>
:::
:::
</footer>
Drivers/STM32H7RSxx_BSP/STM32H7S78-DK/STM32H7S78-DK_BSP_User_Manual.chm
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Drivers/STM32H7RSxx_BSP/STM32H7S78-DK/bumpversion.cfg
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{
"name": "BSP Disco",
"configList": [
{
"file": "stm32h7s78_discovery.h",
"commit": true,
"replacements": [
{
"search":"VERSION_MAIN\\s+\\(0x[a-fA-F\\d]+U?\\)",
"replace":"'VERSION_MAIN (0x' + '{:02X}'.format(major) + 'U)'"
},
{
"search":"VERSION_SUB1\\s+\\(0x[a-fA-F\\d]+U?\\)",
"replace":"'VERSION_SUB1 (0x' + '{:02X}'.format(minor) + 'U)'"
},
{
"search":"VERSION_SUB2\\s+\\(0x[a-fA-F\\d]+U?\\)",
"replace":"'VERSION_SUB2 (0x' + '{:02X}'.format(patch) + 'U)'"
},
{
"search":"VERSION_RC\\s+\\(0x[a-fA-F\\d]+U?\\)",
"replace":"'VERSION_RC (0x' + '{:02X}'.format(rc) + 'U)'"
}
]
}
]
}
Drivers/STM32H7RSxx_BSP/STM32H7S78-DK/md2html.sh
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pandoc -s -r markdown -t html5 -c "_htmresc/mini-st_2020.css" Release_Notes.md > Release_Notes.html
Drivers/STM32H7RSxx_BSP/STM32H7S78-DK/stm32h7s78_discovery.c
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/**
******************************************************************************
* @file stm32h7s78_discovery.c
* @author MCD Application Team
* @brief This file provides a set of firmware functions to manage
* LEDs
* push-buttons
* COM ports
* available on STM32H7S78-DK board(MB1736) from STMicroelectronics.
******************************************************************************
* @attention
*
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32h7s78_discovery.h"
#if defined(__ICCARM__)
#include <LowLevelIOInterface.h>
#endif /* __ICCARM__ */
/** @addtogroup BSP
* @{
*/
/** @addtogroup STM32H7S78_DK
* @{
*/
/** @defgroup STM32H7S78_DK_LOW_LEVEL LOW LEVEL
* @{
*/
/** @defgroup STM32H7S78_DK_LOW_LEVEL_Private_TypesDefinitions Private Types Definitions
* @{
*/
typedef void (* BSP_EXTI_LineCallback)(void);
/**
* @}
*/
/** @defgroup STM32H7S78_DK_LOW_LEVEL_Private_FunctionPrototypes Private Function Prototypes
* @{
*/
static void BUTTON_USER_EXTI_Callback(void);
#if (USE_BSP_COM_FEATURE > 0)
static void UART_MspInit(const UART_HandleTypeDef *huart);
static void UART_MspDeInit(const UART_HandleTypeDef *huart);
#endif /* USE_BSP_COM_FEATURE > 0 */
/**
* @}
*/
/** @defgroup STM32H7S78_DK_LOW_LEVEL_Exported_Variables Exported Variables
* @{
*/
EXTI_HandleTypeDef hpb_exti[BUTTONn];
#if (USE_BSP_COM_FEATURE > 0)
UART_HandleTypeDef hcom_uart[COMn];
USART_TypeDef *COM_UART[COMn] = {COM1_UART, COM2_UART};
#endif /* USE_BSP_COM_FEATURE > 0 */
/**
* @}
*/
/** @defgroup STM32H7S78_DK_LOW_LEVEL_Private_Variables Private Variables
* @{
*/
static GPIO_TypeDef *LED_PORT[LEDn] = {LD1_GPIO_PORT,
LD2_GPIO_PORT,
LD3_GPIO_PORT,
LD4_GPIO_PORT
};
static const uint16_t LED_PIN[LEDn] = {LD1_PIN,
LD2_PIN,
LD3_PIN,
LD4_PIN
};
static GPIO_TypeDef* BUTTON_PORT[BUTTONn] = {BUTTON_USER_GPIO_PORT };
static const uint16_t BUTTON_PIN[BUTTONn] = {BUTTON_USER_PIN };
static const IRQn_Type BUTTON_IRQn[BUTTONn] = {BUTTON_USER_EXTI_IRQn };
#if (USE_COM_LOG == 1)
static COM_TypeDef COM_ActiveLogPort = COM1;
/**
* @brief Redirect console output to COM
*/
#if defined(__ICCARM__)
/* New definition from EWARM V9, compatible with EWARM8 */
int iar_fputc(int ch);
#define PUTCHAR_PROTOTYPE int iar_fputc(int ch)
#elif defined (__CC_ARM) || defined(__ARMCC_VERSION)
/* ARM Compiler 5/6 */
#define PUTCHAR_PROTOTYPE int fputc(int ch, FILE *f)
#elif defined(__GNUC__)
#define PUTCHAR_PROTOTYPE int __io_putchar(int ch)
#endif /* __ICCARM__ */
#endif /* USE_COM_LOG */
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
static uint32_t IsComMspCbValid[COMn] = {0};
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
/**
* @}
*/
/** @defgroup STM32H7S78_DK_LOW_LEVEL_Private_Constants Private Constants
* @{
*/
#define STM32H7S78_DK_PWR_FLAG_SETTING_DELAY (1000U)
/**
* @}
*/
/** @defgroup STM32H7S78_DK_LOW_LEVEL_Exported_Functions Exported Functions
* @{
*/
/**
* @brief This method returns the STM32H7S78 Discovery BSP Driver revision
* @retval version: 0xXYZR (8bits for each decimal, R for RC)
*/
int32_t BSP_GetVersion(void)
{
return ((int32_t)STM32H7S78_DK_BSP_VERSION);
}
/**
* @brief This method returns the board name
* @retval pointer to the board name string
*/
const uint8_t *BSP_GetBoardName(void)
{
return (const uint8_t *) STM32H7S78_DK_BSP_BOARD_NAME;
}
/**
* @brief This method returns the board ID
* @retval pointer to the board name string
*/
const uint8_t *BSP_GetBoardID(void)
{
return (const uint8_t *)STM32H7S78_DK_BSP_BOARD_ID;
}
/**
* @brief Configure LED on GPIO.
* @param Led Specifies the Led to be configured.
* This parameter can be one of the following values:
* @arg LD1
* @arg LD2
* @arg LD3
* @arg LD4
* @retval BSP error code
*/
int32_t BSP_LED_Init(Led_TypeDef Led)
{
int32_t ret = BSP_ERROR_NONE;
GPIO_InitTypeDef gpio_init_structure = {0};
uint32_t tickstart;
/* Enable the GPIO_LED clock */
switch (Led)
{
case LD1:
/* Enable the power of PORT_O XSPIx */
HAL_PWREx_EnableXSPIM1();
LD1_GPIO_CLK_ENABLE();
break;
case LD2:
/* Enable the power of PORT_O XSPIx */
HAL_PWREx_EnableXSPIM1();
LD2_GPIO_CLK_ENABLE();
break;
case LD3:
/* Enable the power of PORT_M */
if (HAL_PWREx_EnableUSBVoltageDetector() != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else
{
/* Wait the detection of the USB33 power */
tickstart = HAL_GetTick();
while ( (PWR->CSR2 & PWR_CSR2_USB33RDY)== 0U)
{
if ((HAL_GetTick() - tickstart) > STM32H7S78_DK_PWR_FLAG_SETTING_DELAY)
{
return BSP_ERROR_PERIPH_FAILURE;
}
}
LD3_GPIO_CLK_ENABLE();
}
break;
default: /* LD4 */
/* Enable the power of PORT_M */
if (HAL_PWREx_EnableUSBVoltageDetector() != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else
{
/* Wait the detection of the USB33 power */
tickstart = HAL_GetTick();
while ( (PWR->CSR2 & PWR_CSR2_USB33RDY)== 0U)
{
if ((HAL_GetTick() - tickstart) > STM32H7S78_DK_PWR_FLAG_SETTING_DELAY)
{
return BSP_ERROR_PERIPH_FAILURE;
}
}
LD4_GPIO_CLK_ENABLE();
}
break;
}
if (ret == BSP_ERROR_NONE)
{
/* configure the GPIO_LED pin */
gpio_init_structure.Pin = LED_PIN [Led];
gpio_init_structure.Mode = GPIO_MODE_OUTPUT_PP;
gpio_init_structure.Pull = GPIO_PULLUP;
gpio_init_structure.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
HAL_GPIO_Init(LED_PORT [Led], &gpio_init_structure);
/* By default, turn off LED */
(void) BSP_LED_Off(Led);
}
return ret;
}
/**
* @brief DeInitialize LEDs.
* @param Led LED to be de-init.
* This parameter can be one of the following values:
* @arg LD1
* @arg LD2
* @arg LD3
* @arg LD4
* @note BSP_LED_DeInit() does not disable the GPIO clock
* @retval BSP error code
*/
int32_t BSP_LED_DeInit(Led_TypeDef Led)
{
GPIO_InitTypeDef gpio_init_structure = {0};
/* Turn off LED */
(void) BSP_LED_Off(Led);
/* DeInit the GPIO_LED pin */
gpio_init_structure.Pin = LED_PIN [Led];
HAL_GPIO_DeInit(LED_PORT [Led], gpio_init_structure.Pin);
return BSP_ERROR_NONE;
}
/**
* @brief Turn selected LED On.
* @param Led Specifies the Led to be set on.
* This parameter can be one of the following values:
* @arg LD1
* @arg LD2
* @arg LD3
* @arg LD4
* @retval BSP error code
*/
int32_t BSP_LED_On(Led_TypeDef Led)
{
if(Led <= LD2)
{
/* LD1/LD2 High active */
HAL_GPIO_WritePin(LED_PORT [Led], (uint16_t)LED_PIN [Led], GPIO_PIN_SET);
}
else
{
/* LD3/LD4 Low active */
HAL_GPIO_WritePin(LED_PORT [Led], (uint16_t)LED_PIN [Led], GPIO_PIN_RESET);
}
return BSP_ERROR_NONE;
}
/**
* @brief Turn selected LED Off.
* @param Led Specifies the Led to be set off.
* This parameter can be one of the following values:
* @arg LD1
* @arg LD2
* @arg LD3
* @arg LD4
* @retval BSP error code
*/
int32_t BSP_LED_Off(Led_TypeDef Led)
{
if (Led <= LD2)
{
/* LD1/LD2 High active */
HAL_GPIO_WritePin(LED_PORT [Led], (uint16_t)LED_PIN [Led], GPIO_PIN_RESET);
}
else
{
/* LD3/LD4 Low active */
HAL_GPIO_WritePin(LED_PORT [Led], (uint16_t)LED_PIN [Led], GPIO_PIN_SET);
}
return BSP_ERROR_NONE;
}
/**
* @brief Toggle the selected LED.
* @param Led Specifies the Led to be toggled.
* This parameter can be one of the following values:
* @arg LD1
* @arg LD2
* @arg LD3
* @arg LD4
* @retval BSP error code
*/
int32_t BSP_LED_Toggle(Led_TypeDef Led)
{
HAL_GPIO_TogglePin(LED_PORT[Led], LED_PIN[Led]);
return BSP_ERROR_NONE;
}
/**
* @brief Get the state of selected LED.
* @param Led Specifies the Led.
* This parameter can be one of the following values:
* @arg LD1
* @arg LD2
* @arg LD3
* @arg LD4
* @retval 0 means off, 1 means on.
*/
int32_t BSP_LED_GetState(Led_TypeDef Led)
{
int32_t ret;
ret = (int32_t) HAL_GPIO_ReadPin(LED_PORT[Led], LED_PIN[Led]);
if (Led >= LD3)
{
/* LD3/LD4 is active low */
ret = (int32_t)((ret == 1) ? 0 : 1);
}
return ret;
}
/**
* @brief Configure Button GPIO and EXTI Line.
* @param Button Specifies the Button to be configured.
* This parameter can be one of the following values:
* @arg BUTTON_USER: User Push Button
* @param ButtonMode Specifies Button mode.
* This parameter can be one of the following values:
* @arg BUTTON_MODE_GPIO: Button will be used as simple IO
* @arg BUTTON_MODE_EXTI: Button will be connected to EXTI line
* with interrupt generation capability
* @retval BSP error code
*/
int32_t BSP_PB_Init(Button_TypeDef Button, ButtonMode_TypeDef ButtonMode)
{
GPIO_InitTypeDef gpio_init_structure = {0};
static BSP_EXTI_LineCallback ButtonCallback[BUTTONn] = {BUTTON_USER_EXTI_Callback};
static uint32_t BSP_BUTTON_PRIO [BUTTONn] = {BSP_BUTTON_USER_IT_PRIORITY};
static const uint32_t BUTTON_EXTI_LINE[BUTTONn] = {BUTTON_USER_EXTI_LINE};
/* Enable the BUTTON clock */
BUTTON_USER_GPIO_CLK_ENABLE();
gpio_init_structure.Pin = BUTTON_PIN [Button];
gpio_init_structure.Pull = GPIO_PULLDOWN;
gpio_init_structure.Speed = GPIO_SPEED_FREQ_LOW;
if (ButtonMode == BUTTON_MODE_GPIO)
{
/* Configure Button pin as input */
gpio_init_structure.Mode = GPIO_MODE_INPUT;
HAL_GPIO_Init(BUTTON_PORT[Button], &gpio_init_structure);
}
else /* ButtonMode == BUTTON_MODE_EXTI */
{
/* Enable SBS clock */
__HAL_RCC_SBS_CLK_ENABLE();
/* Configure Button pin as input with External interrupt */
gpio_init_structure.Mode = GPIO_MODE_IT_FALLING;
HAL_GPIO_Init(BUTTON_PORT[Button], &gpio_init_structure);
(void)HAL_EXTI_GetHandle(&hpb_exti[Button], BUTTON_EXTI_LINE[Button]);
(void)HAL_EXTI_RegisterCallback(&hpb_exti[Button], HAL_EXTI_COMMON_CB_ID, ButtonCallback[Button]);
/* Enable and set Button EXTI Interrupt to the lowest priority */
HAL_NVIC_SetPriority((BUTTON_IRQn[Button]), BSP_BUTTON_PRIO[Button], 0x00);
HAL_NVIC_EnableIRQ((BUTTON_IRQn[Button]));
}
return BSP_ERROR_NONE;
}
/**
* @brief DeInitialize Push Button.
* @param Button Button to be configured.
* This parameter can be one of the following values:
* @arg BUTTON_USER: User Push Button
* @note BSP_PB_DeInit() does not disable the GPIO clock
* @retval BSP error code
*/
int32_t BSP_PB_DeInit(Button_TypeDef Button)
{
GPIO_InitTypeDef gpio_init_structure = {0};
gpio_init_structure.Pin = BUTTON_PIN[Button];
HAL_NVIC_DisableIRQ((IRQn_Type)(BUTTON_IRQn[Button]));
HAL_GPIO_DeInit(BUTTON_PORT[Button], gpio_init_structure.Pin);
return BSP_ERROR_NONE;
}
/**
* @brief Return the selected button state.
* @param Button Specifies the Button to be checked.
* This parameter can be one of the following values:
* @arg BUTTON_USER: User Push Button
* @retval The Button GPIO pin value
*/
int32_t BSP_PB_GetState(Button_TypeDef Button)
{
return (int32_t) HAL_GPIO_ReadPin(BUTTON_PORT[Button], BUTTON_PIN[Button]);
}
/**
* @brief This function handles Push-Button interrupt requests.
* @param Button Specifies the pin connected EXTI line
* @retval None
*/
void BSP_PB_IRQHandler(Button_TypeDef Button)
{
HAL_EXTI_IRQHandler(&hpb_exti[Button]);
}
/**
* @brief KEY EXTI line detection callbacks.
* @retval None
*/
static void BUTTON_USER_EXTI_Callback(void)
{
BSP_PB_Callback(BUTTON_USER);
}
/**
* @brief BSP Push Button callback
* @param Button Specifies the pin connected EXTI line
* @retval None.
*/
__weak void BSP_PB_Callback(Button_TypeDef Button)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(Button);
/* This function should be implemented by the user application.
It is called into this driver when an event on Button is triggered. */
}
#if (USE_BSP_COM_FEATURE > 0)
/**
* @brief Configure COM port.
* @param COM COM port to be configured.
* This parameter can be COM1 or COM2.
* @param COM_Init Pointer to a UART_HandleTypeDef structure that contains the
* configuration information for the specified USART peripheral.
* @retval BSP error code
*/
int32_t BSP_COM_Init(COM_TypeDef COM, COM_InitTypeDef *COM_Init)
{
int32_t ret = BSP_ERROR_NONE;
if (COM >= COMn)
{
ret = BSP_ERROR_WRONG_PARAM;
}
else
{
/* Initialize COM instance */
hcom_uart[COM].Instance = COM_UART[COM];
/* Init the UART Msp */
#if (USE_HAL_UART_REGISTER_CALLBACKS == 0)
UART_MspInit(&hcom_uart[COM]);
#else
if (IsComMspCbValid[COM] == 0U)
{
if (BSP_COM_RegisterDefaultMspCallbacks(COM) != BSP_ERROR_NONE)
{
return BSP_ERROR_MSP_FAILURE;
}
}
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
if (COM == COM1)
{
if (MX_UART4_Init(&hcom_uart[COM], COM_Init) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
}
else
{
if (MX_UART7_Init(&hcom_uart[COM], COM_Init) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
}
}
return ret;
}
/**
* @brief DeInitialize COM port.
* @param COM COM port to be de_init.
* This parameter can be COM1 or COM2.
* @retval BSP error code
*/
int32_t BSP_COM_DeInit(COM_TypeDef COM)
{
int32_t ret = BSP_ERROR_NONE;
if (COM >= COMn)
{
ret = BSP_ERROR_WRONG_PARAM;
}
else
{
/* USART configuration */
hcom_uart[COM].Instance = COM_UART[COM];
#if (USE_HAL_UART_REGISTER_CALLBACKS == 0)
UART_MspDeInit(&hcom_uart[COM]);
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS == 0) */
if (HAL_UART_DeInit(&hcom_uart[COM]) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
}
return ret;
}
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
/**
* @brief Register default COM msp callbacks.
* @param COM COM port.
* @retval BSP status
*/
int32_t BSP_COM_RegisterDefaultMspCallbacks(COM_TypeDef COM)
{
int32_t ret = BSP_ERROR_NONE;
if (COM >= COMn)
{
ret = BSP_ERROR_WRONG_PARAM;
}
else
{
__HAL_UART_RESET_HANDLE_STATE(&hcom_uart[COM]);
/* Register default MspInit/MspDeInit Callback */
if (HAL_UART_RegisterCallback(&hcom_uart[COM], HAL_UART_MSPINIT_CB_ID, (pUART_CallbackTypeDef) UART_MspInit) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else if (HAL_UART_RegisterCallback(&hcom_uart[COM], HAL_UART_MSPDEINIT_CB_ID, (pUART_CallbackTypeDef) UART_MspDeInit) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else
{
IsComMspCbValid[COM] = 1U;
}
}
/* BSP status */
return ret;
}
/**
* @brief Register COM1 Msp Callback registering
* @param COM COM port to be configured.
* @param Callbacks pointer to COM MspInit/MspDeInit callback functions
* @retval BSP status
*/
int32_t BSP_COM_RegisterMspCallbacks(COM_TypeDef COM, BSP_COM_Cb_t *Callback)
{
int32_t ret = BSP_ERROR_NONE;
if (COM >= COMn)
{
ret = BSP_ERROR_WRONG_PARAM;
}
else
{
__HAL_UART_RESET_HANDLE_STATE(&hcom_uart[COM]);
/* Register MspInit/MspDeInit Callbacks */
if (HAL_UART_RegisterCallback(&hcom_uart[COM], HAL_UART_MSPINIT_CB_ID, Callback->pMspInitCb) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else if (HAL_UART_RegisterCallback(&hcom_uart[COM], HAL_UART_MSPDEINIT_CB_ID, Callback->pMspDeInitCb) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else
{
IsComMspCbValid[COM] = 1U;
}
}
/* BSP status */
return ret;
}
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
#if (USE_COM_LOG == 1)
/**
* @brief Select the active COM port.
* @param COM COM port to be activated.
* This parameter can be COM1 or COM2.
* @retval BSP status
*/
int32_t BSP_COM_SelectLogPort(COM_TypeDef COM)
{
if (COM_ActiveLogPort != COM)
{
COM_ActiveLogPort = COM;
}
return BSP_ERROR_NONE;
}
#if defined(__ICCARM__)
size_t __write(int file, unsigned char const *ptr, size_t len)
{
size_t idx;
unsigned char const *pdata = ptr;
for (idx = 0; idx < len; idx++)
{
iar_fputc((int)*pdata);
pdata++;
}
return len;
}
#endif /* __ICCARM__ */
/**
* @brief Redirect console output to COM
*/
PUTCHAR_PROTOTYPE
{
HAL_UART_Transmit(&hcom_uart [COM_ActiveLogPort], (uint8_t *) &ch, 1, COM_POLL_TIMEOUT);
return ch;
}
#endif /* USE_COM_LOG */
#endif /* USE_BSP_COM_FEATURE */
/**
* @}
*/
/** @defgroup STM32H7B3I_DISCO_LOW_LEVEL_Private_Functions Private Functions
* @{
*/
#if (USE_BSP_COM_FEATURE > 0)
/**
* @brief Initialize UART4.
* @param huart USART handle
* @param COM_Init Pointer to a UART_HandleTypeDef structure that contains the
* configuration information for the specified USART peripheral.
* @retval HAL error code
*/
__weak HAL_StatusTypeDef MX_UART4_Init(UART_HandleTypeDef *huart, MX_UART_InitTypeDef *COM_Init)
{
/* USART configuration */
huart->Instance = COM_UART[COM1];
huart->Init.BaudRate = COM_Init->BaudRate;
huart->Init.Mode = UART_MODE_TX_RX;
huart->Init.Parity = (uint32_t)COM_Init->Parity;
huart->Init.WordLength = (uint32_t)COM_Init->WordLength;
huart->Init.StopBits = (uint32_t)COM_Init->StopBits;
huart->Init.HwFlowCtl = (uint32_t)COM_Init->HwFlowCtl;
huart->Init.OverSampling = UART_OVERSAMPLING_8;
return HAL_UART_Init(huart);
}
/**
* @brief Initialize UART7.
* @param huart USART handle
* @param COM_Init Pointer to a UART_HandleTypeDef structure that contains the
* configuration information for the specified USART peripheral.
* @retval HAL error code
*/
__weak HAL_StatusTypeDef MX_UART7_Init(UART_HandleTypeDef *huart, MX_UART_InitTypeDef *COM_Init)
{
/* USART configuration */
huart->Instance = COM_UART[COM2];
huart->Init.BaudRate = COM_Init->BaudRate;
huart->Init.Mode = UART_MODE_TX_RX;
huart->Init.Parity = (uint32_t)COM_Init->Parity;
huart->Init.WordLength = (uint32_t)COM_Init->WordLength;
huart->Init.StopBits = (uint32_t)COM_Init->StopBits;
huart->Init.HwFlowCtl = (uint32_t)COM_Init->HwFlowCtl;
huart->Init.OverSampling = UART_OVERSAMPLING_8;
huart->Init.ClockPrescaler = UART_PRESCALER_DIV1;
return HAL_UART_Init(huart);
}
/**
* @brief Initialize UART MSP.
* @param huart UART handle.
* @retval None.
*/
static void UART_MspInit(const UART_HandleTypeDef *huart)
{
GPIO_InitTypeDef GPIO_Init;
GPIO_TypeDef *COM_TX_PORT[COMn] = {COM1_TX_GPIO_PORT, COM2_TX_GPIO_PORT};
GPIO_TypeDef *COM_RX_PORT[COMn] = {COM1_RX_GPIO_PORT, COM2_RX_GPIO_PORT};
const uint16_t COM_TX_PIN[COMn] = {COM1_TX_PIN, COM2_TX_PIN};
const uint16_t COM_RX_PIN[COMn] = {COM1_RX_PIN, COM2_RX_PIN};
const uint8_t COM_TX_AF[COMn] = {COM1_TX_AF, COM2_TX_AF};
const uint8_t COM_RX_AF[COMn] = {COM1_RX_AF, COM2_RX_AF};
COM_TypeDef COM;
/* Get COM according instance */
if (huart->Instance == COM1_UART)
{
COM = COM1;
/* Enable COM and GPIO clocks */
COM1_TX_GPIO_CLK_ENABLE();
COM1_RX_GPIO_CLK_ENABLE();
COM1_CLK_ENABLE();
}
else if (huart->Instance == COM2_UART)
{
COM = COM2;
/* Enable COM and GPIO clocks */
COM2_TX_GPIO_CLK_ENABLE();
COM2_RX_GPIO_CLK_ENABLE();
COM2_CLK_ENABLE();
}
else /* COM = ??? */
{
return;
}
/* Configure COM Tx as alternate function */
GPIO_Init.Pin = COM_TX_PIN[COM];
GPIO_Init.Mode = GPIO_MODE_AF_PP;
GPIO_Init.Speed = GPIO_SPEED_FREQ_HIGH;
GPIO_Init.Pull = GPIO_PULLUP;
GPIO_Init.Alternate = COM_TX_AF[COM];
HAL_GPIO_Init(COM_TX_PORT[COM], &GPIO_Init);
/* Configure COM Rx as alternate function */
GPIO_Init.Pin = COM_RX_PIN[COM];
GPIO_Init.Alternate = COM_RX_AF[COM];
HAL_GPIO_Init(COM_RX_PORT[COM], &GPIO_Init);
}
/**
* @brief Deinitialize UART MSP.
* @param huart UART handle.
* @retval None.
*/
static void UART_MspDeInit(const UART_HandleTypeDef *huart)
{
if (huart->Instance == COM1_UART)
{
/* Disable GPIOs used by COM1 TX/RX */
HAL_GPIO_DeInit(COM1_TX_GPIO_PORT, COM1_TX_PIN);
HAL_GPIO_DeInit(COM1_RX_GPIO_PORT, COM1_RX_PIN);
/* Disable UART COM1 clock */
COM1_CLK_DISABLE();
}
else if (huart->Instance == COM2_UART)
{
/* Disable GPIOs used by COM2 TX/RX */
HAL_GPIO_DeInit(COM2_TX_GPIO_PORT, COM2_TX_PIN);
HAL_GPIO_DeInit(COM2_RX_GPIO_PORT, COM2_RX_PIN);
/* Disable UART COM2 clock */
COM2_CLK_DISABLE();
}
else
{
/* Nothing to do */
}
}
#endif /* USE_BSP_COM_FEATURE > 0 */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
Drivers/STM32H7RSxx_BSP/STM32H7S78-DK/stm32h7s78_discovery.h
+336
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@@ -0,0 +1,336 @@
/**
******************************************************************************
* @file stm32h7s78_discovery.h
* @author MCD Application Team
* @brief This file contains definitions for STM32H7S78-DK:
* LEDs
* push-buttons
* COM ports
* hardware resources.
******************************************************************************
* @attention
*
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32H7S78_DISCOVERY_H
#define STM32H7S78_DISCOVERY_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32h7s78_discovery_conf.h"
#include "stm32h7s78_discovery_errno.h"
#if (USE_BSP_COM_FEATURE > 0)
#include <stdio.h>
#endif /* USE_BSP_COM_FEATURE */
/** @addtogroup BSP
* @{
*/
/** @addtogroup STM32H7S78_DK
* @{
*/
/** @addtogroup STM32H7S78_DK_LOW_LEVEL
* @{
*/
/** @defgroup STM32H7S78_DK_LOW_LEVEL_Exported_Types Exported Types
* @{
*/
typedef enum
{
LD1 = 0U,
LED_GREEN = LD1,
LD2 = 1U,
LED_ORANGE = LD2,
LD3 = 2U,
LED_RED = LD3,
LD4 = 3U,
LED_BLUE = LD4,
LEDn
} Led_TypeDef;
typedef enum
{
BUTTON_USER = 0U,
BUTTONn
} Button_TypeDef;
typedef enum
{
BUTTON_MODE_GPIO = 0U,
BUTTON_MODE_EXTI = 1U
} ButtonMode_TypeDef;
#if (USE_BSP_COM_FEATURE > 0)
typedef enum
{
COM1 = 0U,
COM2 = 1U,
COMn
} COM_TypeDef;
typedef enum
{
COM_STOPBITS_1 = UART_STOPBITS_1,
COM_STOPBITS_2 = UART_STOPBITS_2,
} COM_StopBitsTypeDef;
typedef enum
{
COM_PARITY_NONE = UART_PARITY_NONE,
COM_PARITY_EVEN = UART_PARITY_EVEN,
COM_PARITY_ODD = UART_PARITY_ODD,
} COM_ParityTypeDef;
typedef enum
{
COM_HWCONTROL_NONE = UART_HWCONTROL_NONE,
COM_HWCONTROL_RTS = UART_HWCONTROL_RTS,
COM_HWCONTROL_CTS = UART_HWCONTROL_CTS,
COM_HWCONTROL_RTS_CTS = UART_HWCONTROL_RTS_CTS,
} COM_HwFlowCtlTypeDef;
typedef enum
{
COM_WORDLENGTH_7B = UART_WORDLENGTH_7B,
COM_WORDLENGTH_8B = UART_WORDLENGTH_8B,
COM_WORDLENGTH_9B = UART_WORDLENGTH_9B,
} COM_WordLengthTypeDef;
typedef struct
{
uint32_t BaudRate;
COM_WordLengthTypeDef WordLength;
COM_StopBitsTypeDef StopBits;
COM_ParityTypeDef Parity;
COM_HwFlowCtlTypeDef HwFlowCtl;
} COM_InitTypeDef;
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
typedef struct
{
void (* pMspInitCb)(UART_HandleTypeDef *);
void (* pMspDeInitCb)(UART_HandleTypeDef *);
} BSP_COM_Cb_t;
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS == 1) */
#endif /* USE_BSP_COM_FEATURE > 0 */
/**
* @}
*/
/** @defgroup STM32H7S78_DK_LOW_LEVEL_Exported_Constants Exported Constants
* @{
*/
/**
* @brief Define for STM32H7S78_DK board
*/
/**
* @brief STM32H7S78 Discovery BSP Driver version number
*/
#define STM32H7S78_DK_BSP_VERSION_MAIN (0x01UL) /*!< [31:24] main version */
#define STM32H7S78_DK_BSP_VERSION_SUB1 (0x00UL) /*!< [23:16] sub1 version */
#define STM32H7S78_DK_BSP_VERSION_SUB2 (0x02UL) /*!< [15:8] sub2 version */
#define STM32H7S78_DK_BSP_VERSION_RC (0x00UL) /*!< [7:0] release candidate */
#define STM32H7S78_DK_BSP_VERSION ((STM32H7S78_DK_BSP_VERSION_MAIN << 24)\
|(STM32H7S78_DK_BSP_VERSION_SUB1 << 16)\
|(STM32H7S78_DK_BSP_VERSION_SUB2 << 8)\
|(STM32H7S78_DK_BSP_VERSION_RC))
#define STM32H7S78_DK_BSP_BOARD_NAME "STM32H7S78-DK"
#define STM32H7S78_DK_BSP_BOARD_ID "MB1736C"
/** @defgroup STM32H7S78_DK_LOW_LEVEL_LED EVAL LOW LEVEL LED
* @{
*/
#define LD1_GPIO_PORT GPIOO
#define LD1_PIN GPIO_PIN_1
#define LD2_GPIO_PORT GPIOO
#define LD2_PIN GPIO_PIN_5
#define LD3_GPIO_PORT GPIOM
#define LD3_PIN GPIO_PIN_2
#define LD4_GPIO_PORT GPIOM
#define LD4_PIN GPIO_PIN_3
#define LD1_GPIO_CLK_ENABLE() __HAL_RCC_GPIOO_CLK_ENABLE()
#define LD1_GPIO_CLK_DISABLE() __HAL_RCC_GPIOO_CLK_DISABLE()
#define LD2_GPIO_CLK_ENABLE() __HAL_RCC_GPIOO_CLK_ENABLE()
#define LD2_GPIO_CLK_DISABLE() __HAL_RCC_GPIOO_CLK_DISABLE()
#define LD3_GPIO_CLK_ENABLE() __HAL_RCC_GPIOM_CLK_ENABLE()
#define LD3_GPIO_CLK_DISABLE() __HAL_RCC_GPIOM_CLK_DISABLE()
#define LD4_GPIO_CLK_ENABLE() __HAL_RCC_GPIOM_CLK_ENABLE()
#define LD4_GPIO_CLK_DISABLE() __HAL_RCC_GPIOM_CLK_DISABLE()
/**
* @}
*/
/** @defgroup STM32H7S78_DK_LOW_LEVEL_BUTTON LOW LEVEL BUTTON
* @{
*/
/* Button state */
#define BUTTON_RELEASED 0U
#define BUTTON_PRESSED 1U
/**
* @brief USER push-button
*/
#define BUTTON_USER_PIN GPIO_PIN_13
#define BUTTON_USER_GPIO_PORT GPIOC
#define BUTTON_USER_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
#define BUTTON_USER_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
#define BUTTON_USER_EXTI_IRQn EXTI13_IRQn
#define BUTTON_USER_EXTI_LINE EXTI_LINE_13
/**
* @}
*/
/** @defgroup STM32H7S78_DK_LOW_LEVEL_COM LOW LEVEL COM
* @{
*/
#if (USE_BSP_COM_FEATURE > 0)
/**
* @brief Definition for COM port1, connected to UART4
*/
#define COM1_UART UART4
#define COM1_CLK_ENABLE() __HAL_RCC_UART4_CLK_ENABLE()
#define COM1_CLK_DISABLE() __HAL_RCC_UART4_CLK_DISABLE()
#define COM1_TX_PIN GPIO_PIN_1
#define COM1_TX_GPIO_PORT GPIOD
#define COM1_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
#define COM1_TX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOD_CLK_DISABLE()
#define COM1_TX_AF GPIO_AF8_UART4
#define COM1_RX_PIN GPIO_PIN_0
#define COM1_RX_GPIO_PORT GPIOD
#define COM1_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
#define COM1_RX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOD_CLK_DISABLE()
#define COM1_RX_AF GPIO_AF8_UART4
/**
* @brief Definition for COM port2, connected to UART7
*/
#define COM2_UART UART7
#define COM2_CLK_ENABLE() __HAL_RCC_UART7_CLK_ENABLE()
#define COM2_CLK_DISABLE() __HAL_RCC_UART7_CLK_DISABLE()
#define COM2_TX_PIN GPIO_PIN_8
#define COM2_TX_GPIO_PORT GPIOE
#define COM2_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOE_CLK_ENABLE()
#define COM2_TX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOE_CLK_DISABLE()
#define COM2_TX_AF GPIO_AF7_UART7
#define COM2_RX_PIN GPIO_PIN_7
#define COM2_RX_GPIO_PORT GPIOE
#define COM2_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOE_CLK_ENABLE()
#define COM2_RX_GPIO_CLK_DISABLE() __HAL_RCC_GPIOE_CLK_DISABLE()
#define COM2_RX_AF GPIO_AF7_UART7
#define COM_POLL_TIMEOUT 1000
#define MX_UART_InitTypeDef COM_InitTypeDef
#endif /* USE_BSP_COM_FEATURE > 0 */
/**
* @}
*/
/**
* @}
*/
/** @addtogroup STM32H7S78_DK_LOW_LEVEL_Exported_Variables
* @{
*/
extern EXTI_HandleTypeDef hpb_exti[];
#if (USE_BSP_COM_FEATURE > 0)
extern UART_HandleTypeDef hcom_uart[];
extern USART_TypeDef *COM_UART[];
#endif /* USE_BSP_COM_FEATURE > 0 */
/**
* @}
*/
/** @defgroup STM32H7S78_DK_LOW_LEVEL_Exported_FunctionsPrototypes Exported Functions Prototypes
* @{
*/
int32_t BSP_GetVersion(void);
const uint8_t *BSP_GetBoardName(void);
const uint8_t *BSP_GetBoardID(void);
int32_t BSP_LED_Init(Led_TypeDef Led);
int32_t BSP_LED_DeInit(Led_TypeDef Led);
int32_t BSP_LED_On(Led_TypeDef Led);
int32_t BSP_LED_Off(Led_TypeDef Led);
int32_t BSP_LED_Toggle(Led_TypeDef Led);
int32_t BSP_LED_GetState(Led_TypeDef Led);
int32_t BSP_PB_Init(Button_TypeDef Button, ButtonMode_TypeDef ButtonMode);
int32_t BSP_PB_DeInit(Button_TypeDef Button);
int32_t BSP_PB_GetState(Button_TypeDef Button);
void BSP_PB_Callback(Button_TypeDef Button);
#if (USE_BSP_COM_FEATURE > 0)
int32_t BSP_COM_Init(COM_TypeDef COM, COM_InitTypeDef *COM_Init);
int32_t BSP_COM_DeInit(COM_TypeDef COM);
#if (USE_COM_LOG > 0)
int32_t BSP_COM_SelectLogPort(COM_TypeDef COM);
#endif /* USE_COM_LOG > 0 */
#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
int32_t BSP_COM_RegisterDefaultMspCallbacks(COM_TypeDef COM);
int32_t BSP_COM_RegisterMspCallbacks(COM_TypeDef COM, BSP_COM_Cb_t *Callback);
#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
HAL_StatusTypeDef MX_UART4_Init(UART_HandleTypeDef *huart, MX_UART_InitTypeDef *COM_Init);
HAL_StatusTypeDef MX_UART7_Init(UART_HandleTypeDef *huart, MX_UART_InitTypeDef *COM_Init);
#endif /* (USE_BSP_COM_FEATURE > 0) */
void BSP_PB_IRQHandler(Button_TypeDef Button);
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* STM32H7S78_DISCOVERY_H */
Drivers/STM32H7RSxx_BSP/STM32H7S78-DK/stm32h7s78_discovery_audio.c
+3352
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File diff suppressed because it is too large. Load diff
Drivers/STM32H7RSxx_BSP/STM32H7S78-DK/stm32h7s78_discovery_audio.h
+358
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@@ -0,0 +1,358 @@
/**
******************************************************************************
* @file stm32h7s78_discovery_audio.h
* @author MCD Application Team
* @brief This file contains the common defines and functions prototypes for
* the stm32h7s78_discovery_audio.c driver.
******************************************************************************
* @attention
*
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32H7S78_DISCOVERY_AUDIO_H
#define STM32H7S78_DISCOVERY_AUDIO_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32h7s78_discovery_conf.h"
#include "stm32h7s78_discovery_errno.h"
#include "../Components/Common/audio.h"
#include "../Components/wm8904/wm8904.h"
/** @addtogroup BSP
* @{
*/
/** @addtogroup STM32H7S78_DK
* @{
*/
/** @addtogroup STM32H7S78_DK_AUDIO
* @{
*/
/** @defgroup STM32H7S78_DK_AUDIO_Exported_Types STM32H7S78_DK AUDIO Exported Types
* @{
*/
typedef struct
{
uint32_t Device; /* Output or input device */
uint32_t SampleRate; /* From 8kHz to 192 kHz */
uint32_t BitsPerSample; /* From 8 bits per sample to 32 bits per sample */
uint32_t ChannelsNbr; /* 1 for mono and 2 for stereo */
uint32_t Volume; /* In percentage from 0 to 100 */
} BSP_AUDIO_Init_t;
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1)
typedef struct
{
pI2S_CallbackTypeDef pMspInitCb;
pI2S_CallbackTypeDef pMspDeInitCb;
} BSP_AUDIO_OUT_Cb_t;
#endif /* (USE_HAL_I2S_REGISTER_CALLBACKS == 1) */
#if ((USE_HAL_MDF_REGISTER_CALLBACKS == 1) || (USE_HAL_I2S_REGISTER_CALLBACKS == 1))
typedef struct
{
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1)
pI2S_CallbackTypeDef pMspI2sInitCb;
pI2S_CallbackTypeDef pMspI2sDeInitCb;
#endif /* USE_HAL_I2S_REGISTER_CALLBACKS == 1) */
#if (USE_HAL_MDF_REGISTER_CALLBACKS == 1)
pMDF_CallbackTypeDef pMspMdfInitCb;
pMDF_CallbackTypeDef pMspMdfDeInitCb;
#endif /* (USE_HAL_MDF_REGISTER_CALLBACKS == 1) */
} BSP_AUDIO_IN_Cb_t;
#endif /* ((USE_HAL_MDF_REGISTER_CALLBACKS == 1) || (USE_HAL_I2S_REGISTER_CALLBACKS == 1)) */
typedef struct
{
uint32_t AudioFrequency;
uint32_t Mode;
uint32_t DataFormat;
} MX_I2S_Config_t;
typedef struct
{
int32_t Gain;
uint32_t DecimationRatio;
uint32_t CicMode;
uint32_t ProcClockDivider;
uint32_t OutputClockDivider;
} MX_MDF_Config_t;
/* Audio in and out context */
typedef struct
{
uint32_t Device; /* Audio IN device to be used */
uint32_t SampleRate; /* Audio IN Sample rate */
uint32_t BitsPerSample; /* Audio IN Sample resolution */
uint32_t ChannelsNbr; /* Audio IN number of channel */
uint8_t *pBuff; /* Audio IN record buffer */
uint32_t Size; /* Audio IN record buffer size */
uint32_t Volume; /* Audio IN volume */
uint32_t State; /* Audio IN State */
} AUDIO_IN_Ctx_t;
typedef struct
{
uint32_t Device; /* Audio out device */
uint32_t SampleRate; /* Audio out sample rate */
uint32_t BitsPerSample; /* Audio out bits per sample */
uint32_t Volume; /* Audio out volume */
uint32_t ChannelsNbr; /* Audio out number of channels */
uint32_t IsMute; /* Audio out mute state */
uint32_t State; /* Audio out state */
} AUDIO_OUT_Ctx_t;
/**
* @}
*/
/** @defgroup STM32H7S78_DK_AUDIO_Exported_Constants STM32H7S78_DK AUDIO Exported Constants
* @{
*/
/* Audio out instances */
#define AUDIO_OUT_INSTANCES_NBR 1U
/* Audio in instances */
#define AUDIO_IN_INSTANCES_NBR 2U
/* Audio out devices */
#define AUDIO_OUT_HEADPHONE 1U
/* Audio input devices */
#define AUDIO_IN_ANALOG_MIC 0x01U
#define AUDIO_IN_DIGITAL_MIC 0x10U /* Digital microphone */
/* Audio out states */
#define AUDIO_OUT_STATE_RESET 0U
#define AUDIO_OUT_STATE_PLAYING 1U
#define AUDIO_OUT_STATE_STOP 2U
#define AUDIO_OUT_STATE_PAUSE 3U
#define AUDIO_OUT_STATE_INIT 4U
/* Audio in states */
#define AUDIO_IN_STATE_RESET 0U
#define AUDIO_IN_STATE_RECORDING 1U
#define AUDIO_IN_STATE_STOP 2U
#define AUDIO_IN_STATE_PAUSE 3U
#define AUDIO_IN_STATE_INIT 4U
/* Audio sample rate */
#define AUDIO_FREQUENCY_192K 192000U
#define AUDIO_FREQUENCY_176K 176400U
#define AUDIO_FREQUENCY_96K 96000U
#define AUDIO_FREQUENCY_88K 88200U
#define AUDIO_FREQUENCY_48K 48000U
#define AUDIO_FREQUENCY_44K 44100U
#define AUDIO_FREQUENCY_32K 32000U
#define AUDIO_FREQUENCY_22K 22050U
#define AUDIO_FREQUENCY_16K 16000U
#define AUDIO_FREQUENCY_11K 11025U
#define AUDIO_FREQUENCY_8K 8000U
/* Audio bits per sample */
#define AUDIO_RESOLUTION_8B 8U
#define AUDIO_RESOLUTION_16B 16U
#define AUDIO_RESOLUTION_24B 24U
#define AUDIO_RESOLUTION_32B 32U
/* Audio mute state */
#define AUDIO_MUTE_DISABLED 0U
#define AUDIO_MUTE_ENABLED 1U
/* Audio I2C address */
#define AUDIO_I2C_ADDRESS 0x34U
/* Audio in and out GPIOs */
#define AUDIO_I2S6_MCK_GPIO_PORT GPIOA
#define AUDIO_I2S6_MCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
#define AUDIO_I2S6_MCK_GPIO_PIN GPIO_PIN_3
#define AUDIO_I2S6_MCK_SDI_GPIO_AF GPIO_AF5_SPI6
#define AUDIO_I2S6_CK_GPIO_PORT GPIOA
#define AUDIO_I2S6_CK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
#define AUDIO_I2S6_CK_GPIO_PIN GPIO_PIN_5
#define AUDIO_I2S6_CK_WS_SDO_GPIO_AF GPIO_AF8_SPI6
#define AUDIO_I2S6_WS_GPIO_PORT GPIOA
#define AUDIO_I2S6_WS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
#define AUDIO_I2S6_WS_GPIO_PIN GPIO_PIN_4
#define AUDIO_I2S6_SDO_GPIO_PORT GPIOB
#define AUDIO_I2S6_SDO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
#define AUDIO_I2S6_SDO_GPIO_PIN GPIO_PIN_5
#define AUDIO_I2S6_SDI_GPIO_PORT GPIOG
#define AUDIO_I2S6_SDI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE()
#define AUDIO_I2S6_SDI_GPIO_PIN GPIO_PIN_12
#define AUDIO_I2S6_CLK_ENABLE() __HAL_RCC_SPI6_CLK_ENABLE()
#define AUDIO_I2S6_CLK_DISABLE() __HAL_RCC_SPI6_CLK_DISABLE()
#define AUDIO_OUT_I2S6_DMA_CLK_ENABLE() __HAL_RCC_GPDMA1_CLK_ENABLE()
#define AUDIO_OUT_I2S6_DMA_CHANNEL GPDMA1_Channel2
#define AUDIO_OUT_I2S6_DMA_REQUEST GPDMA1_REQUEST_SPI6_TX
#define AUDIO_OUT_I2S6_DMA_IRQ GPDMA1_Channel2_IRQn
#define AUDIO_OUT_I2S6_DMA_IRQHandler GPDMA1_Channel2_IRQHandler
#define AUDIO_IN_I2S6_DMA_CLK_ENABLE() __HAL_RCC_GPDMA1_CLK_ENABLE()
#define AUDIO_IN_I2S6_DMA_CHANNEL GPDMA1_Channel3
#define AUDIO_IN_I2S6_DMA_REQUEST GPDMA1_REQUEST_SPI6_RX
#define AUDIO_IN_I2S6_DMA_IRQ GPDMA1_Channel3_IRQn
#define AUDIO_IN_I2S6_DMA_IRQHandler GPDMA1_Channel3_IRQHandler
#define AUDIO_ADF1_CCK0_GPIO_PORT GPIOE
#define AUDIO_ADF1_CCK0_GPIO_CLK_ENABLE() __HAL_RCC_GPIOE_CLK_ENABLE()
#define AUDIO_ADF1_CCK0_GPIO_PIN GPIO_PIN_2
#define AUDIO_ADF1_CCK0_GPIO_AF GPIO_AF1_ADF1
#define AUDIO_ADF1_DATIN0_GPIO_PORT GPIOD
#define AUDIO_ADF1_DATIN0_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
#define AUDIO_ADF1_DATIN0_GPIO_PIN GPIO_PIN_6
#define AUDIO_ADF1_DATIN0_GPIO_AF GPIO_AF3_ADF1
#define AUDIO_ADF1_CLK_ENABLE() __HAL_RCC_ADF1_CLK_ENABLE()
#define AUDIO_ADF1_CLK_DISABLE() __HAL_RCC_ADF1_CLK_DISABLE()
#define AUDIO_IN_ADF1_DMA_CLK_ENABLE() __HAL_RCC_GPDMA1_CLK_ENABLE()
#define AUDIO_IN_ADF1_DMA_CHANNEL GPDMA1_Channel4
#define AUDIO_IN_ADF1_DMA_REQUEST GPDMA1_REQUEST_ADF1_FLT0
#define AUDIO_IN_ADF1_DMA_IRQ GPDMA1_Channel4_IRQn
#define AUDIO_IN_ADF1_DMA_IRQHandler GPDMA1_Channel4_IRQHandler
/**
* @}
*/
/** @addtogroup STM32H7S78_DK_AUDIO_Exported_Variables
* @{
*/
/* Audio in and out context */
extern AUDIO_OUT_Ctx_t Audio_Out_Ctx[AUDIO_OUT_INSTANCES_NBR];
extern AUDIO_IN_Ctx_t Audio_In_Ctx[AUDIO_IN_INSTANCES_NBR];
/* Audio component object */
extern void *Audio_CompObj;
/* Audio driver */
extern AUDIO_Drv_t *Audio_Drv;
/* Audio in and out I2S handles */
extern I2S_HandleTypeDef haudio_out_i2s;
extern I2S_HandleTypeDef haudio_in_i2s;
/* Audio in MDF handles */
extern MDF_HandleTypeDef haudio_in_mdf;
/**
* @}
*/
/** @defgroup STM32H7S78_DK_AUDIO_OUT_Exported_Functions STM32H7S78_DK AUDIO_OUT Exported Functions
* @{
*/
int32_t BSP_AUDIO_OUT_Init(uint32_t Instance, BSP_AUDIO_Init_t *AudioInit);
int32_t BSP_AUDIO_OUT_DeInit(uint32_t Instance);
int32_t BSP_AUDIO_OUT_Play(uint32_t Instance, uint8_t *pData, uint32_t NbrOfBytes);
int32_t BSP_AUDIO_OUT_Pause(uint32_t Instance);
int32_t BSP_AUDIO_OUT_Resume(uint32_t Instance);
int32_t BSP_AUDIO_OUT_Stop(uint32_t Instance);
int32_t BSP_AUDIO_OUT_Mute(uint32_t Instance);
int32_t BSP_AUDIO_OUT_UnMute(uint32_t Instance);
int32_t BSP_AUDIO_OUT_IsMute(uint32_t Instance, uint32_t *IsMute);
int32_t BSP_AUDIO_OUT_SetVolume(uint32_t Instance, uint32_t Volume);
int32_t BSP_AUDIO_OUT_GetVolume(uint32_t Instance, uint32_t *Volume);
int32_t BSP_AUDIO_OUT_SetSampleRate(uint32_t Instance, uint32_t SampleRate);
int32_t BSP_AUDIO_OUT_GetSampleRate(uint32_t Instance, uint32_t *SampleRate);
int32_t BSP_AUDIO_OUT_SetDevice(uint32_t Instance, uint32_t Device);
int32_t BSP_AUDIO_OUT_GetDevice(uint32_t Instance, uint32_t *Device);
int32_t BSP_AUDIO_OUT_SetBitsPerSample(uint32_t Instance, uint32_t BitsPerSample);
int32_t BSP_AUDIO_OUT_GetBitsPerSample(uint32_t Instance, uint32_t *BitsPerSample);
int32_t BSP_AUDIO_OUT_SetChannelsNbr(uint32_t Instance, uint32_t ChannelNbr);
int32_t BSP_AUDIO_OUT_GetChannelsNbr(uint32_t Instance, uint32_t *ChannelNbr);
int32_t BSP_AUDIO_OUT_GetState(uint32_t Instance, uint32_t *State);
#if (USE_HAL_I2S_REGISTER_CALLBACKS == 1)
int32_t BSP_AUDIO_OUT_RegisterDefaultMspCallbacks(uint32_t Instance);
int32_t BSP_AUDIO_OUT_RegisterMspCallbacks(uint32_t Instance, BSP_AUDIO_OUT_Cb_t *CallBacks);
#endif /* (USE_HAL_I2S_REGISTER_CALLBACKS == 1) */
void BSP_AUDIO_OUT_TransferComplete_CallBack(uint32_t Instance);
void BSP_AUDIO_OUT_HalfTransfer_CallBack(uint32_t Instance);
void BSP_AUDIO_OUT_Error_CallBack(uint32_t Instance);
void BSP_AUDIO_OUT_IRQHandler(uint32_t Instance, uint32_t Device);
HAL_StatusTypeDef MX_I2S6_ClockConfig(I2S_HandleTypeDef *hi2s, uint32_t SampleRate);
HAL_StatusTypeDef MX_I2S6_Init(I2S_HandleTypeDef *hi2s, MX_I2S_Config_t *MXInit);
/**
* @}
*/
/** @defgroup STM32H7S78_DK_AUDIO_IN_Exported_Functions STM32H7S78_DK AUDIO_IN Exported Functions
* @{
*/
int32_t BSP_AUDIO_IN_Init(uint32_t Instance, BSP_AUDIO_Init_t *AudioInit);
int32_t BSP_AUDIO_IN_DeInit(uint32_t Instance);
int32_t BSP_AUDIO_IN_Record(uint32_t Instance, uint8_t *pData, uint32_t NbrOfBytes);
int32_t BSP_AUDIO_IN_Pause(uint32_t Instance);
int32_t BSP_AUDIO_IN_Resume(uint32_t Instance);
int32_t BSP_AUDIO_IN_Stop(uint32_t Instance);
int32_t BSP_AUDIO_IN_SetVolume(uint32_t Instance, uint32_t Volume);
int32_t BSP_AUDIO_IN_GetVolume(uint32_t Instance, uint32_t *Volume);
int32_t BSP_AUDIO_IN_SetSampleRate(uint32_t Instance, uint32_t SampleRate);
int32_t BSP_AUDIO_IN_GetSampleRate(uint32_t Instance, uint32_t *SampleRate);
int32_t BSP_AUDIO_IN_SetDevice(uint32_t Instance, uint32_t Device);
int32_t BSP_AUDIO_IN_GetDevice(uint32_t Instance, uint32_t *Device);
int32_t BSP_AUDIO_IN_SetBitsPerSample(uint32_t Instance, uint32_t BitsPerSample);
int32_t BSP_AUDIO_IN_GetBitsPerSample(uint32_t Instance, uint32_t *BitsPerSample);
int32_t BSP_AUDIO_IN_SetChannelsNbr(uint32_t Instance, uint32_t ChannelNbr);
int32_t BSP_AUDIO_IN_GetChannelsNbr(uint32_t Instance, uint32_t *ChannelNbr);
int32_t BSP_AUDIO_IN_GetState(uint32_t Instance, uint32_t *State);
#if ((USE_HAL_MDF_REGISTER_CALLBACKS == 1) || (USE_HAL_I2S_REGISTER_CALLBACKS == 1))
int32_t BSP_AUDIO_IN_RegisterDefaultMspCallbacks(uint32_t Instance);
int32_t BSP_AUDIO_IN_RegisterMspCallbacks(uint32_t Instance, BSP_AUDIO_IN_Cb_t *CallBacks);
#endif /* ((USE_HAL_MDF_REGISTER_CALLBACKS == 1) || (USE_HAL_I2S_REGISTER_CALLBACKS == 1)) */
void BSP_AUDIO_IN_TransferComplete_CallBack(uint32_t Instance);
void BSP_AUDIO_IN_HalfTransfer_CallBack(uint32_t Instance);
void BSP_AUDIO_IN_Error_CallBack(uint32_t Instance);
void BSP_AUDIO_IN_IRQHandler(uint32_t Instance, uint32_t Device);
HAL_StatusTypeDef MX_ADF1_ClockConfig(MDF_HandleTypeDef *hmdf, uint32_t SampleRate);
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* STM32H7S78_DISCOVERY_AUDIO_H */
Drivers/STM32H7RSxx_BSP/STM32H7S78-DK/stm32h7s78_discovery_bus.c
+885
View File
@@ -0,0 +1,885 @@
/**
******************************************************************************
* @file stm32h7s78_discovery_bus.c
* @author MCD Application Team
* @brief This file provides a set of firmware functions to communicate
* with external devices available on STM32H7S78-DK board (MB1736) from
* STMicroelectronics
******************************************************************************
* @attention
*
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32h7s78_discovery_bus.h"
/** @addtogroup BSP
* @{
*/
/** @addtogroup STM32H7S78_DK
* @{
*/
/** @defgroup STM32H7S78_DK_BUS BUS
* @{
*/
/** @defgroup STM32H7S78_DK_BUS_Private_Constants Private Constants
* @{
*/
#ifndef I2C_VALID_TIMING_NBR
#define I2C_VALID_TIMING_NBR 128U
#endif /* I2C_VALID_TIMING_NBR */
#define I2C_SPEED_FREQ_STANDARD 0U /* 100 kHz */
#define I2C_SPEED_FREQ_FAST 1U /* 400 kHz */
#define I2C_SPEED_FREQ_FAST_PLUS 2U /* 1 MHz */
#define I2C_ANALOG_FILTER_DELAY_MIN 50U /* ns */
#define I2C_ANALOG_FILTER_DELAY_MAX 260U /* ns */
#define I2C_USE_ANALOG_FILTER 1U
#define I2C_DIGITAL_FILTER_COEF 0U
#define I2C_PRESC_MAX 16U
#define I2C_SCLDEL_MAX 16U
#define I2C_SDADEL_MAX 16U
#define I2C_SCLH_MAX 256U
#define I2C_SCLL_MAX 256U
#define SEC2NSEC 1000000000UL
/**
* @}
*/
/** @defgroup STM32H7S78_DK_BUS_Private_Types Private Types
* @{
*/
typedef struct
{
uint32_t freq; /* Frequency in Hz */
uint32_t freq_min; /* Minimum frequency in Hz */
uint32_t freq_max; /* Maximum frequency in Hz */
uint32_t hddat_min; /* Minimum data hold time in ns */
uint32_t vddat_max; /* Maximum data valid time in ns */
uint32_t sudat_min; /* Minimum data setup time in ns */
uint32_t lscl_min; /* Minimum low period of the SCL clock in ns */
uint32_t hscl_min; /* Minimum high period of SCL clock in ns */
uint32_t trise; /* Rise time in ns */
uint32_t tfall; /* Fall time in ns */
uint32_t dnf; /* Digital noise filter coefficient */
} I2C_Charac_t;
typedef struct
{
uint32_t presc; /* Timing prescaler */
uint32_t tscldel; /* SCL delay */
uint32_t tsdadel; /* SDA delay */
uint32_t sclh; /* SCL high period */
uint32_t scll; /* SCL low period */
} I2C_Timings_t;
/**
* @}
*/
/** @addtogroup STM32H7S78_DK_BUS_Private_Constants
* @{
*/
static const I2C_Charac_t I2C_Charac[] =
{
[I2C_SPEED_FREQ_STANDARD] =
{
.freq = 100000,
.freq_min = 80000,
.freq_max = 120000,
.hddat_min = 0,
.vddat_max = 3450,
.sudat_min = 250,
.lscl_min = 4700,
.hscl_min = 4000,
.trise = 640,
.tfall = 20,
.dnf = I2C_DIGITAL_FILTER_COEF,
},
[I2C_SPEED_FREQ_FAST] =
{
.freq = 400000,
.freq_min = 320000,
.freq_max = 480000,
.hddat_min = 0,
.vddat_max = 900,
.sudat_min = 100,
.lscl_min = 1300,
.hscl_min = 600,
.trise = 250,
.tfall = 100,
.dnf = I2C_DIGITAL_FILTER_COEF,
},
[I2C_SPEED_FREQ_FAST_PLUS] =
{
.freq = 1000000,
.freq_min = 800000,
.freq_max = 1200000,
.hddat_min = 0,
.vddat_max = 450,
.sudat_min = 50,
.lscl_min = 500,
.hscl_min = 260,
.trise = 60,
.tfall = 100,
.dnf = I2C_DIGITAL_FILTER_COEF,
},
};
/**
* @}
*/
/** @defgroup STM32H7S78_DK_BUS_Private_Variables Private Variables
* @{
*/
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
static uint32_t IsI2c1MspCbValid = 0;
#endif /* (USE_HAL_I2C_REGISTER_CALLBACKS == 1) */
static uint32_t I2c1InitCounter = 0;
static I2C_Timings_t I2c_valid_timing[I2C_VALID_TIMING_NBR];
static uint32_t I2c_valid_timing_nbr = 0;
#if defined(BSP_USE_CMSIS_OS)
static osSemaphoreId BspI2cSemaphore = 0;
#endif /* BSP_USE_CMSIS_OS */
/**
* @}
*/
/** @defgroup STM32H7S78_DK_BUS_Exported_Variables Exported Variables
* @{
*/
I2C_HandleTypeDef hbus_i2c1;
/**
* @}
*/
/** @defgroup STM32H7S78_DK_BUS_Private_FunctionPrototypes BUS Private FunctionPrototypes
* @{
*/
static void I2C1_MspInit(I2C_HandleTypeDef *phi2c);
static void I2C1_MspDeInit(I2C_HandleTypeDef *phi2c);
static int32_t I2C1_WriteReg(uint16_t DevAddr, uint16_t MemAddSize, uint16_t Reg, uint8_t *pData, uint16_t Length);
static int32_t I2C1_ReadReg(uint16_t DevAddr, uint16_t MemAddSize, uint16_t Reg, uint8_t *pData, uint16_t Length);
static uint32_t I2C_GetTiming(uint32_t clock_src_freq, uint32_t i2c_freq);
static uint32_t I2C_Compute_SCLL_SCLH(uint32_t clock_src_freq, uint32_t I2C_speed);
static void I2C_Compute_PRESC_SCLDEL_SDADEL(uint32_t clock_src_freq, uint32_t I2C_speed);
/**
* @}
*/
/** @defgroup STM32H7S78_DK_BUS_Exported_Functions Exported Functions
* @{
*/
/**
* @brief Initializes I2C HAL.
* @retval BSP status
*/
int32_t BSP_I2C1_Init(void)
{
int32_t ret = BSP_ERROR_NONE;
hbus_i2c1.Instance = BUS_I2C1;
if (I2c1InitCounter == 0U)
{
I2c1InitCounter++;
if (HAL_I2C_GetState(&hbus_i2c1) == HAL_I2C_STATE_RESET)
{
#if defined(BSP_USE_CMSIS_OS)
if (BspI2cSemaphore == NULL)
{
/* Create semaphore to prevent multiple I2C access */
osSemaphoreDef(BSP_I2C_SEM);
BspI2cSemaphore = osSemaphoreCreate(osSemaphore(BSP_I2C_SEM), 1);
}
#endif /* BSP_USE_CMSIS_OS */
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 0)
/* Init the I2C1 Msp */
I2C1_MspInit(&hbus_i2c1);
#else
if (IsI2c1MspCbValid == 0U)
{
if (BSP_I2C1_RegisterDefaultMspCallbacks() != BSP_ERROR_NONE)
{
ret = BSP_ERROR_MSP_FAILURE;
}
}
if (ret == BSP_ERROR_NONE)
{
#endif /* (USE_HAL_I2C_REGISTER_CALLBACKS == 0) */
if (MX_I2C1_Init(&hbus_i2c1, I2C_GetTiming(HAL_RCC_GetPCLK2Freq(), BUS_I2C1_FREQUENCY)) != HAL_OK)
{
ret = BSP_ERROR_BUS_FAILURE;
}
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
}
#endif /* (USE_HAL_I2C_REGISTER_CALLBACKS == 1) */
}
}
return ret;
}
/**
* @brief DeInitializes I2C HAL.
* @retval BSP status
*/
int32_t BSP_I2C1_DeInit(void)
{
int32_t ret = BSP_ERROR_NONE;
I2c1InitCounter--;
if (I2c1InitCounter == 0U)
{
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 0)
I2C1_MspDeInit(&hbus_i2c1);
#endif /* (USE_HAL_I2C_REGISTER_CALLBACKS == 0) */
/* Init the I2C */
if (HAL_I2C_DeInit(&hbus_i2c1) != HAL_OK)
{
ret = BSP_ERROR_BUS_FAILURE;
}
}
return ret;
}
/**
* @brief MX I2C1 initialization.
* @param hi2c I2C handle
* @param timing I2C timing
* @retval HAL status
*/
__weak HAL_StatusTypeDef MX_I2C1_Init(I2C_HandleTypeDef *hi2c, uint32_t timing)
{
HAL_StatusTypeDef status = HAL_OK;
hi2c->Init.Timing = timing;
hi2c->Init.OwnAddress1 = 0;
hi2c->Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
hi2c->Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
hi2c->Init.OwnAddress2 = 0;
hi2c->Init.OwnAddress2Masks = I2C_OA2_NOMASK;
hi2c->Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
hi2c->Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
if (HAL_I2C_Init(hi2c) != HAL_OK)
{
status = HAL_ERROR;
}
else
{
uint32_t analog_filter;
analog_filter = I2C_ANALOGFILTER_ENABLE;
if (HAL_I2CEx_ConfigAnalogFilter(hi2c, analog_filter) != HAL_OK)
{
status = HAL_ERROR;
}
else
{
if (HAL_I2CEx_ConfigDigitalFilter(hi2c, I2C_DIGITAL_FILTER_COEF) != HAL_OK)
{
status = HAL_ERROR;
}
}
}
return status;
}
/**
* @brief Write a 8bit value in a register of the device through BUS.
* @param DevAddr Device address on Bus.
* @param Reg The target register address to write
* @param pData The target register value to be written
* @param Length buffer size to be written
* @retval BSP status
*/
int32_t BSP_I2C1_WriteReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
int32_t ret;
#if defined(BSP_USE_CMSIS_OS)
/* Get semaphore to prevent multiple I2C access */
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
#endif /* BSP_USE_CMSIS_OS */
if (I2C1_WriteReg(DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length) == 0)
{
ret = BSP_ERROR_NONE;
}
else
{
if ( HAL_I2C_GetError(&hbus_i2c1) == HAL_I2C_ERROR_AF)
{
ret = BSP_ERROR_BUS_ACKNOWLEDGE_FAILURE;
}
else
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
}
#if defined(BSP_USE_CMSIS_OS)
/* Release semaphore to prevent multiple I2C access */
osSemaphoreRelease(BspI2cSemaphore);
#endif /* BSP_USE_CMSIS_OS */
return ret;
}
/**
* @brief Read a 8bit register of the device through BUS
* @param DevAddr Device address on BUS
* @param Reg The target register address to read
* @param pData Pointer to data buffer
* @param Length Length of the data
* @retval BSP status
*/
int32_t BSP_I2C1_ReadReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
int32_t ret;
#if defined(BSP_USE_CMSIS_OS)
/* Get semaphore to prevent multiple I2C access */
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
#endif /* BSP_USE_CMSIS_OS */
if (I2C1_ReadReg(DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length) == 0)
{
ret = BSP_ERROR_NONE;
}
else
{
if ( HAL_I2C_GetError(&hbus_i2c1) == HAL_I2C_ERROR_AF)
{
ret = BSP_ERROR_BUS_ACKNOWLEDGE_FAILURE;
}
else
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
}
#if defined(BSP_USE_CMSIS_OS)
/* Release semaphore to prevent multiple I2C access */
osSemaphoreRelease(BspI2cSemaphore);
#endif /* BSP_USE_CMSIS_OS */
return ret;
}
/**
* @brief Write a 16bit value in a register of the device through BUS.
* @param DevAddr Device address on Bus.
* @param Reg The target register address to write
* @param pData The target register value to be written
* @param Length buffer size to be written
* @retval BSP status
*/
int32_t BSP_I2C1_WriteReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
int32_t ret;
#if defined(BSP_USE_CMSIS_OS)
/* Get semaphore to prevent multiple I2C access */
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
#endif /* BSP_USE_CMSIS_OS */
if (I2C1_WriteReg(DevAddr, Reg, I2C_MEMADD_SIZE_16BIT, pData, Length) == 0)
{
ret = BSP_ERROR_NONE;
}
else
{
if ( HAL_I2C_GetError(&hbus_i2c1) == HAL_I2C_ERROR_AF)
{
ret = BSP_ERROR_BUS_ACKNOWLEDGE_FAILURE;
}
else
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
}
#if defined(BSP_USE_CMSIS_OS)
/* Release semaphore to prevent multiple I2C access */
osSemaphoreRelease(BspI2cSemaphore);
#endif /* BSP_USE_CMSIS_OS */
return ret;
}
/**
* @brief Read a 16bit register of the device through BUS
* @param DevAddr Device address on BUS
* @param Reg The target register address to read
* @param pData Pointer to data buffer
* @param Length Length of the data
* @retval BSP status
*/
int32_t BSP_I2C1_ReadReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length)
{
int32_t ret;
#if defined(BSP_USE_CMSIS_OS)
/* Get semaphore to prevent multiple I2C access */
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
#endif /* BSP_USE_CMSIS_OS */
if (I2C1_ReadReg(DevAddr, Reg, I2C_MEMADD_SIZE_16BIT, pData, Length) == 0)
{
ret = BSP_ERROR_NONE;
}
else
{
if ( HAL_I2C_GetError(&hbus_i2c1) == HAL_I2C_ERROR_AF)
{
ret = BSP_ERROR_BUS_ACKNOWLEDGE_FAILURE;
}
else
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
}
#if defined(BSP_USE_CMSIS_OS)
/* Release semaphore to prevent multiple I2C access */
osSemaphoreRelease(BspI2cSemaphore);
#endif /* BSP_USE_CMSIS_OS */
return ret;
}
/**
* @brief Checks if target device is ready for communication.
* @note This function is used with Memory devices
* @param DevAddr Target device address
* @param Trials Number of trials
* @retval BSP status
*/
int32_t BSP_I2C1_IsReady(uint16_t DevAddr, uint32_t Trials)
{
int32_t ret = BSP_ERROR_NONE;
#if defined(BSP_USE_CMSIS_OS)
/* Get semaphore to prevent multiple I2C access */
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
#endif /* BSP_USE_CMSIS_OS */
if (HAL_I2C_IsDeviceReady(&hbus_i2c1, DevAddr, Trials, 1000) != HAL_OK)
{
ret = BSP_ERROR_BUSY;
}
#if defined(BSP_USE_CMSIS_OS)
/* Release semaphore to prevent multiple I2C access */
osSemaphoreRelease(BspI2cSemaphore);
#endif /* BSP_USE_CMSIS_OS */
return ret;
}
/**
* @brief Delay function
* @retval Tick value
*/
int32_t BSP_GetTick(void)
{
return (int32_t)HAL_GetTick();
}
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
/**
* @brief Register Default I2C1 Bus Msp Callbacks
* @retval BSP status
*/
int32_t BSP_I2C1_RegisterDefaultMspCallbacks (void)
{
int32_t ret = BSP_ERROR_NONE;
#if defined(BSP_USE_CMSIS_OS)
/* Get semaphore to prevent multiple I2C access */
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
#endif /* BSP_USE_CMSIS_OS */
__HAL_I2C_RESET_HANDLE_STATE(&hbus_i2c1);
/* Register default MspInit/MspDeInit Callback */
if (HAL_I2C_RegisterCallback(&hbus_i2c1, HAL_I2C_MSPINIT_CB_ID, I2C1_MspInit) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else if (HAL_I2C_RegisterCallback(&hbus_i2c1, HAL_I2C_MSPDEINIT_CB_ID, I2C1_MspDeInit) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else
{
IsI2c1MspCbValid = 1U;
}
#if defined(BSP_USE_CMSIS_OS)
/* Release semaphore to prevent multiple I2C access */
osSemaphoreRelease(BspI2cSemaphore);
#endif /* BSP_USE_CMSIS_OS */
/* BSP status */
return ret;
}
/**
* @brief Register I2C1 Bus Msp Callback registering
* @param Callbacks pointer to I2C1 MspInit/MspDeInit callback functions
* @retval BSP status
*/
int32_t BSP_I2C1_RegisterMspCallbacks (BSP_I2C_Cb_t *Callback)
{
int32_t ret = BSP_ERROR_NONE;
#if defined(BSP_USE_CMSIS_OS)
/* Get semaphore to prevent multiple I2C access */
osSemaphoreWait(BspI2cSemaphore, osWaitForever);
#endif /* BSP_USE_CMSIS_OS */
__HAL_I2C_RESET_HANDLE_STATE(&hbus_i2c1);
/* Register MspInit/MspDeInit Callbacks */
if (HAL_I2C_RegisterCallback(&hbus_i2c1, HAL_I2C_MSPINIT_CB_ID, Callback->pMspI2cInitCb) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else if (HAL_I2C_RegisterCallback(&hbus_i2c1, HAL_I2C_MSPDEINIT_CB_ID, Callback->pMspI2cDeInitCb) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else
{
IsI2c1MspCbValid = 1U;
}
#if defined(BSP_USE_CMSIS_OS)
/* Release semaphore to prevent multiple I2C access */
osSemaphoreRelease(BspI2cSemaphore);
#endif /* BSP_USE_CMSIS_OS */
/* BSP status */
return ret;
}
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
/**
* @}
*/
/** @defgroup STM32H7S78_DK_BUS_Private_Functions Private Functions
* @{
*/
/**
* @brief Compute I2C timing according current I2C clock source and required I2C clock.
* @param clock_src_freq I2C clock source in Hz.
* @param i2c_freq Required I2C clock in Hz.
* @retval I2C timing or 0 in case of error.
*/
static uint32_t I2C_GetTiming(uint32_t clock_src_freq, uint32_t i2c_freq)
{
uint32_t ret = 0;
uint32_t speed;
uint32_t idx;
if ((clock_src_freq != 0U) && (i2c_freq != 0U))
{
for ( speed = 0 ; speed <= (uint32_t)I2C_SPEED_FREQ_FAST_PLUS ; speed++)
{
if ((i2c_freq >= I2C_Charac[speed].freq_min) &&
(i2c_freq <= I2C_Charac[speed].freq_max))
{
I2C_Compute_PRESC_SCLDEL_SDADEL(clock_src_freq, speed);
idx = I2C_Compute_SCLL_SCLH(clock_src_freq, speed);
if (idx < I2C_VALID_TIMING_NBR)
{
ret = ((I2c_valid_timing[idx].presc & 0x0FU) << 28) | \
((I2c_valid_timing[idx].tscldel & 0x0FU) << 20) | \
((I2c_valid_timing[idx].tsdadel & 0x0FU) << 16) | \
((I2c_valid_timing[idx].sclh & 0xFFU) << 8) | \
((I2c_valid_timing[idx].scll & 0xFFU) << 0);
}
break;
}
}
}
return ret;
}
/**
* @brief Compute PRESC, SCLDEL and SDADEL.
* @param clock_src_freq I2C source clock in HZ.
* @param I2C_speed I2C frequency (index).
* @retval None.
*/
static void I2C_Compute_PRESC_SCLDEL_SDADEL(uint32_t clock_src_freq, uint32_t I2C_speed)
{
uint32_t prev_presc = I2C_PRESC_MAX;
uint32_t ti2cclk;
int32_t tsdadel_min;
int32_t tsdadel_max;
int32_t tscldel_min;
uint32_t presc;
uint32_t scldel;
uint32_t sdadel;
uint32_t tafdel_min;
uint32_t tafdel_max;
ti2cclk = (SEC2NSEC + (clock_src_freq / 2U)) / clock_src_freq;
tafdel_min = I2C_ANALOG_FILTER_DELAY_MIN;
tafdel_max = I2C_ANALOG_FILTER_DELAY_MAX;
/**
* tDNF = DNF x tI2CCLK
* tPRESC = (PRESC+1) x tI2CCLK
* SDADEL >= {tf +tHD;DAT(min) - tAF(min) - tDNF - [3 x tI2CCLK]} / {tPRESC}
* SDADEL <= {tVD;DAT(max) - tr - tAF(max) - tDNF- [4 x tI2CCLK]} / {tPRESC}
**/
tsdadel_min = (int32_t)I2C_Charac[I2C_speed].tfall + (int32_t)I2C_Charac[I2C_speed].hddat_min -
(int32_t)tafdel_min - (int32_t)(((int32_t)I2C_Charac[I2C_speed].dnf + 3) * (int32_t)ti2cclk);
tsdadel_max = (int32_t)I2C_Charac[I2C_speed].vddat_max - (int32_t)I2C_Charac[I2C_speed].trise -
(int32_t)tafdel_max - (int32_t)(((int32_t)I2C_Charac[I2C_speed].dnf + 4) * (int32_t)ti2cclk);
/* {[tr+ tSU;DAT(min)] / [tPRESC]} - 1 <= SCLDEL */
tscldel_min = (int32_t)I2C_Charac[I2C_speed].trise + (int32_t)I2C_Charac[I2C_speed].sudat_min;
if (tsdadel_min <= 0)
{
tsdadel_min = 0;
}
if (tsdadel_max <= 0)
{
tsdadel_max = 0;
}
for (presc = 0; presc < I2C_PRESC_MAX; presc++)
{
for (scldel = 0; scldel < I2C_SCLDEL_MAX; scldel++)
{
/* TSCLDEL = (SCLDEL+1) * (PRESC+1) * TI2CCLK */
uint32_t tscldel = (scldel + 1U) * (presc + 1U) * ti2cclk;
if (tscldel >= (uint32_t)tscldel_min)
{
for (sdadel = 0; sdadel < I2C_SDADEL_MAX; sdadel++)
{
/* TSDADEL = SDADEL * (PRESC+1) * TI2CCLK */
uint32_t tsdadel = (sdadel * (presc + 1U)) * ti2cclk;
if ((tsdadel >= (uint32_t)tsdadel_min) && (tsdadel <= (uint32_t)tsdadel_max))
{
if (presc != prev_presc)
{
I2c_valid_timing[I2c_valid_timing_nbr].presc = presc;
I2c_valid_timing[I2c_valid_timing_nbr].tscldel = scldel;
I2c_valid_timing[I2c_valid_timing_nbr].tsdadel = sdadel;
prev_presc = presc;
I2c_valid_timing_nbr ++;
if (I2c_valid_timing_nbr >= I2C_VALID_TIMING_NBR)
{
return;
}
}
}
}
}
}
}
}
/**
* @brief Calculate SCLL and SCLH and find best configuration.
* @param clock_src_freq I2C source clock in HZ.
* @param I2C_speed I2C frequency (index).
* @retval config index (0 to I2C_VALID_TIMING_NBR], 0xFFFFFFFF for no valid config.
*/
static uint32_t I2C_Compute_SCLL_SCLH (uint32_t clock_src_freq, uint32_t I2C_speed)
{
uint32_t ret = 0xFFFFFFFFU;
uint32_t ti2cclk;
uint32_t ti2cspeed;
uint32_t prev_error;
uint32_t dnf_delay;
uint32_t clk_min;
uint32_t clk_max;
uint32_t scll;
uint32_t sclh;
uint32_t tafdel_min;
ti2cclk = (SEC2NSEC + (clock_src_freq / 2U)) / clock_src_freq;
ti2cspeed = (SEC2NSEC + (I2C_Charac[I2C_speed].freq / 2U)) / I2C_Charac[I2C_speed].freq;
tafdel_min = I2C_ANALOG_FILTER_DELAY_MIN;
/* tDNF = DNF x tI2CCLK */
dnf_delay = I2C_Charac[I2C_speed].dnf * ti2cclk;
clk_max = SEC2NSEC / I2C_Charac[I2C_speed].freq_min;
clk_min = SEC2NSEC / I2C_Charac[I2C_speed].freq_max;
prev_error = ti2cspeed;
for (uint32_t count = 0; count < I2c_valid_timing_nbr; count++)
{
/* tPRESC = (PRESC+1) x tI2CCLK*/
uint32_t tpresc = (I2c_valid_timing[count].presc + 1U) * ti2cclk;
for (scll = 0; scll < I2C_SCLL_MAX; scll++)
{
/* tLOW(min) <= tAF(min) + tDNF + 2 x tI2CCLK + [(SCLL+1) x tPRESC ] */
uint32_t tscl_l = tafdel_min + dnf_delay + (2U * ti2cclk) + ((scll + 1U) * tpresc);
/* The I2CCLK period tI2CCLK must respect the following conditions:
tI2CCLK < (tLOW - tfilters) / 4 and tI2CCLK < tHIGH */
if ((tscl_l > I2C_Charac[I2C_speed].lscl_min) && (ti2cclk < ((tscl_l - tafdel_min - dnf_delay) / 4U)))
{
for (sclh = 0; sclh < I2C_SCLH_MAX; sclh++)
{
/* tHIGH(min) <= tAF(min) + tDNF + 2 x tI2CCLK + [(SCLH+1) x tPRESC] */
uint32_t tscl_h = tafdel_min + dnf_delay + (2U * ti2cclk) + ((sclh + 1U) * tpresc);
/* tSCL = tf + tLOW + tr + tHIGH */
uint32_t tscl = tscl_l + tscl_h + I2C_Charac[I2C_speed].trise + I2C_Charac[I2C_speed].tfall;
if ((tscl >= clk_min) && (tscl <= clk_max) && (tscl_h >= I2C_Charac[I2C_speed].hscl_min) && (ti2cclk < tscl_h))
{
int32_t error = (int32_t)tscl - (int32_t)ti2cspeed;
if (error < 0)
{
error = -error;
}
/* look for the timings with the lowest clock error */
if ((uint32_t)error < prev_error)
{
prev_error = (uint32_t)error;
I2c_valid_timing[count].scll = scll;
I2c_valid_timing[count].sclh = sclh;
ret = count;
}
}
}
}
}
}
return ret;
}
/**
* @brief Initializes I2C MSP.
* @param phi2c I2C handler
* @retval None
*/
static void I2C1_MspInit(I2C_HandleTypeDef *phi2c)
{
GPIO_InitTypeDef gpio_init_structure;
/* Prevent unused argument(s) compilation warning */
UNUSED(phi2c);
/*** Configure the GPIOs ***/
/* Enable SCL GPIO clock */
BUS_I2C1_SCL_GPIO_CLK_ENABLE();
/* Enable SDA GPIO clock */
BUS_I2C1_SDA_GPIO_CLK_ENABLE();
/* Configure I2C Tx as alternate function */
gpio_init_structure.Pin = BUS_I2C1_SCL_PIN;
gpio_init_structure.Mode = GPIO_MODE_AF_OD;
gpio_init_structure.Pull = GPIO_NOPULL;
gpio_init_structure.Speed = GPIO_SPEED_FREQ_HIGH;
gpio_init_structure.Alternate = BUS_I2C1_SCL_AF;
HAL_GPIO_Init(BUS_I2C1_SCL_GPIO_PORT, &gpio_init_structure);
/* Configure I2C Rx as alternate function */
gpio_init_structure.Pin = BUS_I2C1_SDA_PIN;
gpio_init_structure.Alternate = BUS_I2C1_SDA_AF;
HAL_GPIO_Init(BUS_I2C1_SDA_GPIO_PORT, &gpio_init_structure);
/*** Configure the I2C peripheral ***/
/* Enable I2C clock */
BUS_I2C1_CLK_ENABLE();
/* Force the I2C peripheral clock reset */
BUS_I2C1_FORCE_RESET();
/* Release the I2C peripheral clock reset */
BUS_I2C1_RELEASE_RESET();
}
/**
* @brief DeInitializes I2C MSP.
* @param phi2c I2C handler
* @retval None
*/
static void I2C1_MspDeInit(I2C_HandleTypeDef *phi2c)
{
GPIO_InitTypeDef gpio_init_structure;
/* Prevent unused argument(s) compilation warning */
UNUSED(phi2c);
/* Configure I2C Tx, Rx as alternate function */
gpio_init_structure.Pin = BUS_I2C1_SCL_PIN;
HAL_GPIO_DeInit(BUS_I2C1_SCL_GPIO_PORT, gpio_init_structure.Pin);
gpio_init_structure.Pin = BUS_I2C1_SDA_PIN;
HAL_GPIO_DeInit(BUS_I2C1_SDA_GPIO_PORT, gpio_init_structure.Pin);
/* Disable I2C clock */
BUS_I2C1_CLK_DISABLE();
}
/**
* @brief Write a value in a register of the device through BUS.
* @param DevAddr Device address on Bus.
* @param MemAddSize Size of internal memory address
* @param Reg The target register address to write
* @param pData The target register value to be written
* @param Length data length in bytes
* @retval BSP status
*/
static int32_t I2C1_WriteReg(uint16_t DevAddr, uint16_t Reg, uint16_t MemAddSize, uint8_t *pData, uint16_t Length)
{
if (HAL_I2C_Mem_Write(&hbus_i2c1, DevAddr, Reg, MemAddSize, pData, Length, 1000) == HAL_OK)
{
return BSP_ERROR_NONE;
}
return BSP_ERROR_BUS_FAILURE;
}
/**
* @brief Read a register of the device through BUS
* @param DevAddr Device address on BUS
* @param MemAddSize Size of internal memory address
* @param Reg The target register address to read
* @param pData The target register value to be read
* @param Length data length in bytes
* @retval BSP status
*/
static int32_t I2C1_ReadReg(uint16_t DevAddr, uint16_t Reg, uint16_t MemAddSize, uint8_t *pData, uint16_t Length)
{
if (HAL_I2C_Mem_Read(&hbus_i2c1, DevAddr, Reg, MemAddSize, pData, Length, 1000) == HAL_OK)
{
return BSP_ERROR_NONE;
}
return BSP_ERROR_BUS_FAILURE;
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
Drivers/STM32H7RSxx_BSP/STM32H7S78-DK/stm32h7s78_discovery_bus.h
+135
View File
@@ -0,0 +1,135 @@
/**
******************************************************************************
* @file stm32h7s78_discovery_bus.h
* @author MCD Application Team
* @brief This file is the header of stm32h7s78_discovery_bus.c file
******************************************************************************
* @attention
*
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32H7S78_DISCOVERY_BUS_H
#define STM32H7S78_DISCOVERY_BUS_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32h7s78_discovery_conf.h"
#include "stm32h7s78_discovery_errno.h"
#if defined(BSP_USE_CMSIS_OS)
#include "cmsis_os.h"
#endif /* BSP_USE_CMSIS_OS */
/** @addtogroup BSP
* @{
*/
/** @addtogroup STM32H7S78_DK
* @{
*/
/** @addtogroup STM32H7S78_DK_BUS
* @{
*/
/** @defgroup STM32H7S78_DK_BUS_Exported_Types Exported Types
* @{
*/
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
typedef struct
{
void (* pMspI2cInitCb)(I2C_HandleTypeDef *);
void (* pMspI2cDeInitCb)(I2C_HandleTypeDef *);
} BSP_I2C_Cb_t;
#endif /* (USE_HAL_I2C_REGISTER_CALLBACKS == 1) */
/**
* @}
*/
/** @defgroup STM32H7S78_DK_BUS_Exported_Constants Exported Constants
* @{
*/
/* Definition for I2C1 clock resources */
#define BUS_I2C1 I2C1
#define BUS_I2C1_CLK_ENABLE() __HAL_RCC_I2C1_CLK_ENABLE()
#define BUS_I2C1_CLK_DISABLE() __HAL_RCC_I2C1_CLK_DISABLE()
#define BUS_I2C1_SCL_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
#define BUS_I2C1_SCL_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
#define BUS_I2C1_SDA_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
#define BUS_I2C1_SDA_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
#define BUS_I2C1_FORCE_RESET() __HAL_RCC_I2C1_FORCE_RESET()
#define BUS_I2C1_RELEASE_RESET() __HAL_RCC_I2C1_RELEASE_RESET()
/* Definition for I2C1 Pins */
#define BUS_I2C1_SCL_PIN GPIO_PIN_6
#define BUS_I2C1_SDA_PIN GPIO_PIN_9
#define BUS_I2C1_SCL_GPIO_PORT GPIOB
#define BUS_I2C1_SDA_GPIO_PORT GPIOB
#define BUS_I2C1_SCL_AF GPIO_AF4_I2C1
#define BUS_I2C1_SDA_AF GPIO_AF4_I2C1
#ifndef BUS_I2C1_FREQUENCY
#define BUS_I2C1_FREQUENCY 100000U /* Frequency of I2Cn = 100 KHz*/
#endif /* BUS_I2C1_FREQUENCY */
/**
* @}
*/
/** @addtogroup STM32H7S78_DK_BUS_Exported_Variables
* @{
*/
extern I2C_HandleTypeDef hbus_i2c1;
/**
* @}
*/
/** @addtogroup STM32H7S78_DK_BUS_Exported_Functions
* @{
*/
int32_t BSP_I2C1_Init(void);
int32_t BSP_I2C1_DeInit(void);
int32_t BSP_I2C1_WriteReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
int32_t BSP_I2C1_ReadReg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
int32_t BSP_I2C1_WriteReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
int32_t BSP_I2C1_ReadReg16(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length);
int32_t BSP_I2C1_Recv(uint16_t DevAddr, uint16_t Reg, uint16_t MemAddSize, uint8_t *pData, uint16_t Length);
int32_t BSP_I2C1_Send(uint16_t DevAddr, uint16_t Reg, uint16_t MemAddSize, uint8_t *pData, uint16_t Length);
int32_t BSP_I2C1_IsReady(uint16_t DevAddr, uint32_t Trials);
int32_t BSP_GetTick(void);
#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
int32_t BSP_I2C1_RegisterDefaultMspCallbacks(void);
int32_t BSP_I2C1_RegisterMspCallbacks(BSP_I2C_Cb_t *Callback);
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
HAL_StatusTypeDef MX_I2C1_Init(I2C_HandleTypeDef *hi2c, uint32_t timing);
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* STM32H7S78_DISCOVERY_BUS_H */
Drivers/STM32H7RSxx_BSP/STM32H7S78-DK/stm32h7s78_discovery_conf_template.h
+66
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/**
******************************************************************************
* @file stm32h7s78_discovery_conf_template.h
* @author MCD Application Team
* This file should be copied to the application folder and renamed
* to stm32h7s78_discovery_conf.h
******************************************************************************
* @attention
*
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32H7S78_DISCOVERY_CONF_H
#define STM32H7S78_DISCOVERY_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32h7rsxx_hal.h"
/* COM defines */
#define USE_COM_LOG 0U
#define USE_BSP_COM_FEATURE 0U
/* Touch Sensing controller defines */
#define USE_FT5336_TS_CTRL 1U
/* TS supported features defines */
#define USE_TS_GESTURE 1U
#define USE_TS_MULTI_TOUCH 1U
/* Default TS touch number */
#define TS_TOUCH_NBR 2U
/* LCD defines */
#define LCD_LAYER_0_ADDRESS 0x90000000U
#define LCD_LAYER_1_ADDRESS 0x90200000U
/* Default Audio IN internal buffer size */
#define DEFAULT_AUDIO_IN_BUFFER_SIZE 2048U
/* IRQ priorities (Default is 15 as lowest priority level) */
#define BSP_SDRAM_IT_PRIORITY 15U
#define BSP_BUTTON_USER_IT_PRIORITY 15U
#define BSP_AUDIO_OUT_IT_PRIORITY 14U
#define BSP_AUDIO_IN_IT_PRIORITY 15U
#define BSP_SD_IT_PRIORITY 14U
#define BSP_SD_RX_IT_PRIORITY 14U
#define BSP_SD_TX_IT_PRIORITY 15U
#define BSP_TS_IT_PRIORITY 15U
#define BSP_XSPI_RAM_IT_PRIORITY 15U
#define BSP_XSPI_RAM_DMA_IT_PRIORITY 15U
#ifdef __cplusplus
}
#endif
#endif /* STM32H7S78_DISCOVERY_CONF_H */
Drivers/STM32H7RSxx_BSP/STM32H7S78-DK/stm32h7s78_discovery_errno.h
+70
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/**
******************************************************************************
* @file stm32h7s78_discovery_errno.h
* @author MCD Application Team
* @brief Error code definitions.
*
******************************************************************************
* @attention
*
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32H7S78_DISCOVERY_ERRNO_H
#define STM32H7S78_DISCOVERY_ERRNO_H
#ifdef __cplusplus
extern "C" {
#endif
/* Common Error codes */
#define BSP_ERROR_NONE 0
#define BSP_ERROR_NO_INIT -1
#define BSP_ERROR_WRONG_PARAM -2
#define BSP_ERROR_BUSY -3
#define BSP_ERROR_PERIPH_FAILURE -4
#define BSP_ERROR_COMPONENT_FAILURE -5
#define BSP_ERROR_UNKNOWN_FAILURE -6
#define BSP_ERROR_UNKNOWN_COMPONENT -7
#define BSP_ERROR_BUS_FAILURE -8
#define BSP_ERROR_CLOCK_FAILURE -9
#define BSP_ERROR_MSP_FAILURE -10
#define BSP_ERROR_FEATURE_NOT_SUPPORTED -11
/* BSP XSPI error codes */
#define BSP_ERROR_XSPI_SUSPENDED -20
#define BSP_ERROR_XSPI_ASSIGN_FAILURE -24
#define BSP_ERROR_XSPI_SETUP_FAILURE -25
#define BSP_ERROR_XSPI_MMP_LOCK_FAILURE -26
#define BSP_ERROR_XSPI_MMP_UNLOCK_FAILURE -27
/* BSP TS error code */
#define BSP_ERROR_TS_TOUCH_NOT_DETECTED -30
/* BSP SD error code */
#define BSP_ERROR_SD_NOT_DETECTED -40
/* BSP BUS error codes */
#define BSP_ERROR_BUS_TRANSACTION_FAILURE -100
#define BSP_ERROR_BUS_ARBITRATION_LOSS -101
#define BSP_ERROR_BUS_ACKNOWLEDGE_FAILURE -102
#define BSP_ERROR_BUS_PROTOCOL_FAILURE -103
#define BSP_ERROR_BUS_MODE_FAULT -104
#define BSP_ERROR_BUS_FRAME_ERROR -105
#define BSP_ERROR_BUS_CRC_ERROR -106
#define BSP_ERROR_BUS_DMA_FAILURE -107
#ifdef __cplusplus
}
#endif
#endif /* STM32H7S78_DISCOVERY_ERRNO_H */
Drivers/STM32H7RSxx_BSP/STM32H7S78-DK/stm32h7s78_discovery_lcd.c
+1613
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Drivers/STM32H7RSxx_BSP/STM32H7S78-DK/stm32h7s78_discovery_lcd.h
+299
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/**
******************************************************************************
* @file stm32h7s78_discovery_lcd.h
* @author MCD Application Team
* @brief This file contains the common defines and functions prototypes for
* the stm32h7s78_discovery_lcd.c driver.
******************************************************************************
* @attention
*
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32H7S78_DISCOVERY_LCD_H
#define STM32H7S78_DISCOVERY_LCD_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32h7s78_discovery_conf.h"
#include "stm32h7s78_discovery_errno.h"
#ifndef USE_LCD_CTRL_RK050HR18
#define USE_LCD_CTRL_RK050HR18 1U
#endif
#if (USE_LCD_CTRL_RK050HR18 == 1)
/* Include RK050HR18 LCD Driver IC driver code */
#include "../Components/rk050hr18/rk050hr18.h"
#endif
#include "../Components/Common/lcd.h"
/** @addtogroup BSP
* @{
*/
/** @addtogroup STM32H7S78_DK
* @{
*/
/** @addtogroup STM32H7S78_DK_LCD
* @{
*/
/** @defgroup STM32H7S78_DK_LCD_Exported_Constants STM32H7S78_DK LCD Exported Constants
* @{
*/
#define LCD_INSTANCES_NBR 1U
#define LCD_ORIENTATION_LANDSCAPE 0x01U /* Landscape orientation choice of LCD screen */
#define LCD_DEFAULT_WIDTH 800
#define LCD_DEFAULT_HEIGHT 480
#define BSP_LCD_RELOAD_NONE 0U /* No reload executed */
#define BSP_LCD_RELOAD_IMMEDIATE LTDC_RELOAD_IMMEDIATE /* Immediate Reload */
#define BSP_LCD_RELOAD_VERTICAL_BLANKING LTDC_RELOAD_VERTICAL_BLANKING /* Vertical Blanking Reload */
/**
* @brief LCD special pins
*/
/* LCD display enable pin */
#define LCD_DISP_EN_PIN GPIO_PIN_15
#define LCD_DISP_EN_GPIO_PORT GPIOE
#define LCD_DISP_EN_GPIO_CLK_ENABLE() __HAL_RCC_GPIOE_CLK_ENABLE()
#define LCD_DISP_EN_GPIO_CLK_DISABLE() __HAL_RCC_GPIOE_CLK_DISABLE()
/* LCD BackLight control pin */
#define LCD_BL_CTRL_PIN GPIO_PIN_15
#define LCD_BL_CTRL_GPIO_PORT GPIOG
#define LCD_BL_CTRL_GPIO_CLK_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE()
#define LCD_BL_CTRL_GPIO_CLK_DISABLE() __HAL_RCC_GPIOG_CLK_DISABLE()
/* LCD Brightness default value */
#define LCD_BRIGHTNESS_DEFAULT_VALUE 50U
/*LCD LPTimer brightness control parameters */
#define LCD_LPTIMx LPTIM1
#define LCD_LPTIMx_CLK_ENABLE() __HAL_RCC_LPTIM1_CLK_ENABLE()
#define LCD_LPTIMx_CLK_DISABLE() __HAL_RCC_LPTIM1_CLK_DISABLE()
#define LCD_LPTIMx_CHANNEL TIM_CHANNEL_2
#define LCD_LPTIMx_CHANNEL_AF GPIO_AF1_LPTIM1
#define LCD_LPTIMX_PERIOD_VALUE ((uint32_t)10000) /* Period Value */
#define LCD_LPTIMX_PULSE_VALUE (((uint32_t)(LCD_LPTIMX_PERIOD_VALUE +1U)*LCD_BRIGHTNESS_DEFAULT_VALUE/100U)-1U)
#define LCD_LPTIMX_PRESCALER_VALUE LPTIM_PRESCALER_DIV1 /* Prescaler divider Value */
#define LCD_LPTIMX_CLOCK_SOURCE LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC /* internal clock source */
/* RGB565 colors definitions */
#define LCD_COLOR_RGB565_BLUE 0x001FU
#define LCD_COLOR_RGB565_GREEN 0x07E0U
#define LCD_COLOR_RGB565_RED 0xF800U
#define LCD_COLOR_RGB565_CYAN 0x07FFU
#define LCD_COLOR_RGB565_MAGENTA 0xF81FU
#define LCD_COLOR_RGB565_YELLOW 0xFFE0U
#define LCD_COLOR_RGB565_LIGHTBLUE 0x841FU
#define LCD_COLOR_RGB565_LIGHTGREEN 0x87F0U
#define LCD_COLOR_RGB565_LIGHTRED 0xFC10U
#define LCD_COLOR_RGB565_LIGHTCYAN 0x87FFU
#define LCD_COLOR_RGB565_LIGHTMAGENTA 0xFC1FU
#define LCD_COLOR_RGB565_LIGHTYELLOW 0xFFF0U
#define LCD_COLOR_RGB565_DARKBLUE 0x0010U
#define LCD_COLOR_RGB565_DARKGREEN 0x0400U
#define LCD_COLOR_RGB565_DARKRED 0x8000U
#define LCD_COLOR_RGB565_DARKCYAN 0x0410U
#define LCD_COLOR_RGB565_DARKMAGENTA 0x8010U
#define LCD_COLOR_RGB565_DARKYELLOW 0x8400U
#define LCD_COLOR_RGB565_WHITE 0xFFFFU
#define LCD_COLOR_RGB565_LIGHTGRAY 0xD69AU
#define LCD_COLOR_RGB565_GRAY 0x8410U
#define LCD_COLOR_RGB565_DARKGRAY 0x4208U
#define LCD_COLOR_RGB565_BLACK 0x0000U
#define LCD_COLOR_RGB565_BROWN 0xA145U
#define LCD_COLOR_RGB565_ORANGE 0xFD20U
/* Definition of Official ST COLOR */
#define LCD_COLOR_RGB565_ST_BLUE_DARK 0x0001U
#define LCD_COLOR_RGB565_ST_BLUE 0x01EBU
#define LCD_COLOR_RGB565_ST_BLUE_LIGHT 0x06A7U
#define LCD_COLOR_RGB565_ST_GREEN_LIGHT 0x05ECU
#define LCD_COLOR_RGB565_ST_GREEN_DARK 0x001CU
#define LCD_COLOR_RGB565_ST_YELLOW 0x07F0U
#define LCD_COLOR_RGB565_ST_BROWN 0x02C8U
#define LCD_COLOR_RGB565_ST_PINK 0x0681U
#define LCD_COLOR_RGB565_ST_PURPLE 0x02CDU
#define LCD_COLOR_RGB565_ST_GRAY_DARK 0x0251U
#define LCD_COLOR_RGB565_ST_GRAY 0x04BAU
#define LCD_COLOR_RGB565_ST_GRAY_LIGHT 0x05E7U
/* ARGB8888 colors definitions */
#define LCD_COLOR_ARGB8888_BLUE 0xFF0000FFUL
#define LCD_COLOR_ARGB8888_GREEN 0xFF00FF00UL
#define LCD_COLOR_ARGB8888_RED 0xFFFF0000UL
#define LCD_COLOR_ARGB8888_CYAN 0xFF00FFFFUL
#define LCD_COLOR_ARGB8888_MAGENTA 0xFFFF00FFUL
#define LCD_COLOR_ARGB8888_YELLOW 0xFFFFFF00UL
#define LCD_COLOR_ARGB8888_LIGHTBLUE 0xFF8080FFUL
#define LCD_COLOR_ARGB8888_LIGHTGREEN 0xFF80FF80UL
#define LCD_COLOR_ARGB8888_LIGHTRED 0xFFFF8080UL
#define LCD_COLOR_ARGB8888_LIGHTCYAN 0xFF80FFFFUL
#define LCD_COLOR_ARGB8888_LIGHTMAGENTA 0xFFFF80FFUL
#define LCD_COLOR_ARGB8888_LIGHTYELLOW 0xFFFFFF80UL
#define LCD_COLOR_ARGB8888_DARKBLUE 0xFF000080UL
#define LCD_COLOR_ARGB8888_DARKGREEN 0xFF008000UL
#define LCD_COLOR_ARGB8888_DARKRED 0xFF800000UL
#define LCD_COLOR_ARGB8888_DARKCYAN 0xFF008080UL
#define LCD_COLOR_ARGB8888_DARKMAGENTA 0xFF800080UL
#define LCD_COLOR_ARGB8888_DARKYELLOW 0xFF808000UL
#define LCD_COLOR_ARGB8888_WHITE 0xFFFFFFFFUL
#define LCD_COLOR_ARGB8888_LIGHTGRAY 0xFFD3D3D3UL
#define LCD_COLOR_ARGB8888_GRAY 0xFF808080UL
#define LCD_COLOR_ARGB8888_DARKGRAY 0xFF404040UL
#define LCD_COLOR_ARGB8888_BLACK 0xFF000000UL
#define LCD_COLOR_ARGB8888_BROWN 0xFFA52A2AUL
#define LCD_COLOR_ARGB8888_ORANGE 0xFFFFA500UL
/* Definition of Official ST Colors */
#define LCD_COLOR_ARGB8888_ST_BLUE_DARK 0xFF002052UL
#define LCD_COLOR_ARGB8888_ST_BLUE 0xFF39A9DCUL
#define LCD_COLOR_ARGB8888_ST_BLUE_LIGHT 0xFFD1E4F3UL
#define LCD_COLOR_ARGB8888_ST_GREEN_LIGHT 0xFFBBCC01UL
#define LCD_COLOR_ARGB8888_ST_GREEN_DARK 0xFF003D14UL
#define LCD_COLOR_ARGB8888_ST_YELLOW 0xFFFFD300UL
#define LCD_COLOR_ARGB8888_ST_BROWN 0xFF5C0915UL
#define LCD_COLOR_ARGB8888_ST_PINK 0xFFD4007AUL
#define LCD_COLOR_ARGB8888_ST_PURPLE 0xFF590D58UL
#define LCD_COLOR_ARGB8888_ST_GRAY_DARK 0xFF4F5251UL
#define LCD_COLOR_ARGB8888_ST_GRAY 0xFF90989EUL
#define LCD_COLOR_ARGB8888_ST_GRAY_LIGHT 0xFFB9C4CAUL
/**
* @}
*/
/** @defgroup STM32H7S78_DK_LCD_Exported_Types STM32H7S78_DK LCD Exported Types
* @{
*/
typedef struct
{
uint32_t XSize;
uint32_t YSize;
uint32_t ActiveLayer;
uint32_t PixelFormat;
uint32_t BppFactor;
uint32_t IsMspCallbacksValid;
uint32_t ReloadEnable;
uint32_t Brightness;
} BSP_LCD_Ctx_t;
typedef struct
{
uint32_t X0;
uint32_t X1;
uint32_t Y0;
uint32_t Y1;
uint32_t PixelFormat;
uint32_t Address;
} MX_LTDC_LayerConfig_t;
#define BSP_LCD_LayerConfig_t MX_LTDC_LayerConfig_t
#if (USE_HAL_LTDC_REGISTER_CALLBACKS == 1)
typedef struct
{
pLTDC_CallbackTypeDef pMspLtdcInitCb;
pLTDC_CallbackTypeDef pMspLtdcDeInitCb;
} BSP_LCD_Cb_t;
#endif /*(USE_HAL_LTDC_REGISTER_CALLBACKS == 1) */
/**
* @}
*/
/** @addtogroup STM32H7S78_DK_LCD_Exported_Variables
* @{
*/
extern DMA2D_HandleTypeDef hlcd_dma2d;
extern LTDC_HandleTypeDef hlcd_ltdc;
extern BSP_LCD_Ctx_t Lcd_Ctx[LCD_INSTANCES_NBR];
extern const LCD_UTILS_Drv_t LCD_Driver;
/**
* @}
*/
/** @addtogroup STM32H7S78_DK_LCD_Exported_Functions
* @{
*/
/* Initialization APIs */
int32_t BSP_LCD_Init(uint32_t Instance, uint32_t Orientation);
int32_t BSP_LCD_InitEx(uint32_t Instance, uint32_t Orientation, uint32_t PixelFormat, uint32_t Width, uint32_t Height);
int32_t BSP_LCD_DeInit(uint32_t Instance);
/* Register Callbacks APIs */
#if (USE_HAL_LTDC_REGISTER_CALLBACKS == 1)
int32_t BSP_LCD_RegisterDefaultMspCallbacks(uint32_t Instance);
int32_t BSP_LCD_RegisterMspCallbacks(uint32_t Instance, BSP_LCD_Cb_t *CallBacks);
#endif /*(USE_HAL_LTDC_REGISTER_CALLBACKS == 1) */
/* LCD specific APIs: Layer control & LCD HW reset */
int32_t BSP_LCD_Reload(uint32_t Instance, uint32_t ReloadType);
int32_t BSP_LCD_ConfigLayer(uint32_t Instance, uint32_t LayerIndex, BSP_LCD_LayerConfig_t *Config);
int32_t BSP_LCD_SetLayerVisible(uint32_t Instance, uint32_t LayerIndex, FunctionalState State);
int32_t BSP_LCD_SetTransparency(uint32_t Instance, uint32_t LayerIndex, uint8_t Transparency);
int32_t BSP_LCD_SetLayerAddress(uint32_t Instance, uint32_t LayerIndex, uint32_t Address);
int32_t BSP_LCD_SetLayerWindow(uint32_t Instance, uint16_t LayerIndex, uint16_t Xpos, uint16_t Ypos, uint16_t Width, uint16_t Height);
int32_t BSP_LCD_SetColorKeying(uint32_t Instance, uint32_t LayerIndex, uint32_t Color);
int32_t BSP_LCD_ResetColorKeying(uint32_t Instance, uint32_t LayerIndex);
/* LCD generic APIs: Display control */
int32_t BSP_LCD_DisplayOn(uint32_t Instance);
int32_t BSP_LCD_DisplayOff(uint32_t Instance);
int32_t BSP_LCD_SetBrightness(uint32_t Instance, uint32_t Brightness);
int32_t BSP_LCD_GetBrightness(uint32_t Instance, uint32_t *Brightness);
int32_t BSP_LCD_GetXSize(uint32_t Instance, uint32_t *XSize);
int32_t BSP_LCD_GetYSize(uint32_t Instance, uint32_t *YSize);
/* LCD generic APIs: Draw operations. This list of APIs is required for
lcd gfx utilities */
int32_t BSP_LCD_SetActiveLayer(uint32_t Instance, uint32_t LayerIndex);
int32_t BSP_LCD_GetPixelFormat(uint32_t Instance, uint32_t *PixelFormat);
int32_t BSP_LCD_DrawBitmap(uint32_t Instance, uint32_t Xpos, uint32_t Ypos, uint8_t *pBmp);
int32_t BSP_LCD_DrawHLine(uint32_t Instance, uint32_t Xpos, uint32_t Ypos, uint32_t Length, uint32_t Color);
int32_t BSP_LCD_DrawVLine(uint32_t Instance, uint32_t Xpos, uint32_t Ypos, uint32_t Length, uint32_t Color);
int32_t BSP_LCD_FillRGBRect(uint32_t Instance, uint32_t Xpos, uint32_t Ypos, uint8_t *pData, uint32_t Width, uint32_t Height);
int32_t BSP_LCD_FillRect(uint32_t Instance, uint32_t Xpos, uint32_t Ypos, uint32_t Width, uint32_t Height, uint32_t Color);
int32_t BSP_LCD_ReadPixel(uint32_t Instance, uint32_t Xpos, uint32_t Ypos, uint32_t *Color);
int32_t BSP_LCD_WritePixel(uint32_t Instance, uint32_t Xpos, uint32_t Ypos, uint32_t Color);
/* LCD MX APIs */
HAL_StatusTypeDef MX_LTDC_ConfigLayer(LTDC_HandleTypeDef *hltdc, uint32_t LayerIndex, MX_LTDC_LayerConfig_t *Config);
HAL_StatusTypeDef MX_LTDC_ClockConfig(LTDC_HandleTypeDef *hltdc);
HAL_StatusTypeDef MX_LTDC_Init(LTDC_HandleTypeDef *hltdc, uint32_t Width, uint32_t Height);
/**
* @}
*/
/* Private constants --------------------------------------------------------*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* STM32H7S78_DISCOVERY_LCD_H */
Drivers/STM32H7RSxx_BSP/STM32H7S78-DK/stm32h7s78_discovery_sd.c
+925
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/**
******************************************************************************
* @file stm32h7s78_discovery_sd.c
* @author MCD Application Team
* @brief This file includes the uSD card driver mounted on STM32H7S78_DK
* boards.
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
@verbatim
==============================================================================
##### How to use this driver #####
==============================================================================
- This driver is used to drive the micro SD external card mounted on the
STM32H7S78_DK board.
- This driver does not need a specific component driver for the micro SD device
to be included with.
Driver description:
------------------
+ Initialization steps:
o Initialize the micro SD card using the BSP_SD_Init() function. This
function includes the MSP layer hardware resources initialization and the
SDIO interface configuration to interface with the external micro SD. It
also includes the micro SD initialization sequence for instance 0.
o To check the SD card presence you can use the function BSP_SD_IsDetected() which
returns the detection status for instance 0.
o If SD presence detection interrupt mode is desired, you must configure the
SD detection interrupt mode by calling the function BSP_SD_DetectITConfig().
The interrupt is generated as an external interrupt whenever the micro SD card is
plugged/unplugged in/from the discovery board.
The SD detection interrupt is handled by calling the function BSP_SD_DetectIT()
which is called in the IRQ handler file, the user callback is implemented in
the function BSP_SD_DetectCallback().
o The function BSP_SD_GetCardInfo()are used to get the micro SD card information
which is stored in the structure "HAL_SD_CardInfoTypedef".
+ Micro SD card operations
o The micro SD card can be accessed with read/write block(s) operations once
it is ready for access. The access can be performed whether
using the polling mode by calling the functions BSP_SD_ReadBlocks()/BSP_SD_WriteBlocks(),
using the interrupt mode by calling the functions BSP_SD_ReadBlocks_IT()/BSP_SD_WriteBlocks_IT(),
or by DMA transfer using the functions BSP_SD_ReadBlocks_DMA()/BSP_SD_WriteBlocks_DMA().
The access can be performed to instance 0.
o The DMA transfer complete is used with interrupt mode. Once the SD transfer
is complete, the SD interrupt is handled using the function BSP_SD_IRQHandler()
when instance 0 is used.
The DMA Tx/Rx transfer complete are handled using the functions
SD_SDMMC1_DMA_Tx_IRQHandler(), SD_SDMMC1_DMA_Rx_IRQHandler(). The corresponding
user callbacks are implemented by the user at application level.
o The SD erase block(s) is performed using the functions BSP_SD_Erase() with specifying
the number of blocks to erase.
o The SD runtime status is returned when calling the function BSP_SD_GetCardState().
@endverbatim
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32h7s78_discovery_sd.h"
/** @addtogroup BSP
* @{
*/
/** @addtogroup STM32H7S78_DK
* @{
*/
/** @defgroup STM32H7S78_DK_SD SD
* @{
*/
/** @defgroup STM32H7S78_DK_SD_Private_TypesDefinitions SD Private TypesDefinitions
* @{
*/
#if (USE_HAL_SD_REGISTER_CALLBACKS > 0)
/* Is Msp Callbacks registered */
static uint32_t IsMspCallbacksValid[SD_INSTANCES_NBR] = {0};
#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
typedef void (*BSP_EXTI_SD_LineCallback)(void);
/**
* @}
*/
/** @defgroup STM32H7S78_DK_SD_Exported_Variables SD Exported Variables
* @{
*/
SD_HandleTypeDef hsd_sdmmc[SD_INSTANCES_NBR];
EXTI_HandleTypeDef hsd_exti[SD_INSTANCES_NBR];
/**
* @}
*/
/** @defgroup STM32H7S78_DK_SD_Private_Variables SD Private Variables
* @{
*/
static uint32_t PinDetect[SD_INSTANCES_NBR] = {SD_DETECT_PIN};
static GPIO_TypeDef *SD_GPIO_PORT[SD_INSTANCES_NBR] = {SD_DETECT_GPIO_PORT};
/**
* @}
*/
/** @defgroup STM32H7S78_DK_SD_Private_Functions_Prototypes SD Private Functions Prototypes
* @{
*/
static void SD_MspInit(SD_HandleTypeDef *hsd);
static void SD_MspDeInit(SD_HandleTypeDef *hsd);
#if (USE_HAL_SD_REGISTER_CALLBACKS > 0)
static void SD_AbortCallback(SD_HandleTypeDef *hsd);
static void SD_TxCpltCallback(SD_HandleTypeDef *hsd);
static void SD_RxCpltCallback(SD_HandleTypeDef *hsd);
#endif /* (USE_HAL_SD_REGISTER_CALLBACKS > 0) */
static void SD_EXTI_Callback(void);
/**
* @}
*/
/** @defgroup STM32H7S78_DK_SD_Exported_Functions SD Exported Functions
* @{
*/
/**
* @brief Initializes the SD card device.
* @param Instance SD Instance
* @retval BSP status
*/
int32_t BSP_SD_Init(uint32_t Instance)
{
int32_t ret = BSP_ERROR_NONE;
GPIO_InitTypeDef gpio_init_structure = {0};
if (Instance >= SD_INSTANCES_NBR)
{
ret = BSP_ERROR_WRONG_PARAM;
}
else
{
/* GPIO Detect pin configuration */
SD_DETECT_GPIO_CLK_ENABLE();
/* Configure Interrupt mode for SD detection pin */
gpio_init_structure.Pin = PinDetect[Instance];
gpio_init_structure.Pull = GPIO_NOPULL;
gpio_init_structure.Speed = GPIO_SPEED_FREQ_HIGH;
gpio_init_structure.Mode = GPIO_MODE_INPUT;
HAL_GPIO_Init(SD_GPIO_PORT[Instance], &gpio_init_structure);
/* Check if SD card is present */
if ((uint32_t)BSP_SD_IsDetected(Instance) != SD_PRESENT)
{
ret = BSP_ERROR_SD_NOT_DETECTED;
}
else
{
#if (USE_HAL_SD_REGISTER_CALLBACKS == 0)
/* Msp SD initialization */
SD_MspInit(&hsd_sdmmc[Instance]);
#else
/* Register the SD MSP Callbacks */
if (IsMspCallbacksValid[Instance] == 0UL)
{
if (BSP_SD_RegisterDefaultMspCallbacks(Instance) != BSP_ERROR_NONE)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
}
if (ret == BSP_ERROR_NONE)
{
#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
/* HAL SD initialization and Enable wide operation */
if (MX_SDMMC1_SD_Init(&hsd_sdmmc[Instance]) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else if (HAL_SD_ConfigWideBusOperation(&hsd_sdmmc[Instance], SDMMC_BUS_WIDE_4B) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else
{
/* Try to switch to High Speed mode if the card supports this mode */
(void)HAL_SD_ConfigSpeedBusOperation(&hsd_sdmmc[Instance], SDMMC_SPEED_MODE_HIGH);
#if (USE_HAL_SD_REGISTER_CALLBACKS > 0)
/* Register SD TC, HT and Abort callbacks */
if (HAL_SD_RegisterCallback(&hsd_sdmmc[Instance], HAL_SD_TX_CPLT_CB_ID, SD_TxCpltCallback) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else if (HAL_SD_RegisterCallback(&hsd_sdmmc[Instance], HAL_SD_RX_CPLT_CB_ID, SD_RxCpltCallback) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else
{
if (HAL_SD_RegisterCallback(&hsd_sdmmc[Instance], HAL_SD_ABORT_CB_ID, SD_AbortCallback) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
}
#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
}
#if (USE_HAL_SD_REGISTER_CALLBACKS > 0)
}
#endif /* USE_HAL_SD_REGISTER_CALLBACKS */
}
}
return ret;
}
/**
* @brief DeInitializes the SD card device.
* @param Instance SD Instance
* @retval SD status
*/
int32_t BSP_SD_DeInit(uint32_t Instance)
{
int32_t ret = BSP_ERROR_NONE;
GPIO_InitTypeDef gpio_init_structure;
if (Instance >= SD_INSTANCES_NBR)
{
ret = BSP_ERROR_WRONG_PARAM;
}
else
{
if (HAL_EXTI_ClearConfigLine(&hsd_exti[Instance]) != HAL_OK)
{
return BSP_ERROR_PERIPH_FAILURE;
}
/* Configure Detect pins in input floating mode */
gpio_init_structure.Pin = PinDetect[Instance];
HAL_GPIO_DeInit(SD_GPIO_PORT[Instance], gpio_init_structure.Pin);
/* HAL SD de-initialization */
if (HAL_SD_DeInit(&hsd_sdmmc[Instance]) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else
{
/* Msp SD de-initialization */
#if (USE_HAL_SD_REGISTER_CALLBACKS == 0)
SD_MspDeInit(&hsd_sdmmc[Instance]);
#endif /* (USE_HAL_SD_REGISTER_CALLBACKS == 0) */
}
}
return ret;
}
/**
* @brief Initializes the SDMMC1 peripheral.
* @param hsd SD handle
* @retval HAL status
*/
__weak HAL_StatusTypeDef MX_SDMMC1_SD_Init(SD_HandleTypeDef *hsd)
{
HAL_StatusTypeDef ret = HAL_OK;
/* uSD device interface configuration */
hsd->Instance = SDMMC1;
hsd->Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING;
hsd->Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE;
hsd->Init.BusWide = SDMMC_BUS_WIDE_1B;
hsd->Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_ENABLE;
hsd->Init.ClockDiv = SDMMC_NSpeed_CLK_DIV;
/* HAL SD initialization */
if (HAL_SD_Init(hsd) != HAL_OK)
{
ret = HAL_ERROR;
}
return ret;
}
#if (USE_HAL_SD_REGISTER_CALLBACKS > 0)
/**
* @brief Default BSP SD Msp Callbacks
* @param Instance SD Instance
* @retval BSP status
*/
int32_t BSP_SD_RegisterDefaultMspCallbacks(uint32_t Instance)
{
int32_t ret = BSP_ERROR_NONE;
if (Instance >= SD_INSTANCES_NBR)
{
ret = BSP_ERROR_WRONG_PARAM;
}
else
{
/* Register MspInit/MspDeInit Callbacks */
if (HAL_SD_RegisterCallback(&hsd_sdmmc[Instance], HAL_SD_MSP_INIT_CB_ID, SD_MspInit) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else if (HAL_SD_RegisterCallback(&hsd_sdmmc[Instance], HAL_SD_MSP_DEINIT_CB_ID, SD_MspDeInit) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else
{
IsMspCallbacksValid[Instance] = 1U;
}
}
/* Return BSP status */
return ret;
}
/**
* @brief BSP SD Msp Callback registering
* @param Instance SD Instance
* @param CallBacks pointer to MspInit/MspDeInit callbacks functions
* @retval BSP status
*/
int32_t BSP_SD_RegisterMspCallbacks(uint32_t Instance, BSP_SD_Cb_t *CallBacks)
{
int32_t ret = BSP_ERROR_NONE;
if (Instance >= SD_INSTANCES_NBR)
{
ret = BSP_ERROR_WRONG_PARAM;
}
else
{
/* Register MspInit/MspDeInit Callbacks */
if (HAL_SD_RegisterCallback(&hsd_sdmmc[Instance], HAL_SD_MSP_INIT_CB_ID, CallBacks->pMspInitCb) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else if (HAL_SD_RegisterCallback(&hsd_sdmmc[Instance], HAL_SD_MSP_DEINIT_CB_ID, CallBacks->pMspDeInitCb) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else
{
IsMspCallbacksValid[Instance] = 1U;
}
}
/* Return BSP status */
return ret;
}
#endif /* (USE_HAL_SD_REGISTER_CALLBACKS > 0) */
/**
* @brief Configures Interrupt mode for SD detection pin.
* @param Instance SD Instance
* @retval Returns 0
*/
int32_t BSP_SD_DetectITConfig(uint32_t Instance)
{
int32_t ret;
GPIO_InitTypeDef gpio_init_structure = {0};
static BSP_EXTI_SD_LineCallback SdCallback[SD_INSTANCES_NBR] = {SD_EXTI_Callback};
static IRQn_Type SD_EXTI_IRQn[SD_INSTANCES_NBR] = {SD_DETECT_EXTI_IRQn};
if (Instance >= SD_INSTANCES_NBR)
{
ret = BSP_ERROR_WRONG_PARAM;
}
else
{
SD_DETECT_GPIO_CLK_ENABLE();
/* Configure Interrupt mode for SD detection pin */
gpio_init_structure.Pin = PinDetect[Instance];
gpio_init_structure.Pull = GPIO_NOPULL;
gpio_init_structure.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
gpio_init_structure.Mode = GPIO_MODE_IT_RISING_FALLING;
HAL_GPIO_Init(SD_GPIO_PORT[Instance], &gpio_init_structure);
if (HAL_EXTI_GetHandle(&hsd_exti[Instance], SD_DETECT_EXTI_LINE) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else if (HAL_EXTI_RegisterCallback(&hsd_exti[Instance], HAL_EXTI_COMMON_CB_ID, SdCallback[Instance]) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else
{
/* Enable and set Button EXTI Interrupt to the lowest priority */
HAL_NVIC_SetPriority(SD_EXTI_IRQn[Instance], BSP_SD_IT_PRIORITY, 0x00);
HAL_NVIC_EnableIRQ(SD_EXTI_IRQn[Instance]);
ret = BSP_ERROR_NONE;
}
}
/* Return BSP status */
return ret;
}
/**
* @brief BSP SD Callback.
* @param Instance SD Instance
* @param Status Pin status
* @retval None.
*/
__weak void BSP_SD_DetectCallback(uint32_t Instance, uint32_t Status)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(Instance);
UNUSED(Status);
/* This function should be implemented by the user application.
It is called into this driver when an event on JoyPin is triggered. */
}
/**
* @brief Detects if SD card is correctly plugged in the memory slot or not.
* @param Instance SD Instance
* @retval Returns if SD is detected or not
*/
int32_t BSP_SD_IsDetected(uint32_t Instance)
{
uint32_t ret;
if (Instance >= SD_INSTANCES_NBR)
{
return BSP_ERROR_WRONG_PARAM;
}
else
{
/* Check SD card detect pin */
if (HAL_GPIO_ReadPin(SD_GPIO_PORT[Instance], (uint16_t)PinDetect[Instance]) == GPIO_PIN_SET)
{
ret = SD_NOT_PRESENT;
}
else
{
ret = SD_PRESENT;
}
}
return (int32_t)ret;
}
/**
* @brief Reads block(s) from a specified address in an SD card, in polling mode.
* @param Instance SD Instance
* @param pData Pointer to the buffer that will contain the data to transmit
* @param BlockIdx Block index from where data is to be read
* @param BlocksNbr Number of SD blocks to read
* @retval BSP status
*/
int32_t BSP_SD_ReadBlocks(uint32_t Instance, uint32_t *pData, uint32_t BlockIdx, uint32_t BlocksNbr)
{
uint32_t timeout = SD_READ_TIMEOUT * BlocksNbr;
int32_t ret;
if (Instance >= SD_INSTANCES_NBR)
{
ret = BSP_ERROR_WRONG_PARAM;
}
else if (HAL_SD_ReadBlocks(&hsd_sdmmc[Instance], (uint8_t *)pData, BlockIdx, BlocksNbr, timeout) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else
{
ret = BSP_ERROR_NONE;
}
/* Return BSP status */
return ret;
}
/**
* @brief Writes block(s) to a specified address in an SD card, in polling mode.
* @param Instance SD Instance
* @param pData Pointer to the buffer that will contain the data to transmit
* @param BlockIdx Block index from where data is to be written
* @param BlocksNbr Number of SD blocks to write
* @retval BSP status
*/
int32_t BSP_SD_WriteBlocks(uint32_t Instance, uint32_t *pData, uint32_t BlockIdx, uint32_t BlocksNbr)
{
uint32_t timeout = SD_READ_TIMEOUT * BlocksNbr;
int32_t ret;
if (Instance >= SD_INSTANCES_NBR)
{
ret = BSP_ERROR_WRONG_PARAM;
}
else if (HAL_SD_WriteBlocks(&hsd_sdmmc[Instance], (uint8_t *)pData, BlockIdx, BlocksNbr, timeout) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else
{
ret = BSP_ERROR_NONE;
}
/* Return BSP status */
return ret;
}
/**
* @brief Reads block(s) from a specified address in an SD card, in DMA mode.
* @param Instance SD Instance
* @param pData Pointer to the buffer that will contain the data to transmit
* @param BlockIdx Block index from where data is to be read
* @param BlocksNbr Number of SD blocks to read
* @retval BSP status
*/
int32_t BSP_SD_ReadBlocks_DMA(uint32_t Instance, uint32_t *pData, uint32_t BlockIdx, uint32_t BlocksNbr)
{
int32_t ret;
if (Instance >= SD_INSTANCES_NBR)
{
ret = BSP_ERROR_WRONG_PARAM;
}
else if (HAL_SD_ReadBlocks_DMA(&hsd_sdmmc[Instance], (uint8_t *)pData, BlockIdx, BlocksNbr) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else
{
ret = BSP_ERROR_NONE;
}
/* Return BSP status */
return ret;
}
/**
* @brief Writes block(s) to a specified address in an SD card, in DMA mode.
* @param Instance SD Instance
* @param pData Pointer to the buffer that will contain the data to transmit
* @param BlockIdx Block index from where data is to be written
* @param BlocksNbr Number of SD blocks to write
* @retval BSP status
*/
int32_t BSP_SD_WriteBlocks_DMA(uint32_t Instance, uint32_t *pData, uint32_t BlockIdx, uint32_t BlocksNbr)
{
int32_t ret;
if (Instance >= SD_INSTANCES_NBR)
{
ret = BSP_ERROR_WRONG_PARAM;
}
else if (HAL_SD_WriteBlocks_DMA(&hsd_sdmmc[Instance], (uint8_t *)pData, BlockIdx, BlocksNbr) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else
{
ret = BSP_ERROR_NONE;
}
/* Return BSP status */
return ret;
}
/**
* @brief Reads block(s) from a specified address in an SD card, in DMA mode.
* @param Instance SD Instance
* @param pData Pointer to the buffer that will contain the data to transmit
* @param BlockIdx Block index from where data is to be read
* @param BlocksNbr Number of SD blocks to read
* @retval SD status
*/
int32_t BSP_SD_ReadBlocks_IT(uint32_t Instance, uint32_t *pData, uint32_t BlockIdx, uint32_t BlocksNbr)
{
int32_t ret;
if (Instance >= SD_INSTANCES_NBR)
{
ret = BSP_ERROR_WRONG_PARAM;
}
else if (HAL_SD_ReadBlocks_IT(&hsd_sdmmc[Instance], (uint8_t *)pData, BlockIdx, BlocksNbr) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else
{
ret = BSP_ERROR_NONE;
}
/* Return BSP status */
return ret;
}
/**
* @brief Writes block(s) to a specified address in an SD card, in DMA mode.
* @param Instance SD Instance
* @param pData Pointer to the buffer that will contain the data to transmit
* @param BlockIdx Block index from where data is to be written
* @param BlocksNbr Number of SD blocks to write
* @retval SD status
*/
int32_t BSP_SD_WriteBlocks_IT(uint32_t Instance, uint32_t *pData, uint32_t BlockIdx, uint32_t BlocksNbr)
{
int32_t ret;
if (Instance >= SD_INSTANCES_NBR)
{
ret = BSP_ERROR_WRONG_PARAM;
}
else if (HAL_SD_WriteBlocks_IT(&hsd_sdmmc[Instance], (uint8_t *)pData, BlockIdx, BlocksNbr) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else
{
ret = BSP_ERROR_NONE;
}
/* Return BSP status */
return ret;
}
/**
* @brief Erases the specified memory area of the given SD card.
* @param Instance SD Instance
* @param BlockIdx Block index from where data is to be
* @param BlocksNbr Number of SD blocks to erase
* @retval SD status
*/
int32_t BSP_SD_Erase(uint32_t Instance, uint32_t BlockIdx, uint32_t BlocksNbr)
{
int32_t ret;
if (Instance >= SD_INSTANCES_NBR)
{
ret = BSP_ERROR_WRONG_PARAM;
}
else if (HAL_SD_Erase(&hsd_sdmmc[Instance], BlockIdx, BlockIdx + BlocksNbr) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else
{
ret = BSP_ERROR_NONE;
}
/* Return BSP status */
return ret;
}
/**
* @brief Gets the current SD card data status.
* @param Instance SD Instance
* @retval Data transfer state.
* This value can be one of the following values:
* @arg SD_TRANSFER_OK: No data transfer is acting
* @arg SD_TRANSFER_BUSY: Data transfer is acting
*/
int32_t BSP_SD_GetCardState(uint32_t Instance)
{
return (int32_t)((HAL_SD_GetCardState(&hsd_sdmmc[Instance]) == HAL_SD_CARD_TRANSFER) ? SD_TRANSFER_OK
: SD_TRANSFER_BUSY);
}
/**
* @brief Get SD information about specific SD card.
* @param Instance SD Instance
* @param CardInfo Pointer to HAL_SD_CardInfoTypedef structure
* @retval BSP status
*/
int32_t BSP_SD_GetCardInfo(uint32_t Instance, BSP_SD_CardInfo *CardInfo)
{
int32_t ret;
if (Instance >= SD_INSTANCES_NBR)
{
ret = BSP_ERROR_WRONG_PARAM;
}
else
{
(void)HAL_SD_GetCardInfo(&hsd_sdmmc[Instance], CardInfo);
ret = BSP_ERROR_NONE;
}
/* Return BSP status */
return ret;
}
#if (USE_HAL_SD_REGISTER_CALLBACKS == 0) || !defined(USE_HAL_SD_REGISTER_CALLBACKS)
/**
* @brief SD Abort callbacks
* @param hsd SD handle
* @retval None
*/
void HAL_SD_AbortCallback(SD_HandleTypeDef *hsd)
{
BSP_SD_AbortCallback((hsd == &hsd_sdmmc[0]) ? 0UL : 1UL);
}
/**
* @brief Tx Transfer completed callbacks
* @param hsd SD handle
* @retval None
*/
void HAL_SD_TxCpltCallback(SD_HandleTypeDef *hsd)
{
BSP_SD_WriteCpltCallback((hsd == &hsd_sdmmc[0]) ? 0UL : 1UL);
}
/**
* @brief Rx Transfer completed callbacks
* @param hsd SD handle
* @retval None
*/
void HAL_SD_RxCpltCallback(SD_HandleTypeDef *hsd)
{
BSP_SD_ReadCpltCallback((hsd == &hsd_sdmmc[0]) ? 0UL : 1UL);
}
#endif /* (USE_HAL_SD_REGISTER_CALLBACKS == 0) */
/**
* @brief This function handles EXTI_LINE_10 for SD1 interrupt request.
* @param Instance SD Instance
* @retval None
*/
void BSP_SD_DETECT_IRQHandler(uint32_t Instance)
{
HAL_EXTI_IRQHandler(&hsd_exti[Instance]);
}
/**
* @brief This function handles SDMMC interrupt requests.
* @param Instance SD Instance
* @retval None
*/
void BSP_SD_IRQHandler(uint32_t Instance)
{
HAL_SD_IRQHandler(&hsd_sdmmc[Instance]);
}
/**
* @brief BSP SD Abort callbacks
* @param Instance SD Instance
* @retval None
*/
__weak void BSP_SD_AbortCallback(uint32_t Instance)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(Instance);
}
/**
* @brief BSP Tx Transfer completed callbacks
* @param Instance SD Instance
* @retval None
*/
__weak void BSP_SD_WriteCpltCallback(uint32_t Instance)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(Instance);
}
/**
* @brief BSP Rx Transfer completed callbacks
* @param Instance SD Instance
* @retval None
*/
__weak void BSP_SD_ReadCpltCallback(uint32_t Instance)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(Instance);
}
/**
* @}
*/
/** @defgroup STM32H7S78_DK_SD_Private_Functions SD Private Functions
* @{
*/
#if (USE_HAL_SD_REGISTER_CALLBACKS > 0)
/**
* @brief SD Abort callbacks
* @param hsd SD handle
* @retval None
*/
static void SD_AbortCallback(SD_HandleTypeDef *hsd)
{
BSP_SD_AbortCallback((hsd == &hsd_sdmmc[0]) ? 0UL : 1UL);
}
/**
* @brief Tx Transfer completed callbacks
* @param hsd SD handle
* @retval None
*/
static void SD_TxCpltCallback(SD_HandleTypeDef *hsd)
{
BSP_SD_WriteCpltCallback((hsd == &hsd_sdmmc[0]) ? 0UL : 1UL);
}
/**
* @brief Rx Transfer completed callbacks
* @param hsd SD handle
* @retval None
*/
static void SD_RxCpltCallback(SD_HandleTypeDef *hsd)
{
BSP_SD_ReadCpltCallback((hsd == &hsd_sdmmc[0]) ? 0UL : 1UL);
}
#endif /* USE_HAL_SD_REGISTER_CALLBACKS > 0 */
/**
* @brief SD EXTI line detection callbacks.
* @retval None
*/
static void SD_EXTI_Callback(void)
{
uint32_t sd_status;
if (HAL_GPIO_ReadPin(SD_GPIO_PORT[0], (uint16_t)PinDetect[0]) == GPIO_PIN_SET)
{
sd_status = SD_NOT_PRESENT;
}
else
{
sd_status = SD_PRESENT;
}
BSP_SD_DetectCallback(0, sd_status);
}
/**
* @brief Initializes the SD MSP.
* @param hsd SD handle
* @retval None
*/
static void SD_MspInit(SD_HandleTypeDef *hsd)
{
GPIO_InitTypeDef gpioinitstruct = {0};
if (hsd == &hsd_sdmmc[0])
{
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDMMC12;
PeriphClkInitStruct.Sdmmc12ClockSelection = RCC_SDMMC12CLKSOURCE_PLL2S;
(void)HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
/* Enable SDMMC1 clock */
__HAL_RCC_SDMMC1_CLK_ENABLE();
/* Enable GPIOs clock */
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
/* Common GPIO configuration */
gpioinitstruct.Mode = GPIO_MODE_AF_PP;
gpioinitstruct.Pull = GPIO_PULLUP;
gpioinitstruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
/* GPIOC configuration D2*/
gpioinitstruct.Alternate = GPIO_AF12_SDMMC1;
gpioinitstruct.Pin = GPIO_PIN_10;
HAL_GPIO_Init(GPIOC, &gpioinitstruct);
/* GPIOC configuration, D0, D1, D3, CK*/
gpioinitstruct.Alternate = GPIO_AF11_SDMMC1;
gpioinitstruct.Pin = GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_11 | GPIO_PIN_12;
HAL_GPIO_Init(GPIOC, &gpioinitstruct);
/* GPIOD configuration */
gpioinitstruct.Pin = GPIO_PIN_2;
HAL_GPIO_Init(GPIOD, &gpioinitstruct);
/* NVIC configuration for SDMMC1 interrupts */
HAL_NVIC_SetPriority(SDMMC1_IRQn, BSP_SD_IT_PRIORITY, 0);
HAL_NVIC_EnableIRQ(SDMMC1_IRQn);
}
}
/**
* @brief DeInitializes the SD MSP.
* @param hsd SD handle
* @retval None
*/
static void SD_MspDeInit(SD_HandleTypeDef *hsd)
{
GPIO_InitTypeDef gpio_init_structure;
if (hsd == &hsd_sdmmc[0])
{
/* Disable NVIC for SDIO interrupts */
HAL_NVIC_DisableIRQ(SDMMC1_IRQn);
/* GPIOC configuration */
gpio_init_structure.Pin = GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12;
HAL_GPIO_DeInit(GPIOC, gpio_init_structure.Pin);
/* GPIOD configuration */
gpio_init_structure.Pin = GPIO_PIN_2;
HAL_GPIO_DeInit(GPIOD, gpio_init_structure.Pin);
/* Disable SDMMC1 clock */
__HAL_RCC_SDMMC1_CLK_DISABLE();
}
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
Drivers/STM32H7RSxx_BSP/STM32H7S78-DK/stm32h7s78_discovery_sd.h
+162
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@@ -0,0 +1,162 @@
/**
******************************************************************************
* @file stm32h7s78_discovery_sd.h
* @author MCD Application Team
* @brief This file contains the common defines and functions prototypes for
* the stm32h7s78_discovery_sd.c driver.
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32H7S78_DK_SD_H
#define STM32H7S78_DK_SD_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32h7s78_discovery_conf.h"
#include "stm32h7s78_discovery_errno.h"
/** @addtogroup BSP
* @{
*/
/** @addtogroup STM32H7S78_DK
* @{
*/
/** @defgroup STM32H7S78_DK_SD SD
* @{
*/
/** @defgroup STM32H7S78_DK_SD_Exported_Types SD Exported Types
* @{
*/
/**
* @brief SD Card information structure
*/
#define BSP_SD_CardInfo HAL_SD_CardInfoTypeDef
#if (USE_HAL_SD_REGISTER_CALLBACKS > 0)
typedef struct
{
void (*pMspInitCb)(SD_HandleTypeDef *);
void (*pMspDeInitCb)(SD_HandleTypeDef *);
} BSP_SD_Cb_t;
#endif /* (USE_HAL_SD_REGISTER_CALLBACKS > 0) */
/**
* @}
*/
/** @defgroup STM32H7S78_DK_SD_Exported_Constants SD Exported Constants
* @{
*/
#define SD_INSTANCES_NBR 1UL
#ifndef SD_WRITE_TIMEOUT
#define SD_WRITE_TIMEOUT 100U
#endif /* SD_WRITE_TIMEOUT */
#ifndef SD_READ_TIMEOUT
#define SD_READ_TIMEOUT 100U
#endif /* SD_READ_TIMEOUT */
/**
* @brief SD transfer state definition
*/
#define SD_TRANSFER_OK 0U
#define SD_TRANSFER_BUSY 1U
/**
* @brief SD-detect signal
*/
#define SD_PRESENT 1U
#define SD_NOT_PRESENT 0U
#define SD_DETECT_PIN GPIO_PIN_14
#define SD_DETECT_GPIO_PORT GPIOM
#define SD_DETECT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOM_CLK_ENABLE()
#define SD_DETECT_GPIO_CLK_DISABLE() __HAL_RCC_GPIOM_CLK_DISABLE()
#define SD_DETECT_EXTI_IRQn EXTI14_IRQn
#define SD_DETECT_EXTI_LINE EXTI_LINE_14
/**
* @}
*/
/** @addtogroup STM32H7S78_DK_SD_Exported_Variables
* @{
*/
extern SD_HandleTypeDef hsd_sdmmc[];
extern EXTI_HandleTypeDef hsd_exti[];
/**
* @}
*/
/** @addtogroup STM32H7S78_DK_SD_Exported_Functions
* @{
*/
int32_t BSP_SD_Init(uint32_t Instance);
int32_t BSP_SD_DeInit(uint32_t Instance);
#if (USE_HAL_SD_REGISTER_CALLBACKS > 0)
int32_t BSP_SD_RegisterMspCallbacks(uint32_t Instance, BSP_SD_Cb_t *CallBacks);
int32_t BSP_SD_RegisterDefaultMspCallbacks(uint32_t Instance);
#endif /* (USE_HAL_SD_REGISTER_CALLBACKS > 0) */
int32_t BSP_SD_DetectITConfig(uint32_t Instance);
int32_t BSP_SD_ReadBlocks(uint32_t Instance, uint32_t *pData, uint32_t BlockIdx, uint32_t NbrOfBlocks);
int32_t BSP_SD_WriteBlocks(uint32_t Instance, uint32_t *pData, uint32_t BlockIdx, uint32_t NbrOfBlocks);
int32_t BSP_SD_ReadBlocks_DMA(uint32_t Instance, uint32_t *pData, uint32_t BlockIdx, uint32_t NbrOfBlocks);
int32_t BSP_SD_WriteBlocks_DMA(uint32_t Instance, uint32_t *pData, uint32_t BlockIdx, uint32_t NbrOfBlocks);
int32_t BSP_SD_ReadBlocks_IT(uint32_t Instance, uint32_t *pData, uint32_t BlockIdx, uint32_t NbrOfBlocks);
int32_t BSP_SD_WriteBlocks_IT(uint32_t Instance, uint32_t *pData, uint32_t BlockIdx, uint32_t NbrOfBlocks);
int32_t BSP_SD_Erase(uint32_t Instance, uint32_t BlockIdx, uint32_t NbrOfBlocks);
int32_t BSP_SD_GetCardState(uint32_t Instance);
int32_t BSP_SD_GetCardInfo(uint32_t Instance, BSP_SD_CardInfo *CardInfo);
int32_t BSP_SD_IsDetected(uint32_t Instance);
void BSP_SD_DETECT_IRQHandler(uint32_t Instance);
void BSP_SD_IRQHandler(uint32_t Instance);
/* These functions can be modified in case the current settings (e.g. DMA stream or IT)
need to be changed for specific application needs */
void BSP_SD_AbortCallback(uint32_t Instance);
void BSP_SD_WriteCpltCallback(uint32_t Instance);
void BSP_SD_ReadCpltCallback(uint32_t Instance);
void BSP_SD_DetectCallback(uint32_t Instance, uint32_t Status);
HAL_StatusTypeDef MX_SDMMC1_SD_Init(SD_HandleTypeDef *hsd);
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* STM32H7S78_DK_SD_H */
Drivers/STM32H7RSxx_BSP/STM32H7S78-DK/stm32h7s78_discovery_ts.c
+690
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@@ -0,0 +1,690 @@
/**
******************************************************************************
* @file stm32h7s78_discovery_ts.c
* @author MCD Application Team
* @brief This file provides a set of firmware functions to communicate
* with external devices available on STM32H7S78-DK board (MB1736) from
* STMicroelectronics
******************************************************************************
* @attention
*
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* File Info : -----------------------------------------------------------------
User NOTES
1. How To use this driver:
--------------------------
- This driver is used to drive the GT911 touch screen module
mounted over TFT-LCD on the STM32H7S78_DK board.
2. Driver description:
---------------------
+ Initialization steps:
o Initialize the TS module using the BSP_TS_Init() function. This
function includes the MSP layer hardware resources initialization and the
communication layer configuration to start the TS use. The LCD size properties
(x and y) are passed as parameters.
o If TS interrupt mode is desired, you must configure the TS interrupt mode
by calling the function BSP_TS_ITConfig(). The TS interrupt mode is generated
as an external interrupt whenever a touch is detected.
The interrupt mode internally uses the IO functionalities driver driven by
the IO expander, to configure the IT line.
+ Touch screen use
o The touch screen state is captured whenever the function BSP_TS_GetState() is
used. This function returns information about the last LCD touch occurred
in the TS_State_t structure.
o The IT is handled using the corresponding external interrupt IRQ handler,
the user IT callback treatment is implemented on the same external interrupt
callback.
------------------------------------------------------------------------------*/
/* Includes ------------------------------------------------------------------*/
#include "stm32h7s78_discovery_ts.h"
#include "stm32h7s78_discovery_bus.h"
#include "../Components/Common/ts.h"
/** @addtogroup BSP
* @{
*/
/** @addtogroup STM32H7S78_DK
* @{
*/
/** @defgroup STM32H7S78_DK_TS TS
* @{
*/
/** @defgroup STM32H7S78_DK_TS_Private_Types_Definitions Private Types Definitions
* @{
*/
/**
* @}
*/
/** @defgroup STM32H7S78_DK_TS_Private_Defines Private Types Defines
* @{
*/
/**
* @}
*/
/** @defgroup STM32H7S78_DK_TS_Private_Macros Private Macros
* @{
*/
#define TS_MIN(a,b) ((a > b) ? b : a)
/**
* @}
*/
/** @defgroup STM32H7S78_DK_TS_Private_Function_Prototypes Private Function Prototypes
* @{
*/
static int32_t GT911_Probe(uint32_t Instance);
static void TS_EXTI_Callback(void);
/**
* @}
*/
/** @defgroup STM32H7S78_DK_TS_Privates_Variables Privates Variables
* @{
*/
static TS_Drv_t *Ts_Drv = NULL;
/**
* @}
*/
/** @defgroup STM32H7S78_DK_TS_Exported_Variables Exported Variables
* @{
*/
EXTI_HandleTypeDef hts_exti[TS_INSTANCES_NBR] = {0};
void *Ts_CompObj[TS_INSTANCES_NBR] = {0};
TS_Ctx_t Ts_Ctx[TS_INSTANCES_NBR] = {0};
/**
* @}
*/
/** @defgroup STM32H7S78_DK_TS_Exported_Functions Exported Functions
* @{
*/
/**
* @brief Initializes and configures the touch screen functionalities and
* configures all necessary hardware resources (GPIOs, I2C, clocks..).
* @param Instance TS instance. Could be only 0.
* @param TS_Init TS Init structure
* @retval BSP status
*/
int32_t BSP_TS_Init(uint32_t Instance, TS_Init_t *TS_Init)
{
int32_t ret = BSP_ERROR_NONE;
if ((Instance >= TS_INSTANCES_NBR) || (TS_Init->Width == 0U) || ( TS_Init->Width > TS_MAX_WIDTH) || \
(TS_Init->Height == 0U) || ( TS_Init->Height > TS_MAX_HEIGHT) || \
(TS_Init->Accuracy > TS_MIN((TS_Init->Width), (TS_Init->Height))))
{
ret = BSP_ERROR_WRONG_PARAM;
}
else
{
if (GT911_Probe(Instance) != BSP_ERROR_NONE)
{
ret = BSP_ERROR_NO_INIT;
}
else
{
TS_Capabilities_t Capabilities = {0};
uint32_t i;
/* Store parameters on TS context */
Ts_Ctx[Instance].Width = TS_Init->Width;
Ts_Ctx[Instance].Height = TS_Init->Height;
Ts_Ctx[Instance].Orientation = TS_Init->Orientation;
Ts_Ctx[Instance].Accuracy = TS_Init->Accuracy;
/* Get capabilities to retrieve maximum values of X and Y */
if (Ts_Drv->GetCapabilities(Ts_CompObj[Instance], &Capabilities) < 0)
{
ret = BSP_ERROR_COMPONENT_FAILURE;
}
else
{
/* Store maximum X and Y on context */
Ts_Ctx[Instance].MaxX = Capabilities.MaxXl;
Ts_Ctx[Instance].MaxY = Capabilities.MaxYl;
/* Initialize previous position in order to always detect first touch */
for (i = 0; i < TS_TOUCH_NBR; i++)
{
Ts_Ctx[Instance].PreviousX[i] = TS_Init->Width + TS_Init->Accuracy + 1U;
Ts_Ctx[Instance].PreviousY[i] = TS_Init->Height + TS_Init->Accuracy + 1U;
}
}
}
}
return ret;
}
/**
* @brief De-Initializes the touch screen functionalities
* @param Instance TS instance. Could be only 0.
* @retval BSP status
*/
int32_t BSP_TS_DeInit(uint32_t Instance)
{
int32_t ret = BSP_ERROR_NONE;
if (Instance >= TS_INSTANCES_NBR)
{
ret = BSP_ERROR_WRONG_PARAM;
}
else
{
if (Ts_Drv->DeInit(Ts_CompObj[Instance]) < 0)
{
ret = BSP_ERROR_COMPONENT_FAILURE;
}
}
return ret;
}
/**
* @brief Get Touch Screen instance capabilities
* @param Instance Touch Screen instance
* @param Capabilities pointer to Touch Screen capabilities
* @retval BSP status
*/
int32_t BSP_TS_GetCapabilities(uint32_t Instance, TS_Capabilities_t *Capabilities)
{
int32_t ret = BSP_ERROR_NONE;
if ((Instance >= TS_INSTANCES_NBR) || (Capabilities == NULL))
{
ret = BSP_ERROR_WRONG_PARAM;
}
else
{
(void)Ts_Drv->GetCapabilities(Ts_CompObj[Instance], Capabilities);
}
return ret;
}
/**
* @brief Configures and enables the touch screen interrupts.
* @param Instance TS instance. Could be only 0.
* @retval BSP status
*/
int32_t BSP_TS_EnableIT(uint32_t Instance)
{
int32_t ret = BSP_ERROR_NONE;
GPIO_InitTypeDef gpio_init_structure = {0};
if (Instance >= TS_INSTANCES_NBR)
{
ret = BSP_ERROR_WRONG_PARAM;
}
else
{
/* Configure Interrupt mode for TS_INT pin falling edge : when a new touch is available */
/* TS_INT pin is active on low level on new touch available */
TS_INT_GPIO_CLK_ENABLE();
gpio_init_structure.Pin = TS_INT_PIN;
gpio_init_structure.Pull = GPIO_NOPULL;
gpio_init_structure.Speed = GPIO_SPEED_FREQ_HIGH;
gpio_init_structure.Mode = GPIO_MODE_IT_RISING;
HAL_GPIO_Init(TS_INT_GPIO_PORT, &gpio_init_structure);
if (Ts_Drv->EnableIT(Ts_CompObj[Instance]) < 0)
{
ret = BSP_ERROR_COMPONENT_FAILURE;
}
else
{
if (HAL_EXTI_GetHandle(&hts_exti[Instance], TS_EXTI_LINE) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else if (HAL_EXTI_RegisterCallback(&hts_exti[Instance], HAL_EXTI_COMMON_CB_ID, TS_EXTI_Callback) != HAL_OK)
{
ret = BSP_ERROR_PERIPH_FAILURE;
}
else
{
/* Enable and set the TS_INT EXTI Interrupt to an intermediate priority */
HAL_NVIC_SetPriority((IRQn_Type)(TS_INT_EXTI_IRQn), BSP_TS_IT_PRIORITY, 0x00);
HAL_NVIC_EnableIRQ((IRQn_Type)(TS_INT_EXTI_IRQn));
}
}
}
return ret;
}
/**
* @brief Disables the touch screen interrupts.
* @param Instance TS instance. Could be only 0.
* @retval BSP status
*/
int32_t BSP_TS_DisableIT(uint32_t Instance)
{
int32_t ret = BSP_ERROR_NONE;
GPIO_InitTypeDef gpio_init_structure;
if (Instance >= TS_INSTANCES_NBR)
{
ret = BSP_ERROR_WRONG_PARAM;
}
else
{
/* De-init TS_INT_PIN */
gpio_init_structure.Pin = TS_INT_PIN;
HAL_GPIO_DeInit(TS_INT_GPIO_PORT, gpio_init_structure.Pin);
/* Disable the TS in interrupt mode */
/* In that case the INT output of GT911 when new touch is available */
/* is active on low level and directed on EXTI */
if (Ts_Drv->DisableIT(Ts_CompObj[Instance]) < 0)
{
ret = BSP_ERROR_COMPONENT_FAILURE;
}
}
return ret;
}
/**
* @brief This function handles TS interrupt request.
* @param Instance TS instance
* @retval None
*/
void BSP_TS_IRQHandler(uint32_t Instance)
{
HAL_EXTI_IRQHandler(&hts_exti[Instance]);
}
/**
* @brief BSP TS Callback.
* @param Instance : TS instance
* @retval None.
*/
__weak void BSP_TS_Callback(uint32_t Instance)
{
/* Prevent unused argument(s) compilation warning */
UNUSED(Instance);
/* This function should be implemented by the user application.
It is called into this driver when an event on TS touch detection */
}
/**
* @brief Returns positions of a single touch screen.
* @param Instance TS instance. Could be only 0.
* @param TS_State Pointer to touch screen current state structure
* @retval BSP status
*/
int32_t BSP_TS_GetState(uint32_t Instance, TS_State_t *TS_State)
{
int32_t ret = BSP_ERROR_NONE;
uint32_t x_oriented, y_oriented;
uint32_t x_diff, y_diff;
if (Instance >= TS_INSTANCES_NBR)
{
ret = BSP_ERROR_WRONG_PARAM;
}
else
{
GT911_State_t state = {0};
/* Get each touch coordinates */
if (Ts_Drv->GetState(Ts_CompObj[Instance], &state) < 0)
{
ret = BSP_ERROR_COMPONENT_FAILURE;
}/* Check and update the number of touches active detected */
else if (state.TouchDetected != 0U)
{
x_oriented = state.TouchX;
y_oriented = state.TouchY;
if ((Ts_Ctx[Instance].Orientation & TS_SWAP_XY) == TS_SWAP_XY)
{
x_oriented = state.TouchY;
y_oriented = state.TouchX;
}
if ((Ts_Ctx[Instance].Orientation & TS_SWAP_X) == TS_SWAP_X)
{
x_oriented = Ts_Ctx[Instance].MaxX - state.TouchX - 1UL;
}
if ((Ts_Ctx[Instance].Orientation & TS_SWAP_Y) == TS_SWAP_Y)
{
y_oriented = Ts_Ctx[Instance].MaxY - state.TouchY;
}
/* Apply boundary */
TS_State->TouchX = (x_oriented * Ts_Ctx[Instance].Width) / Ts_Ctx[Instance].MaxX;
TS_State->TouchY = (y_oriented * Ts_Ctx[Instance].Height) / Ts_Ctx[Instance].MaxY;
/* Store Current TS state */
TS_State->TouchDetected = state.TouchDetected;
/* Check accuracy */
x_diff = (TS_State->TouchX > Ts_Ctx[Instance].PreviousX[0]) ?
(TS_State->TouchX - Ts_Ctx[Instance].PreviousX[0]) :
(Ts_Ctx[Instance].PreviousX[0] - TS_State->TouchX);
y_diff = (TS_State->TouchY > Ts_Ctx[Instance].PreviousY[0]) ?
(TS_State->TouchY - Ts_Ctx[Instance].PreviousY[0]) :
(Ts_Ctx[Instance].PreviousY[0] - TS_State->TouchY);
if ((x_diff > Ts_Ctx[Instance].Accuracy) || (y_diff > Ts_Ctx[Instance].Accuracy))
{
/* New touch detected */
Ts_Ctx[Instance].PreviousX[0] = TS_State->TouchX;
Ts_Ctx[Instance].PreviousY[0] = TS_State->TouchY;
}
else
{
TS_State->TouchX = Ts_Ctx[Instance].PreviousX[0];
TS_State->TouchY = Ts_Ctx[Instance].PreviousY[0];
}
}
else
{
TS_State->TouchDetected = 0U;
TS_State->TouchX = Ts_Ctx[Instance].PreviousX[0];
TS_State->TouchY = Ts_Ctx[Instance].PreviousY[0];
}
}
return ret;
}
#if (USE_TS_MULTI_TOUCH > 0)
/**
* @brief Returns positions of multi touch screen.
* @param Instance TS instance. Could be only 0.
* @param TS_State Pointer to touch screen current state structure
* @retval BSP status
*/
int32_t BSP_TS_Get_MultiTouchState(uint32_t Instance, TS_MultiTouch_State_t *TS_State)
{
int32_t ret = BSP_ERROR_NONE;
uint32_t index;
uint32_t x_oriented, y_oriented;
uint32_t x_diff, y_diff;
if (Instance >= TS_INSTANCES_NBR)
{
ret = BSP_ERROR_WRONG_PARAM;
}
else
{
GT911_MultiTouch_State_t state = {0};
/* Get each touch coordinates */
if (Ts_Drv->GetMultiTouchState(Ts_CompObj[Instance], &state) < 0)
{
ret = BSP_ERROR_COMPONENT_FAILURE;
}
else if (state.TouchDetected != 0U)
{
/* Check and update the number of touches active detected */
for (index = 0; index < state.TouchDetected; index++)
{
x_oriented = state.TouchX[index];
y_oriented = state.TouchY[index];
if ((Ts_Ctx[Instance].Orientation & TS_SWAP_XY) == TS_SWAP_XY)
{
x_oriented = state.TouchY[index];
y_oriented = state.TouchX[index];
}
if ((Ts_Ctx[Instance].Orientation & TS_SWAP_X) == TS_SWAP_X)
{
x_oriented = Ts_Ctx[Instance].MaxX - state.TouchX[index] - 1UL;
}
if ((Ts_Ctx[Instance].Orientation & TS_SWAP_Y) == TS_SWAP_Y)
{
y_oriented = Ts_Ctx[Instance].MaxY - state.TouchY[index];
}
/* Apply boundary */
TS_State->TouchX[index] = (x_oriented * Ts_Ctx[Instance].Width) / Ts_Ctx[Instance].MaxX;
TS_State->TouchY[index] = (y_oriented * Ts_Ctx[Instance].Height) / Ts_Ctx[Instance].MaxY;
/* Store Current TS state */
TS_State->TouchDetected = state.TouchDetected;
/* Check accuracy */
x_diff = (TS_State->TouchX[index] > Ts_Ctx[Instance].PreviousX[index]) ?
(TS_State->TouchX[index] - Ts_Ctx[Instance].PreviousX[index]) :
(Ts_Ctx[Instance].PreviousX[index] - TS_State->TouchX[index]);
y_diff = (TS_State->TouchY[index] > Ts_Ctx[Instance].PreviousY[index]) ?
(TS_State->TouchY[index] - Ts_Ctx[Instance].PreviousY[index]) :
(Ts_Ctx[Instance].PreviousY[index] - TS_State->TouchY[index]);
if ((x_diff > Ts_Ctx[Instance].Accuracy) || (y_diff > Ts_Ctx[Instance].Accuracy))
{
/* New touch detected */
Ts_Ctx[Instance].PreviousX[index] = TS_State->TouchX[index];
Ts_Ctx[Instance].PreviousY[index] = TS_State->TouchY[index];
}
else
{
TS_State->TouchX[index] = Ts_Ctx[Instance].PreviousX[index];
TS_State->TouchY[index] = Ts_Ctx[Instance].PreviousY[index];
}
}
}
else
{
TS_State->TouchDetected = 0U;
for (index = 0; index < TS_TOUCH_NBR; index++)
{
TS_State->TouchX[index] = Ts_Ctx[Instance].PreviousX[index];
TS_State->TouchY[index] = Ts_Ctx[Instance].PreviousY[index];
}
}
}
return ret;
}
#endif /* USE_TS_MULTI_TOUCH == 1 */
#if (USE_TS_GESTURE == 1)
/**
* @brief Update gesture Id following a touch detected.
* @param Instance TS instance. Could be only 0.
* @param GestureConfig Pointer to gesture configuration structure
* @retval BSP status
*/
int32_t BSP_TS_GestureConfig(uint32_t Instance, TS_Gesture_Config_t *GestureConfig)
{
int32_t ret = BSP_ERROR_NONE;
if (Instance >= TS_INSTANCES_NBR)
{
ret = BSP_ERROR_WRONG_PARAM;
}
else
{
if (Ts_Drv->GestureConfig(Ts_CompObj[Instance], GestureConfig) < 0)
{
ret = BSP_ERROR_COMPONENT_FAILURE;
}
}
return ret;
}
/**
* @brief Update gesture Id following a touch detected.
* @param Instance TS instance. Could be only 0.
* @param GestureId Pointer to gesture ID
* @retval BSP status
*/
int32_t BSP_TS_GetGestureId(uint32_t Instance, uint32_t *GestureId)
{
int32_t ret = BSP_ERROR_NONE;
uint8_t tmp = 0;
if (Instance >= TS_INSTANCES_NBR)
{
ret = BSP_ERROR_WRONG_PARAM;
}/* Get gesture Id */
else if (Ts_Drv->GetGesture(Ts_CompObj[Instance], &tmp) < 0)
{
ret = BSP_ERROR_COMPONENT_FAILURE;
}
else
{
/* Remap gesture Id to a TS_Gesture_Id_t value */
switch (tmp)
{
case GT911_GEST_ID_NO_GESTURE :
*GestureId = GESTURE_ID_NO_GESTURE;
break;
case GT911_GEST_ID_SWIPE_UP :
*GestureId = GESTURE_ID_SWIPE_UP;
break;
case GT911_GEST_ID_SWIPE_RIGHT :
*GestureId = GESTURE_ID_SWIPE_RIGHT;
break;
case GT911_GEST_ID_SWIPE_DOWN :
*GestureId = GESTURE_ID_SWIPE_DOWN;
break;
case GT911_GEST_ID_SWIPE_LEFT :
*GestureId = GESTURE_ID_SWIPE_LEFT;
break;
case GT911_GEST_ID_DOUBLE_TAP :
*GestureId = GESTURE_ID_DOUBLE_TAP;
break;
default :
*GestureId = GESTURE_ID_NO_GESTURE;
break;
}
}
return ret;
}
#endif /* USE_TS_GESTURE == 1 */
/**
* @brief Set TS orientation
* @param Instance TS instance. Could be only 0.
* @param Orientation Orientation to be set
* @retval BSP status
*/
int32_t BSP_TS_Set_Orientation(uint32_t Instance, uint32_t Orientation)
{
Ts_Ctx[Instance].Orientation = Orientation;
return BSP_ERROR_NONE;
}
/**
* @brief Get TS orientation
* @param Instance TS instance. Could be only 0.
* @param Orientation Current Orientation to be returned
* @retval BSP status
*/
int32_t BSP_TS_Get_Orientation(uint32_t Instance, uint32_t *Orientation)
{
*Orientation = Ts_Ctx[Instance].Orientation;
return BSP_ERROR_NONE;
}
/**
* @}
*/
/** @defgroup STM32H7S78_DK_TS_Private_Functions Private Functions
* @{
*/
/**
* @brief Register Bus IOs if component ID is OK
* @param Instance TS instance. Could be only 0.
* @retval BSP status
*/
static int32_t GT911_Probe(uint32_t Instance)
{
int32_t ret = BSP_ERROR_NONE;
GT911_IO_t IOCtx;
static GT911_Object_t GT911Obj;
uint32_t gt911_id = 0;
/* Configure the touch screen driver */
IOCtx.Address = TS_I2C_ADDRESS;
IOCtx.Init = BSP_I2C1_Init;
IOCtx.DeInit = BSP_I2C1_DeInit;
IOCtx.ReadReg = BSP_I2C1_ReadReg16;
IOCtx.WriteReg = BSP_I2C1_WriteReg16;
IOCtx.GetTick = BSP_GetTick;
if (GT911_RegisterBusIO (&GT911Obj, &IOCtx) != GT911_OK)
{
ret = BSP_ERROR_BUS_FAILURE;
}
else if (GT911_ReadID(&GT911Obj, &gt911_id) != GT911_OK)
{
ret = BSP_ERROR_COMPONENT_FAILURE;
}
else if (gt911_id != GT911_ID)
{
ret = BSP_ERROR_UNKNOWN_COMPONENT;
}
else
{
Ts_CompObj[Instance] = &GT911Obj;
Ts_Drv = (TS_Drv_t *) &GT911_TS_Driver;
if (Ts_Drv->Init(Ts_CompObj[Instance]) != GT911_OK)
{
ret = BSP_ERROR_COMPONENT_FAILURE;
}
}
return ret;
}
/**
* @brief TS EXTI touch detection callbacks.
* @retval None
*/
static void TS_EXTI_Callback(void)
{
BSP_TS_Callback(0);
/* Clear interrupt on TS driver */
(void)Ts_Drv->ClearIT(Ts_CompObj[0]);
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
Drivers/STM32H7RSxx_BSP/STM32H7S78-DK/stm32h7s78_discovery_ts.h
+217
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/**
******************************************************************************
* @file stm32h7s78_discovery_ts.h
* @author MCD Application Team
* @brief This file is the header of stm32h7s78_discovery_bus.c file
******************************************************************************
* @attention
*
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32H7S78_DK_TS_H
#define STM32H7S78_DK_TS_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32h7s78_discovery_conf.h"
#include "stm32h7s78_discovery_errno.h"
#include "../Components/gt911/gt911.h"
/** @addtogroup BSP
* @{
*/
/** @addtogroup STM32H7S78_DK
* @{
*/
/** @addtogroup STM32H7S78_DK_TS
* @{
*/
/** @defgroup STM32H7S78_DK_TS_Exported_Constants Exported Constants
* @{
*/
#ifndef USE_TS_MULTI_TOUCH
#define USE_TS_MULTI_TOUCH 1U
#endif
#ifndef USE_TS_GESTURE
#define USE_TS_GESTURE 1U
#endif
#ifndef TS_TOUCH_NBR
#define TS_TOUCH_NBR 5U
#endif
#define TS_INSTANCES_NBR 1U
/* Maximum border values of the touchscreen pad */
#define TS_MAX_WIDTH GT911_MAX_X_LENGTH /* Touchscreen pad max width */
#define TS_MAX_HEIGHT GT911_MAX_Y_LENGTH /* Touchscreen pad max height */
#define TS_SWAP_NONE 0x01U
#define TS_SWAP_X 0x02U
#define TS_SWAP_Y 0x04U
#define TS_SWAP_XY 0x08U
/**
* @brief TouchScreen Slave I2C address 1
*/
#define TS_I2C_ADDRESS 0xBAU
/**
* @brief Touch screen interrupt signal
*/
#define TS_INT_PIN GPIO_PIN_3
#define TS_INT_GPIO_PORT GPIOE
#define TS_INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOE_CLK_ENABLE()
#define TS_INT_GPIO_CLK_DISABLE() __HAL_RCC_GPIOE_CLK_DISABLE()
#define TS_INT_EXTI_IRQn EXTI3_IRQn
#define TS_EXTI_LINE EXTI_LINE_3
/**
* @}
*/
/** @defgroup STM32H7S78_DK_TS_Exported_Types Exported Types
* @{
*/
typedef struct
{
uint32_t Width; /* Screen Width */
uint32_t Height; /* Screen Height */
uint32_t Orientation; /* Touch Screen orientation from the upper left position */
uint32_t Accuracy; /* Expressed in pixel and means the x or y difference vs old
position to consider the new values valid */
} TS_Init_t;
typedef struct
{
uint32_t Width;
uint32_t Height;
uint32_t Orientation;
uint32_t Accuracy;
uint32_t MaxX;
uint32_t MaxY;
uint32_t PreviousX[TS_TOUCH_NBR];
uint32_t PreviousY[TS_TOUCH_NBR];
} TS_Ctx_t;
typedef struct
{
uint8_t MultiTouch; /* Multi-touch supported : 0 means no, 1 means yes */
uint8_t Gesture; /* Gesture supported : 0 means no, 1 means yes */
uint8_t MaxTouch; /* Maximum number of touches detected if multi-touch supported */
uint32_t MaxXl; /* Maximum value of x coordinate */
uint32_t MaxYl; /* Maximum value of y coordinate */
} TS_Capabilities_t;
typedef struct
{
uint32_t TouchDetected; /* Touch detected : 0 means no, 1 means yes */
uint32_t TouchX; /* x coordinate */
uint32_t TouchY; /* y coordinate */
} TS_State_t;
typedef struct
{
uint32_t TouchDetected; /* Number of touch detected (from 0 to maximum of touches) */
uint32_t TouchX[TS_TOUCH_NBR]; /* x coordinates */
uint32_t TouchY[TS_TOUCH_NBR]; /* y coordinates */
} TS_MultiTouch_State_t;
#if (USE_TS_GESTURE > 0)
/**
* @brief TS_Gesture_Id_t
* Define Possible managed gesture identification values returned by touch screen
* driver.
*/
#define GESTURE_ID_NO_GESTURE 0x00U /*!< Gesture not defined / recognized */
#define GESTURE_ID_SWIPE_UP 0x01U /*!< Gesture Swipe Up */
#define GESTURE_ID_SWIPE_RIGHT 0x02U /*!< Gesture Swipe Right */
#define GESTURE_ID_SWIPE_DOWN 0x03U /*!< Gesture Swipe Down */
#define GESTURE_ID_SWIPE_LEFT 0x04U /*!< Gesture Swipe Left */
#define GESTURE_ID_DOUBLE_TAP 0x05U /*!< Gesture Double Tap */
#define GESTURE_ID_NB_MAX 0x06U /*!< max number of gesture id */
typedef struct
{
uint32_t DistanceLeftRight; /* Maximum distance while moving left and moving right gesture.
Value from 0 to TS_LENGTH/16 (default value is TS_LENGTH/8). */
uint32_t DistanceUpDown; /* Maximum distance while moving up and moving down gesture.
Value from 0 to TS_LENGTH/16 (default value is TS_LENGTH/8). */
uint8_t RefreshRate; /* Report Rate in Gesture Mode. */
uint8_t GestureThreshold; /* Touch Threshold in Gesture Mode. */
uint8_t Gain; /* Gesture PGA gain. */
} TS_Gesture_Config_t;
#endif /* (USE_TS_GESTURE > 0) */
/**
* @}
*/
/** @addtogroup STM32H7S78_DK_TS_Exported_Variables
* @{
*/
extern void *Ts_CompObj[TS_INSTANCES_NBR];
extern EXTI_HandleTypeDef hts_exti[TS_INSTANCES_NBR];
extern TS_Ctx_t Ts_Ctx[TS_INSTANCES_NBR];
/**
* @}
*/
/** @defgroup STM32H7S78_DK_TS_Exported_FunctionsPrototypes Exported Functions Prototypes
* @{
*/
int32_t BSP_TS_Init(uint32_t Instance, TS_Init_t *TS_Init);
int32_t BSP_TS_DeInit(uint32_t Instance);
int32_t BSP_TS_EnableIT(uint32_t Instance);
int32_t BSP_TS_DisableIT(uint32_t Instance);
int32_t BSP_TS_GetState(uint32_t Instance, TS_State_t *TS_State);
#if (USE_TS_MULTI_TOUCH == 1)
int32_t BSP_TS_Get_MultiTouchState(uint32_t Instance, TS_MultiTouch_State_t *TS_State);
#endif /* USE_TS_MULTI_TOUCH == 1 */
#if (USE_TS_GESTURE == 1)
int32_t BSP_TS_GestureConfig(uint32_t Instance, TS_Gesture_Config_t *GestureConfig);
int32_t BSP_TS_GetGestureId(uint32_t Instance, uint32_t *GestureId);
#endif /* (USE_TS_GESTURE == 1) */
int32_t BSP_TS_Set_Orientation(uint32_t Instance, uint32_t Orientation);
int32_t BSP_TS_Get_Orientation(uint32_t Instance, uint32_t *Orientation);
int32_t BSP_TS_GetCapabilities(uint32_t Instance, TS_Capabilities_t *Capabilities);
void BSP_TS_Callback(uint32_t Instance);
void BSP_TS_IRQHandler(uint32_t Instance);
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* STM32H7S78_DK_TS_H */
Drivers/STM32H7RSxx_BSP/STM32H7S78-DK/stm32h7s78_discovery_usbpd_pwr.c
+1870
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Drivers/STM32H7RSxx_BSP/STM32H7S78-DK/stm32h7s78_discovery_usbpd_pwr.h
+337
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/**
******************************************************************************
* @file stm32h7s78_discovery_usbpd_pwr.h
* @author MCD Application Team
* @brief Header file for stm32h7s78_discovery_usbpd_pwr.c file
******************************************************************************
* @attention
*
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32H7S78_DISCOVERY_USBPD_PWR_H
#define STM32H7S78_DISCOVERY_USBPD_PWR_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32h7s78_discovery_conf.h"
#include "stm32h7s78_discovery_errno.h"
#include "stm32h7rsxx_hal_adc.h"
#include "stm32h7rsxx_ll_bus.h"
#include "stm32h7rsxx_ll_gpio.h"
#include "stm32h7rsxx_ll_exti.h"
#include "stm32h7rsxx_ll_system.h"
#include "../Components/tcpp0203/tcpp0203.h"
/** @addtogroup BSP
* @{
*/
/** @addtogroup STM32H7S78_DK
* @{
*/
/** @defgroup USBPD_PWR USBPD_PWR
* @{
*/
/** @defgroup STM32H7S78_DK_USBPD_PWR_Exported_Types Exported Types
* @{
*/
#if !defined(USBPD_PWR_USER_H_)
/**
* @brief Power role
*/
typedef enum
{
POWER_ROLE_SOURCE = 0,
POWER_ROLE_SINK,
POWER_ROLE_DUAL
} USBPD_PWR_PowerRoleTypeDef;
/**
* @brief Low Power Mode of TypeC ports
*/
typedef enum
{
USBPD_PWR_MODE_OFF = 0,
USBPD_PWR_MODE_HIBERNATE,
USBPD_PWR_MODE_LOWPOWER,
USBPD_PWR_MODE_NORMAL
} USBPD_PWR_PowerModeTypeDef;
/**
* @brief VBUS connection status
*/
typedef enum
{
VBUS_CONNECTED = 0,
VBUS_NOT_CONNECTED
} USBPD_PWR_VBUSConnectionStatusTypeDef;
/**
* @brief ADC buffer identifiers
*/
typedef enum
{
ADCBUF_VSENSE = 0,
ADCBUF_ISENSE
} USBPD_PWR_ADCBufIDTypeDef;
/**
* @brief VBUS Detection Callback
*/
typedef void USBPD_PWR_VBUSDetectCallbackFunc(uint32_t PortNum,
USBPD_PWR_VBUSConnectionStatusTypeDef VBUSConnectionStatus);
/**
* @}
*/
/** @defgroup STM32H7S78_DK_USBPD_PWR_Exported_Constants Exported Constants
* @{
*/
/**
* @brief HW configuration type of TypeC ports
*/
#define USBPD_PWR_HW_CONFIG_TYPE_DEFAULT (0U) /*!< Default configuration :
Port available natively on board, no protection */
#define USBPD_PWR_HW_CONFIG_TYPE_TCPP01 (1U) /*!< TypeC Port protection available
thanks to a TCPP01 component */
#define USBPD_PWR_HW_CONFIG_TYPE_TCPP02 (2U) /*!< TypeC Port protection available
thanks to a TCPP02 component */
#define USBPD_PWR_HW_CONFIG_TYPE_TCPP03 (3U) /*!< TypeC Port protection available
thanks to a TCPP03 component */
/**
* @brief Number of TypeC ports
*/
#define USBPD_PWR_INSTANCES_NBR (1U)
/**
* @brief Type-C port identifier
*/
#define USBPD_PWR_TYPE_C_PORT_1 (0U)
#define USBPD_PWR_TYPE_C_PORT_2 (1U)
#define USBPD_PWR_TYPE_C_PORT_3 (2U)
/**
* @brief CC pin identifier
*/
#define USBPD_PWR_TYPE_C_CC1 (1U)
#define USBPD_PWR_TYPE_C_CC2 (2U)
/**
* @brief VBUS disconnection threshold values (in mV)
*/
#define USBPD_PWR_HIGH_VBUS_THRESHOLD (2800U)
#define USBPD_PWR_LOW_VBUS_THRESHOLD (750U)
#define USBPD_PWR_VBUS_THRESHOLD_5V (3900U)
#define USBPD_PWR_VBUS_THRESHOLD_9V (7000U)
#define USBPD_PWR_VBUS_THRESHOLD_15V (12500U)
#define USBPD_PWR_VBUS_THRESHOLD_20V (17000U)
#define USBPD_PWR_VBUS_THRESHOLD_APDO (2150U)
/**
* @brief VBUS discharge parameters
*/
#define USBPD_PWR_DISCHARGE_MARGIN (500U)
#define USBPD_PWR_DISCHARGE_TIME (6U)
/**
* @brief Standard VBUS voltage levels
*/
#define USBPD_PWR_VBUS_5V 5000U
#define USBPD_PWR_VBUS_9V 9000U
#define USBPD_PWR_VBUS_15V 15000U
/**
* @brief power timeout
*/
#define USBPD_PWR_TIMEOUT_PDO 250U /* Timeout for PDO to PDO or PDO to APDO at 250ms */
#define USBPD_PWR_TIMEOUT_APDO 25U /* Timeout for APDO to APDO at 25ms */
/**
* @brief Invalid value set during issue with voltage setting
*/
#define USBPD_PWR_INVALID_VALUE 0xFFFFFFFFU
#endif /* !USBPD_PWR_USER_H_ */
/**
* @brief TCPP0203_FLGn pin
* To be defined for each Port, protected by a TCPP0203 component
*/
#define TCPP0203_PORT0_FLG_GPIO_CLK_ENABLE() __HAL_RCC_GPIOM_CLK_ENABLE()
#define TCPP0203_PORT0_FLG_GPIO_CLK_DISABLE() __HAL_RCC_GPIOM_CLK_DISABLE()
#define TCPP0203_PORT0_FLG_GPIO_PORT GPIOM
#define TCPP0203_PORT0_FLG_GPIO_PIN LL_GPIO_PIN_8
#define TCPP0203_PORT0_FLG_GPIO_MODE LL_GPIO_MODE_INPUT
#define TCPP0203_PORT0_FLG_GPIO_PUPD LL_GPIO_PULL_UP
#define TCPP0203_PORT0_FLG_SET_EXTI() \
do \
{ \
__HAL_RCC_SBS_CLK_ENABLE(); \
LL_SBS_SetEXTISource(LL_SBS_EXTI_PORTM, LL_SBS_EXTI_LINE8); \
} while(0);
#define TCPP0203_PORT0_FLG_EXTI_LINE LL_EXTI_LINE_8
#define TCPP0203_PORT0_FLG_EXTI_ENABLE() \
do \
{ \
LL_EXTI_DisableEvent_0_31(TCPP0203_PORT0_FLG_EXTI_LINE); \
LL_EXTI_EnableIT_0_31(TCPP0203_PORT0_FLG_EXTI_LINE); \
} while(0);
#define TCPP0203_PORT0_FLG_EXTI_DISABLE() LL_EXTI_DisableIT_0_31(TCPP0203_PORT0_FLG_EXTI_LINE);
#define TCPP0203_PORT0_FLG_TRIG_ENABLE() \
do \
{ \
LL_EXTI_DisableRisingTrig_0_31(TCPP0203_PORT0_FLG_EXTI_LINE); \
LL_EXTI_EnableFallingTrig_0_31(TCPP0203_PORT0_FLG_EXTI_LINE); \
} while(0);
#define TCPP0203_PORT0_FLG_TRIG_DISABLE() LL_EXTI_DisableFallingTrig_0_31(TCPP0203_PORT0_FLG_EXTI_LINE);
#define TCPP0203_PORT0_FLG_EXTI_IS_ACTIVE_FLAG() LL_EXTI_IsActiveFlag_0_31(TCPP0203_PORT0_FLG_EXTI_LINE)
#define TCPP0203_PORT0_FLG_EXTI_CLEAR_FLAG() LL_EXTI_ClearFlag_0_31(TCPP0203_PORT0_FLG_EXTI_LINE);
#define TCPP0203_PORT0_FLG_EXTI_IRQN EXTI8_IRQn
#define TCPP0203_PORT0_FLG_EXTI_IRQHANDLER EXTI8_IRQHandler
#define TCPP0203_PORT0_FLG_IT_PRIORITY (12U)
#define TCPP0203_PORT0_FLG_GENERATE_IT() LL_EXTI_GenerateSWI_0_31(TCPP0203_PORT0_FLG_EXTI_LINE);
/**
* @brief TCPP0203_PWRENn pin
*/
#define TCPP0203_PORT0_ENABLE_GPIO_CLK_ENABLE() __HAL_RCC_GPIOM_CLK_ENABLE()
#define TCPP0203_PORT0_ENABLE_GPIO_CLK_DISABLE() __HAL_RCC_GPIOM_CLK_DISABLE()
#define TCPP0203_PORT0_ENABLE_GPIO_PORT GPIOM
#define TCPP0203_PORT0_ENABLE_GPIO_PIN LL_GPIO_PIN_9
#define TCPP0203_PORT0_ENABLE_GPIO_MODE LL_GPIO_MODE_OUTPUT
#define TCPP0203_PORT0_ENABLE_GPIO_OUTPUT LL_GPIO_OUTPUT_PUSHPULL
#define TCPP0203_PORT0_ENABLE_GPIO_PUPD LL_GPIO_PULL_NO
#define TCPP0203_PORT0_ENABLE_GPIO_DEFVALUE() LL_GPIO_ResetOutputPin(TCPP0203_PORT0_ENABLE_GPIO_PORT,\
TCPP0203_PORT0_ENABLE_GPIO_PIN);
#define TCPP0203_PORT0_ENABLE_GPIO_SET() LL_GPIO_SetOutputPin(TCPP0203_PORT0_ENABLE_GPIO_PORT,\
TCPP0203_PORT0_ENABLE_GPIO_PIN);
#define TCPP0203_PORT0_ENABLE_GPIO_RESET() LL_GPIO_ResetOutputPin(TCPP0203_PORT0_ENABLE_GPIO_PORT,\
TCPP0203_PORT0_ENABLE_GPIO_PIN);
#define TCPP0203_PORT0_IANA_GPIO_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE()
#define TCPP0203_PORT0_IANA_GPIO_CLK_DISABLE() __HAL_RCC_GPIOF_CLK_DISABLE()
#define TCPP0203_PORT0_IANA_GPIO_PORT GPIOF
#define TCPP0203_PORT0_IANA_GPIO_PIN LL_GPIO_PIN_12
#define TCPP0203_PORT0_IANA_GPIO_MODE LL_GPIO_MODE_ANALOG
#define TCPP0203_PORT0_VBUSC_GPIO_CLK_ENABLE() __HAL_RCC_GPIOF_CLK_ENABLE()
#define TCPP0203_PORT0_VBUSC_GPIO_CLK_DISABLE() __HAL_RCC_GPIOF_CLK_DISABLE()
#define TCPP0203_PORT0_VBUSC_GPIO_PORT GPIOF
#define TCPP0203_PORT0_VBUSC_GPIO_PIN LL_GPIO_PIN_14
#define TCPP0203_PORT0_VBUSC_GPIO_MODE LL_GPIO_MODE_ANALOG
#define TCPP0203_PORT0_VBUSC_ADC_INSTANCE ADC2
#define TCPP0203_PORT0_VBUSC_ADC_COMMON ADC12_COMMON
#define TCPP0203_PORT0_VBUSC_ADC_RANK LL_ADC_REG_RANK_1
#define TCPP0203_PORT0_VBUSC_ADC_CHANNEL LL_ADC_CHANNEL_6
#define TCPP0203_PORT0_VBUSC_ADC_CLK_ENABLE() __HAL_RCC_ADC12_CLK_ENABLE()
#define TCPP0203_PORT0_VBUSC_RA 3300u /* VBUS voltage divider RA */
#define TCPP0203_PORT0_VBUSC_RB 499u /* VBUS voltage divider RB */
#define TCPP0203_PORT0_IANA_ISENSE_GA 42u /* Current measure gain In V/V */
#define TCPP0203_PORT0_IANA_ISENSE_RS 22u /* Current measure shunt resistor in milliohm */
/**
* @}
*/
/** @addtogroup STM32H7S78_DK_USBPD_PWR_Exported_Variables
* @{
*/
/**
* @}
*/
/** @defgroup STM32H7S78_DK_USBPD_PWR_Exported_Functions Exported Functions
* @{
*/
/* Common functions */
int32_t BSP_USBPD_PWR_Init(uint32_t PortNum);
int32_t BSP_USBPD_PWR_Deinit(uint32_t PortNum);
int32_t BSP_USBPD_PWR_SetRole(uint32_t PortNum, USBPD_PWR_PowerRoleTypeDef Role);
int32_t BSP_USBPD_PWR_SetPowerMode(uint32_t PortNum, USBPD_PWR_PowerModeTypeDef PwrMode);
int32_t BSP_USBPD_PWR_GetPowerMode(uint32_t PortNum, USBPD_PWR_PowerModeTypeDef *PwrMode);
int32_t BSP_USBPD_PWR_VBUSInit(uint32_t PortNum);
int32_t BSP_USBPD_PWR_VBUSDeInit(uint32_t PortNum);
int32_t BSP_USBPD_PWR_VBUSOn(uint32_t PortNum);
int32_t BSP_USBPD_PWR_VBUSOff(uint32_t PortNum);
int32_t BSP_USBPD_PWR_VBUSIsOn(uint32_t PortNum, uint8_t *pState);
int32_t BSP_USBPD_PWR_VBUSSetVoltage_Fixed(uint32_t PortNum, uint32_t VbusTargetInmv, uint32_t OperatingCurrent,
uint32_t MaxOperatingCurrent);
int32_t BSP_USBPD_PWR_VBUSSetVoltage_Variable(uint32_t PortNum, uint32_t VbusTargetMaxInmv,
uint32_t VbusTargetMinInmv, uint32_t OperatingCurrent,
uint32_t MaxOperatingCurrent);
int32_t BSP_USBPD_PWR_VBUSSetVoltage_Battery(uint32_t PortNum, uint32_t VbusTargetMin, uint32_t VbusTargetMax,
uint32_t OperatingPower, uint32_t MaxOperatingPower);
int32_t BSP_USBPD_PWR_VBUSSetVoltage_APDO(uint32_t PortNum, uint32_t VbusTargetInmv, uint32_t OperatingCurrent,
int32_t Delta);
int32_t BSP_USBPD_PWR_SetVBUSDisconnectionThreshold(uint32_t PortNum, uint32_t VoltageThreshold);
int32_t BSP_USBPD_PWR_RegisterVBUSDetectCallback(uint32_t PortNum,
USBPD_PWR_VBUSDetectCallbackFunc *pfnVBUSDetectCallback);
int32_t BSP_USBPD_PWR_VBUSGetVoltage(uint32_t PortNum, uint32_t *pVoltage);
int32_t BSP_USBPD_PWR_VBUSGetCurrent(uint32_t PortNum, int32_t *pCurrent);
int32_t BSP_USBPD_PWR_VBUSDischargeOn(uint32_t PortNum);
int32_t BSP_USBPD_PWR_VBUSDischargeOff(uint32_t PortNum);
int32_t BSP_USBPD_PWR_VCONNInit(uint32_t PortNum, uint32_t CCPinId);
int32_t BSP_USBPD_PWR_VCONNDeInit(uint32_t PortNum, uint32_t CCPinId);
int32_t BSP_USBPD_PWR_VCONNOn(uint32_t PortNum, uint32_t CCPinId);
int32_t BSP_USBPD_PWR_VCONNOff(uint32_t PortNum, uint32_t CCPinId);
int32_t BSP_USBPD_PWR_VCONNIsOn(uint32_t PortNum, uint32_t CCPinId, uint8_t *pState);
int32_t BSP_USBPD_PWR_VCONNDischargeOn(uint32_t PortNum);
int32_t BSP_USBPD_PWR_VCONNDischargeOff(uint32_t PortNum);
void BSP_USBPD_PWR_EventCallback(uint32_t PortNum);
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* STM32H7S78_DISCOVERY_USBPD_PWR_H */
Drivers/STM32H7RSxx_BSP/STM32H7S78-DK/stm32h7s78_discovery_xspi.c
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Drivers/STM32H7RSxx_BSP/STM32H7S78-DK/stm32h7s78_discovery_xspi.h
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/**
******************************************************************************
* @file stm32h7s78_discovery_xspi.h
* @author MCD Application Team
* @brief This file contains the common defines and functions prototypes for
* the stm32h7s78_discovery_xspi.c driver.
******************************************************************************
* @attention
*
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32H7S78_DISCOVERY_XSPI_H
#define STM32H7S78_DISCOVERY_XSPI_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32h7s78_discovery_conf.h"
#include "stm32h7s78_discovery_errno.h"
#ifndef USE_NOR_MEMORY_MX66UW1G45G
#define USE_NOR_MEMORY_MX66UW1G45G 1
#endif /* USE_NOR_MEMORY_MX66UW1G45G */
#ifndef USE_RAM_MEMORY_APS256XX
#define USE_RAM_MEMORY_APS256XX 1
#endif /* USE_RAM_MEMORY_APS256XX */
#if (USE_NOR_MEMORY_MX66UW1G45G == 1)
#include "../Components/mx66uw1g45g/mx66uw1g45g.h"
#endif /* USE_NOR_MEMORY_MX66UW1G45G */
#if (USE_RAM_MEMORY_APS256XX == 1)
#include "../Components/aps256xx/aps256xx.h"
#endif /* USE_RAM_MEMORY_APS256XX */
/** @addtogroup BSP
* @{
*/
/** @addtogroup STM32H7S78_DK
* @{
*/
/** @addtogroup STM32H7S78_DK_XSPI
* @{
*/
/* Exported types ------------------------------------------------------------*/
/** @defgroup STM32H7S78_DK_XSPI_Exported_Types XSPI Exported Types
* @{
*/
typedef enum
{
XSPI_ACCESS_NONE = 0, /*!< Instance not initialized, */
XSPI_ACCESS_INDIRECT, /*!< Instance use indirect mode access */
XSPI_ACCESS_MMP /*!< Instance use Memory Mapped Mode read */
} XSPI_Access_t;
#if (USE_HAL_XSPI_REGISTER_CALLBACKS == 1)
typedef struct
{
pXSPI_CallbackTypeDef pMspInitCb;
pXSPI_CallbackTypeDef pMspDeInitCb;
} BSP_XSPI_Cb_t;
#endif /* (USE_HAL_XSPI_REGISTER_CALLBACKS == 1) */
typedef struct
{
uint32_t MemorySize;
uint32_t ClockPrescaler;
uint32_t SampleShifting;
uint32_t TransferRate;
} MX_XSPI_InitTypeDef;
/**
* @}
*/
#if (USE_NOR_MEMORY_MX66UW1G45G == 1)
/** @defgroup STM32H7S78_DK_XSPI_NOR_Exported_Types XSPI_NOR Exported Types
* @{
*/
#define BSP_XSPI_NOR_Info_t MX66UW1G45G_Info_t
#define BSP_XSPI_NOR_Interface_t MX66UW1G45G_Interface_t
#define BSP_XSPI_NOR_Transfer_t MX66UW1G45G_Transfer_t
#define BSP_XSPI_NOR_Erase_t MX66UW1G45G_Erase_t
typedef struct
{
XSPI_Access_t IsInitialized; /*!< Instance access Flash method */
BSP_XSPI_NOR_Interface_t InterfaceMode; /*!< Flash Interface mode of Instance */
BSP_XSPI_NOR_Transfer_t TransferRate; /*!< Flash Transfer mode of Instance */
} XSPI_NOR_Ctx_t;
typedef struct
{
BSP_XSPI_NOR_Interface_t InterfaceMode; /*!< Current Flash Interface mode */
BSP_XSPI_NOR_Transfer_t TransferRate; /*!< Current Flash Transfer rate */
} BSP_XSPI_NOR_Init_t;
/**
* @}
*/
#endif /* USE_NOR_MEMORY_MX66UW1G45G */
#if (USE_RAM_MEMORY_APS256XX == 1)
/** @defgroup STM32H7S78_DK_XSPI_RAM_Exported_Types XSPI_RAM Exported Types
* @{
*/
#define BSP_XSPI_RAM_ReadLatencyCode_t APS256XX_ReadLatencyCode_t
#define BSP_XSPI_RAM_WriteLatencyCode_t APS256XX_WriteLatencyCode_t
typedef enum
{
BSP_XSPI_RAM_VARIABLE_LATENCY = 0U,
BSP_XSPI_RAM_FIXED_LATENCY = APS256XX_MR0_LATENCY_TYPE
} BSP_XSPI_RAM_Latency_t;
typedef enum
{
BSP_XSPI_RAM_IO_X8_MODE = 0U,
BSP_XSPI_RAM_IO_X16_MODE = APS256XX_MR8_X8_X16,
} BSP_XSPI_RAM_IOMode_t;
typedef struct
{
XSPI_Access_t IsInitialized; /*!< Instance access Flash method */
BSP_XSPI_RAM_Latency_t LatencyType; /*!< Latency Type of Instance */
BSP_XSPI_RAM_ReadLatencyCode_t ReadLatencyCode; /*!< Read Latency Code of Instance */
BSP_XSPI_RAM_WriteLatencyCode_t WriteLatencyCode; /*!< Write Latency Code of Instance */
BSP_XSPI_RAM_IOMode_t IOMode; /*!< IO Mode of Instance */
} XSPI_RAM_Ctx_t;
typedef struct
{
BSP_XSPI_RAM_Latency_t LatencyType; /*!< Current XSPI PSRAM Latency Type */
BSP_XSPI_RAM_ReadLatencyCode_t ReadLatencyCode; /*!< Current XSPI PSRAM Read Latency Code */
BSP_XSPI_RAM_WriteLatencyCode_t WriteLatencyCode; /*!< Current XSPI PSRAM Write Latency Code */
BSP_XSPI_RAM_IOMode_t IOMode; /*!< Current XSPI PSRAM IO Mode */
} BSP_XSPI_RAM_Cfg_t;
/**
* @}
*/
#endif /* USE_RAM_MEMORY_APS256XX */
/* Exported constants --------------------------------------------------------*/
/** @defgroup STM32H7S78_DK_XSPI_Exported_Constants XSPI Exported Constants
* @{
*/
#if (USE_NOR_MEMORY_MX66UW1G45G == 1)
/* Definition for XSPIM NOR power resources */
#define XSPI_NOR_PWR_ENABLE() HAL_PWREx_EnableXSPIM2()
/* Definition for XSPI NOR clock resources */
#define XSPI_NOR_CLK_ENABLE() __HAL_RCC_XSPI2_CLK_ENABLE()
#define XSPI_NOR_CLK_DISABLE() __HAL_RCC_XSPI2_CLK_DISABLE()
#define XSPI_NOR_CLK_GPIO_CLK_ENABLE() __HAL_RCC_GPION_CLK_ENABLE()
#define XSPI_NOR_DQS_GPIO_CLK_ENABLE() __HAL_RCC_GPION_CLK_ENABLE()
#define XSPI_NOR_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPION_CLK_ENABLE()
#define XSPI_NOR_D0_GPIO_CLK_ENABLE() __HAL_RCC_GPION_CLK_ENABLE()
#define XSPI_NOR_D1_GPIO_CLK_ENABLE() __HAL_RCC_GPION_CLK_ENABLE()
#define XSPI_NOR_D2_GPIO_CLK_ENABLE() __HAL_RCC_GPION_CLK_ENABLE()
#define XSPI_NOR_D3_GPIO_CLK_ENABLE() __HAL_RCC_GPION_CLK_ENABLE()
#define XSPI_NOR_D4_GPIO_CLK_ENABLE() __HAL_RCC_GPION_CLK_ENABLE()
#define XSPI_NOR_D5_GPIO_CLK_ENABLE() __HAL_RCC_GPION_CLK_ENABLE()
#define XSPI_NOR_D6_GPIO_CLK_ENABLE() __HAL_RCC_GPION_CLK_ENABLE()
#define XSPI_NOR_D7_GPIO_CLK_ENABLE() __HAL_RCC_GPION_CLK_ENABLE()
#define XSPI_NOR_FORCE_RESET() __HAL_RCC_XSPI2_FORCE_RESET()
#define XSPI_NOR_RELEASE_RESET() __HAL_RCC_XSPI2_RELEASE_RESET()
/* Definition for NOR XSPI Pins */
/* XSPI_CLK */
#define XSPI_NOR_CLK_PIN GPIO_PIN_6
#define XSPI_NOR_CLK_GPIO_PORT GPION
#define XSPI_NOR_CLK_PIN_AF GPIO_AF9_XSPIM_P2
/* XSPI_DQS */
#define XSPI_NOR_DQS_PIN GPIO_PIN_0
#define XSPI_NOR_DQS_GPIO_PORT GPION
#define XSPI_NOR_DQS_PIN_AF GPIO_AF9_XSPIM_P2
/* XSPI_CS */
#define XSPI_NOR_CS_PIN GPIO_PIN_1
#define XSPI_NOR_CS_GPIO_PORT GPION
#define XSPI_NOR_CS_PIN_AF GPIO_AF9_XSPIM_P2
/* XSPI_D0 */
#define XSPI_NOR_D0_PIN GPIO_PIN_2
#define XSPI_NOR_D0_GPIO_PORT GPION
#define XSPI_NOR_D0_PIN_AF GPIO_AF9_XSPIM_P2
/* XSPI_D1 */
#define XSPI_NOR_D1_PIN GPIO_PIN_3
#define XSPI_NOR_D1_GPIO_PORT GPION
#define XSPI_NOR_D1_PIN_AF GPIO_AF9_XSPIM_P2
/* XSPI_D2 */
#define XSPI_NOR_D2_PIN GPIO_PIN_4
#define XSPI_NOR_D2_GPIO_PORT GPION
#define XSPI_NOR_D2_PIN_AF GPIO_AF9_XSPIM_P2
/* XSPI_D3 */
#define XSPI_NOR_D3_PIN GPIO_PIN_5
#define XSPI_NOR_D3_GPIO_PORT GPION
#define XSPI_NOR_D3_PIN_AF GPIO_AF9_XSPIM_P2
/* XSPI_D4 */
#define XSPI_NOR_D4_PIN GPIO_PIN_8
#define XSPI_NOR_D4_GPIO_PORT GPION
#define XSPI_NOR_D4_PIN_AF GPIO_AF9_XSPIM_P2
/* XSPI_D5 */
#define XSPI_NOR_D5_PIN GPIO_PIN_9
#define XSPI_NOR_D5_GPIO_PORT GPION
#define XSPI_NOR_D5_PIN_AF GPIO_AF9_XSPIM_P2
/* XSPI_D6 */
#define XSPI_NOR_D6_PIN GPIO_PIN_10
#define XSPI_NOR_D6_GPIO_PORT GPION
#define XSPI_NOR_D6_PIN_AF GPIO_AF9_XSPIM_P2
/* XSPI_D7 */
#define XSPI_NOR_D7_PIN GPIO_PIN_11
#define XSPI_NOR_D7_GPIO_PORT GPION
#define XSPI_NOR_D7_PIN_AF GPIO_AF9_XSPIM_P2
#endif /* USE_NOR_MEMORY_MX66UW1G45G */
#if (USE_RAM_MEMORY_APS256XX == 1)
/* Definition for XSPI RAM power resources */
#define XSPI_RAM_PWR_ENABLE() HAL_PWREx_EnableXSPIM1()
/* Definition for XSPI RAM clock resources */
#define XSPI_RAM_CLK_ENABLE() __HAL_RCC_XSPI1_CLK_ENABLE()
#define XSPI_RAM_CLK_DISABLE() __HAL_RCC_XSPI1_CLK_DISABLE()
#define XSPI_RAM_CLK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOO_CLK_ENABLE()
#define XSPI_RAM_DQS0_GPIO_CLK_ENABLE() __HAL_RCC_GPIOO_CLK_ENABLE()
#define XSPI_RAM_DQS1_GPIO_CLK_ENABLE() __HAL_RCC_GPIOO_CLK_ENABLE()
#define XSPI_RAM_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOO_CLK_ENABLE()
#define XSPI_RAM_D0_GPIO_CLK_ENABLE() __HAL_RCC_GPIOP_CLK_ENABLE()
#define XSPI_RAM_D1_GPIO_CLK_ENABLE() __HAL_RCC_GPIOP_CLK_ENABLE()
#define XSPI_RAM_D2_GPIO_CLK_ENABLE() __HAL_RCC_GPIOP_CLK_ENABLE()
#define XSPI_RAM_D3_GPIO_CLK_ENABLE() __HAL_RCC_GPIOP_CLK_ENABLE()
#define XSPI_RAM_D4_GPIO_CLK_ENABLE() __HAL_RCC_GPIOP_CLK_ENABLE()
#define XSPI_RAM_D5_GPIO_CLK_ENABLE() __HAL_RCC_GPIOP_CLK_ENABLE()
#define XSPI_RAM_D6_GPIO_CLK_ENABLE() __HAL_RCC_GPIOP_CLK_ENABLE()
#define XSPI_RAM_D7_GPIO_CLK_ENABLE() __HAL_RCC_GPIOP_CLK_ENABLE()
#define XSPI_RAM_D8_GPIO_CLK_ENABLE() __HAL_RCC_GPIOP_CLK_ENABLE()
#define XSPI_RAM_D9_GPIO_CLK_ENABLE() __HAL_RCC_GPIOP_CLK_ENABLE()
#define XSPI_RAM_D10_GPIO_CLK_ENABLE() __HAL_RCC_GPIOP_CLK_ENABLE()
#define XSPI_RAM_D11_GPIO_CLK_ENABLE() __HAL_RCC_GPIOP_CLK_ENABLE()
#define XSPI_RAM_D12_GPIO_CLK_ENABLE() __HAL_RCC_GPIOP_CLK_ENABLE()
#define XSPI_RAM_D13_GPIO_CLK_ENABLE() __HAL_RCC_GPIOP_CLK_ENABLE()
#define XSPI_RAM_D14_GPIO_CLK_ENABLE() __HAL_RCC_GPIOP_CLK_ENABLE()
#define XSPI_RAM_D15_GPIO_CLK_ENABLE() __HAL_RCC_GPIOP_CLK_ENABLE()
#define XSPI_RAM_FORCE_RESET() __HAL_RCC_XSPI1_FORCE_RESET()
#define XSPI_RAM_RELEASE_RESET() __HAL_RCC_XSPI1_RELEASE_RESET()
/* Definition for XSPI RAM Pins */
/* XSPI_CLK */
#define XSPI_RAM_CLK_PIN GPIO_PIN_4
#define XSPI_RAM_CLK_GPIO_PORT GPIOO
#define XSPI_RAM_CLK_PIN_AF GPIO_AF9_XSPIM_P1
/* XSPI_DQS0 */
#define XSPI_RAM_DQS0_PIN GPIO_PIN_2
#define XSPI_RAM_DQS0_GPIO_PORT GPIOO
#define XSPI_RAM_DQS0_PIN_AF GPIO_AF9_XSPIM_P1
/* XSPI_DQS1 */
#define XSPI_RAM_DQS1_PIN GPIO_PIN_3
#define XSPI_RAM_DQS1_GPIO_PORT GPIOO
#define XSPI_RAM_DQS1_PIN_AF GPIO_AF9_XSPIM_P1
/* XSPI_CS */
#define XSPI_RAM_CS_PIN GPIO_PIN_0
#define XSPI_RAM_CS_GPIO_PORT GPIOO
#define XSPI_RAM_CS_PIN_AF GPIO_AF9_XSPIM_P1
/* XSPI_D0 */
#define XSPI_RAM_D0_PIN GPIO_PIN_0
#define XSPI_RAM_D0_GPIO_PORT GPIOP
#define XSPI_RAM_D0_PIN_AF GPIO_AF9_XSPIM_P1
/* XSPI_D1 */
#define XSPI_RAM_D1_PIN GPIO_PIN_1
#define XSPI_RAM_D1_GPIO_PORT GPIOP
#define XSPI_RAM_D1_PIN_AF GPIO_AF9_XSPIM_P1
/* XSPI_D2 */
#define XSPI_RAM_D2_PIN GPIO_PIN_2
#define XSPI_RAM_D2_GPIO_PORT GPIOP
#define XSPI_RAM_D2_PIN_AF GPIO_AF9_XSPIM_P1
/* XSPI_D3 */
#define XSPI_RAM_D3_PIN GPIO_PIN_3
#define XSPI_RAM_D3_GPIO_PORT GPIOP
#define XSPI_RAM_D3_PIN_AF GPIO_AF9_XSPIM_P1
/* XSPI_D4 */
#define XSPI_RAM_D4_PIN GPIO_PIN_4
#define XSPI_RAM_D4_GPIO_PORT GPIOP
#define XSPI_RAM_D4_PIN_AF GPIO_AF9_XSPIM_P1
/* XSPI_D5 */
#define XSPI_RAM_D5_PIN GPIO_PIN_5
#define XSPI_RAM_D5_GPIO_PORT GPIOP
#define XSPI_RAM_D5_PIN_AF GPIO_AF9_XSPIM_P1
/* XSPI_D6 */
#define XSPI_RAM_D6_PIN GPIO_PIN_6
#define XSPI_RAM_D6_GPIO_PORT GPIOP
#define XSPI_RAM_D6_PIN_AF GPIO_AF9_XSPIM_P1
/* XSPI_D7 */
#define XSPI_RAM_D7_PIN GPIO_PIN_7
#define XSPI_RAM_D7_GPIO_PORT GPIOP
#define XSPI_RAM_D7_PIN_AF GPIO_AF9_XSPIM_P1
/* XSPI_D8 */
#define XSPI_RAM_D8_PIN GPIO_PIN_8
#define XSPI_RAM_D8_GPIO_PORT GPIOP
#define XSPI_RAM_D8_PIN_AF GPIO_AF9_XSPIM_P1
/* XSPI_D9 */
#define XSPI_RAM_D9_PIN GPIO_PIN_9
#define XSPI_RAM_D9_GPIO_PORT GPIOP
#define XSPI_RAM_D9_PIN_AF GPIO_AF9_XSPIM_P1
/* XSPI_D10 */
#define XSPI_RAM_D10_PIN GPIO_PIN_10
#define XSPI_RAM_D10_GPIO_PORT GPIOP
#define XSPI_RAM_D10_PIN_AF GPIO_AF9_XSPIM_P1
/* XSPI_D11 */
#define XSPI_RAM_D11_PIN GPIO_PIN_11
#define XSPI_RAM_D11_GPIO_PORT GPIOP
#define XSPI_RAM_D11_PIN_AF GPIO_AF9_XSPIM_P1
/* XSPI_D12 */
#define XSPI_RAM_D12_PIN GPIO_PIN_12
#define XSPI_RAM_D12_GPIO_PORT GPIOP
#define XSPI_RAM_D12_PIN_AF GPIO_AF9_XSPIM_P1
/* XSPI_D13 */
#define XSPI_RAM_D13_PIN GPIO_PIN_13
#define XSPI_RAM_D13_GPIO_PORT GPIOP
#define XSPI_RAM_D13_PIN_AF GPIO_AF9_XSPIM_P1
/* XSPI_D14 */
#define XSPI_RAM_D14_PIN GPIO_PIN_14
#define XSPI_RAM_D14_GPIO_PORT GPIOP
#define XSPI_RAM_D14_PIN_AF GPIO_AF9_XSPIM_P1
/* XSPI_D15 */
#define XSPI_RAM_D15_PIN GPIO_PIN_15
#define XSPI_RAM_D15_GPIO_PORT GPIOP
#define XSPI_RAM_D15_PIN_AF GPIO_AF9_XSPIM_P1
#endif /* USE_RAM_MEMORY_APS256XX */
/**
* @}
*/
#if (USE_NOR_MEMORY_MX66UW1G45G == 1)
/** @defgroup STM32H7S78_DK_XSPI_NOR_Exported_Constants XSPI_NOR Exported Constants
* @{
*/
#define XSPI_NOR_INSTANCES_NUMBER 1U
/* Definition for XSPI modes */
#define BSP_XSPI_NOR_SPI_MODE (BSP_XSPI_NOR_Interface_t)MX66UW1G45G_SPI_MODE /* 1 Cmd, 1 Address and 1 Data Lines */
#define BSP_XSPI_NOR_OPI_MODE (BSP_XSPI_NOR_Interface_t)MX66UW1G45G_OPI_MODE /* 8 Cmd, 8 Address and 8 Data Lines */
/* Definition for XSPI transfer rates */
#define BSP_XSPI_NOR_STR_TRANSFER (BSP_XSPI_NOR_Transfer_t)MX66UW1G45G_STR_TRANSFER /* Single Transfer Rate */
#define BSP_XSPI_NOR_DTR_TRANSFER (BSP_XSPI_NOR_Transfer_t)MX66UW1G45G_DTR_TRANSFER /* Double Transfer Rate */
/* XSPI erase types */
#define BSP_XSPI_NOR_ERASE_4K MX66UW1G45G_ERASE_4K
#define BSP_XSPI_NOR_ERASE_64K MX66UW1G45G_ERASE_64K
#define BSP_XSPI_NOR_ERASE_CHIP MX66UW1G45G_ERASE_BULK
/* XSPI block sizes */
#define BSP_XSPI_NOR_BLOCK_4K MX66UW1G45G_SUBSECTOR_4K
#define BSP_XSPI_NOR_BLOCK_64K MX66UW1G45G_SECTOR_64K
/**
* @}
*/
#endif /* USE_NOR_MEMORY_MX66UW1G45G */
#if (USE_RAM_MEMORY_APS256XX == 1)
/** @defgroup STM32H7S78_DK_XSPI_RAM_Exported_Constants XSPI_RAM Exported Constants
* @{
*/
#define XSPI_RAM_INSTANCES_NUMBER 1U
/* XSPI Read Latency Code */
#define BSP_XSPI_RAM_READ_LATENCY_3 (BSP_XSPI_RAM_ReadLatencyCode_t)APS256XX_READ_LATENCY_3
#define BSP_XSPI_RAM_READ_LATENCY_4 (BSP_XSPI_RAM_ReadLatencyCode_t)APS256XX_READ_LATENCY_4
#define BSP_XSPI_RAM_READ_LATENCY_5 (BSP_XSPI_RAM_ReadLatencyCode_t)APS256XX_READ_LATENCY_5
#define BSP_XSPI_RAM_READ_LATENCY_6 (BSP_XSPI_RAM_ReadLatencyCode_t)APS256XX_READ_LATENCY_6
#define BSP_XSPI_RAM_READ_LATENCY_7 (BSP_XSPI_RAM_ReadLatencyCode_t)APS256XX_READ_LATENCY_7
/* XSPI Write Latency Code */
#define BSP_XSPI_RAM_WRITE_LATENCY_3 (BSP_XSPI_RAM_WriteLatencyCode_t)APS256XX_WRITE_LATENCY_3
#define BSP_XSPI_RAM_WRITE_LATENCY_4 (BSP_XSPI_RAM_WriteLatencyCode_t)APS256XX_WRITE_LATENCY_4
#define BSP_XSPI_RAM_WRITE_LATENCY_5 (BSP_XSPI_RAM_WriteLatencyCode_t)APS256XX_WRITE_LATENCY_5
#define BSP_XSPI_RAM_WRITE_LATENCY_6 (BSP_XSPI_RAM_WriteLatencyCode_t)APS256XX_WRITE_LATENCY_6
#define BSP_XSPI_RAM_WRITE_LATENCY_7 (BSP_XSPI_RAM_WriteLatencyCode_t)APS256XX_WRITE_LATENCY_7
/* DMA definitions for XSPI RAM DMA transfer */
#define XSPI_RAM_DMAx_CLK_ENABLE __HAL_RCC_HPDMA1_CLK_ENABLE
#define XSPI_RAM_DMAx_CLK_DISABLE __HAL_RCC_HPDMA1_CLK_DISABLE
#define XSPI_RAM_DMAx_RX_CHANNEL HPDMA1_Channel12
#define XSPI_RAM_DMAx_RX_IRQn HPDMA1_Channel12_IRQn
#define XPSI_RAM_DMAx_RX_IRQHandler HPDMA1_Channel12_IRQHandler
#define XSPI_RAM_DMAx_TX_CHANNEL HPDMA1_Channel11
#define XSPI_RAM_DMAx_TX_IRQn HPDMA1_Channel11_IRQn
#define XPSI_RAM_DMAx_TX_IRQHandler HPDMA1_Channel11_IRQHandler
#define XPSI_RAM_DMAx_Request HPDMA1_REQUEST_XSPI1
/**
* @}
*/
#endif /* USE_RAM_MEMORY_APS256XX */
/* Exported variables --------------------------------------------------------*/
#if (USE_NOR_MEMORY_MX66UW1G45G == 1)
/** @defgroup STM32H7S78_DK_XSPI_NOR_Exported_Variables XSPI_NOR Exported Variables
* @{
*/
extern XSPI_HandleTypeDef hxspi_nor[XSPI_NOR_INSTANCES_NUMBER];
extern XSPI_NOR_Ctx_t XSPI_Nor_Ctx[XSPI_NOR_INSTANCES_NUMBER];
/**
* @}
*/
#endif /* USE_NOR_MEMORY_MX66UW1G45G */
#if (USE_RAM_MEMORY_APS256XX == 1)
/** @defgroup STM32H7S78_DK_XSPI_RAM_Exported_Variables XSPI_RAM Exported Variables
* @{
*/
extern XSPI_HandleTypeDef hxspi_ram[XSPI_RAM_INSTANCES_NUMBER];
extern XSPI_RAM_Ctx_t XSPI_Ram_Ctx[XSPI_RAM_INSTANCES_NUMBER];
/**
* @}
*/
#endif /* USE_RAM_MEMORY_APS256XX */
/* Exported functions --------------------------------------------------------*/
#if (USE_NOR_MEMORY_MX66UW1G45G == 1)
/** @defgroup STM32H7S78_DK_XSPI_NOR_Exported_Functions XSPI_NOR Exported Functions
* @{
*/
int32_t BSP_XSPI_NOR_Init(uint32_t Instance, BSP_XSPI_NOR_Init_t *Init);
int32_t BSP_XSPI_NOR_DeInit(uint32_t Instance);
#if (USE_HAL_XSPI_REGISTER_CALLBACKS == 1)
int32_t BSP_XSPI_NOR_RegisterMspCallbacks(uint32_t Instance, BSP_XSPI_Cb_t *CallBacks);
int32_t BSP_XSPI_NOR_RegisterDefaultMspCallbacks(uint32_t Instance);
#endif /* (USE_HAL_XSPI_REGISTER_CALLBACKS == 1) */
int32_t BSP_XSPI_NOR_Read(uint32_t Instance, uint8_t *pData, uint32_t ReadAddr, uint32_t Size);
int32_t BSP_XSPI_NOR_Write(uint32_t Instance, const uint8_t *pData, uint32_t WriteAddr, uint32_t Size);
int32_t BSP_XSPI_NOR_Erase_Block(uint32_t Instance, uint32_t BlockAddress, BSP_XSPI_NOR_Erase_t BlockSize);
int32_t BSP_XSPI_NOR_Erase_Chip(uint32_t Instance);
int32_t BSP_XSPI_NOR_GetStatus(uint32_t Instance);
int32_t BSP_XSPI_NOR_GetInfo(uint32_t Instance, BSP_XSPI_NOR_Info_t *pInfo);
int32_t BSP_XSPI_NOR_EnableMemoryMappedMode(uint32_t Instance);
int32_t BSP_XSPI_NOR_DisableMemoryMappedMode(uint32_t Instance);
int32_t BSP_XSPI_NOR_ReadID(uint32_t Instance, uint8_t *Id);
int32_t BSP_XSPI_NOR_ConfigFlash(uint32_t Instance, BSP_XSPI_NOR_Interface_t Mode, BSP_XSPI_NOR_Transfer_t Rate);
int32_t BSP_XSPI_NOR_SuspendErase(uint32_t Instance);
int32_t BSP_XSPI_NOR_ResumeErase(uint32_t Instance);
int32_t BSP_XSPI_NOR_EnterDeepPowerDown(uint32_t Instance);
int32_t BSP_XSPI_NOR_LeaveDeepPowerDown(uint32_t Instance);
/**
* @}
*/
#endif /* USE_NOR_MEMORY_MX66UW1G45G */
#if (USE_RAM_MEMORY_APS256XX == 1)
/** @defgroup STM32H7S78_DK_XSPI_RAM_Exported_Functions XSPI_RAM Exported Functions
* @{
*/
int32_t BSP_XSPI_RAM_Init(uint32_t Instance, BSP_XSPI_RAM_Cfg_t *Init);
int32_t BSP_XSPI_RAM_DeInit(uint32_t Instance);
#if (USE_HAL_XSPI_REGISTER_CALLBACKS == 1)
int32_t BSP_XSPI_RAM_RegisterMspCallbacks(uint32_t Instance, BSP_XSPI_Cb_t *CallBacks);
int32_t BSP_XSPI_RAM_RegisterDefaultMspCallbacks(uint32_t Instance);
#endif /* (USE_HAL_XSPI_REGISTER_CALLBACKS == 1) */
int32_t BSP_XSPI_RAM_Read(uint32_t Instance, uint8_t *pData, uint32_t ReadAddr, uint32_t Size);
int32_t BSP_XSPI_RAM_Read_DMA(uint32_t Instance, uint8_t *pData, uint32_t ReadAddr, uint32_t Size);
int32_t BSP_XSPI_RAM_Write(uint32_t Instance, uint8_t *pData, uint32_t WriteAddr, uint32_t Size);
int32_t BSP_XSPI_RAM_Write_DMA(uint32_t Instance, uint8_t *pData, uint32_t WriteAddr, uint32_t Size);
int32_t BSP_XSPI_RAM_EnableMemoryMappedMode(uint32_t Instance);
int32_t BSP_XSPI_RAM_DisableMemoryMappedMode(uint32_t Instance);
int32_t BSP_XSPI_RAM_ReadID(uint32_t Instance, uint8_t *Id);
int32_t BSP_XSPI_RAM_Config16BitsOctalRAM(uint32_t Instance, BSP_XSPI_RAM_Cfg_t *Cfg);
void BSP_XSPI_RAM_DMA_RX_IRQHandler(uint32_t Instance);
void BSP_XSPI_RAM_DMA_TX_IRQHandler(uint32_t Instance);
void BSP_XSPI_RAM_IRQHandler(uint32_t Instance);
/**
* @}
*/
#endif /* USE_RAM_MEMORY_APS256XX */
/** @defgroup STM32H7S78_DK_XSPI_Exported_Init_Functions XSPI_Init Exported Functions
* @{
*/
/* These functions can be modified in case the current settings
need to be changed for specific application needs */
#if (USE_NOR_MEMORY_MX66UW1G45G == 1)
HAL_StatusTypeDef MX_XSPI_NOR_Init(XSPI_HandleTypeDef *hxspi, MX_XSPI_InitTypeDef *Init);
#endif /* USE_NOR_MEMORY_MX66UW1G45G */
#if (USE_RAM_MEMORY_APS256XX == 1)
HAL_StatusTypeDef MX_XSPI_RAM_Init(XSPI_HandleTypeDef *hxspi, MX_XSPI_InitTypeDef *Init);
#endif /* USE_RAM_MEMORY_APS256XX */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* STM32H7S78_DISCOVERY_XSPI_H */