ajout BLE
This commit is contained in:
1 parent
66bb319423
commit
3757975e51
48 files changed
+293826
-284536
No files matched your search
@@ -37,12 +37,30 @@
|
||||
#include "main.h"
|
||||
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* Noms de broches : les etiquettes CubeMX du projet sont ST67_CHIP_EN, SPI4_CS ; le driver attend
|
||||
* CHIP_EN et SPI_CS (SPI_RDY est deja identique). Ces alias survivent a la regeneration. */
|
||||
#ifndef CHIP_EN_Pin
|
||||
#define CHIP_EN_Pin ST67_CHIP_EN_Pin
|
||||
#define CHIP_EN_GPIO_Port ST67_CHIP_EN_GPIO_Port
|
||||
#endif
|
||||
#ifndef SPI_CS_Pin
|
||||
#define SPI_CS_Pin SPI4_CS_Pin
|
||||
#define SPI_CS_GPIO_Port SPI4_CS_GPIO_Port
|
||||
#endif
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Global variables ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN GV */
|
||||
|
||||
/* Le DMA du SPI ne sait ni lire ni ecrire la DTCM, or les tampons du driver viennent du tas FreeRTOS
|
||||
* place en DTCM (cf. Appli/stm32h7rsxx_RAMxspi1_ROMxspi2.ld) : le canal DMA sortait en erreur de
|
||||
* transfert (HAL_DMA_ERROR_TE) des que le module envoyait plus que l'en-tete. Les transferts DMA
|
||||
* passent donc par deux tampons de rebond en RAM_CMD (non cachee, region MPU 6), recopies a la
|
||||
* volee. Taille : W61_MAX_SPI_XFER + en-tete SPI + alignement. */
|
||||
#define DMA_BOUNCE_SIZE 1536U
|
||||
static uint8_t dma_tx_bounce[DMA_BOUNCE_SIZE] __attribute__((section("noncacheable_buffer"), aligned(32)));
|
||||
static uint8_t dma_rx_bounce[DMA_BOUNCE_SIZE] __attribute__((section("noncacheable_buffer"), aligned(32)));
|
||||
static void * volatile dma_rx_dest; /* tampon final du transfert de reception en cours */
|
||||
static volatile uint16_t dma_rx_len;
|
||||
/* USER CODE END GV */
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
@@ -145,7 +163,35 @@ void *spi_port_memcpy(void *dest, const void *src, unsigned int len)
|
||||
int32_t spi_port_init(spi_transaction_complete_t transaction_complete_cb)
|
||||
{
|
||||
/* USER CODE BEGIN spi_port_init_1 */
|
||||
/* Le driver traite CS comme actif a l'etat haut (spi_port_set_cs(1) = niveau haut). Au repos il
|
||||
* doit donc etre bas, avant meme d'alimenter le module (CubeMX le laisse haut par defaut). */
|
||||
HAL_GPIO_WritePin(SPI_CS_GPIO_Port, SPI_CS_Pin, GPIO_PIN_RESET);
|
||||
|
||||
/* CubeMX configure SCK/MOSI du SPI4 en vitesse LOW (front lent) alors que le bus tourne a
|
||||
* ~19 Mbit/s : les fronts deformes corrompent l'en-tete (magic 0x5501 au lieu de 0x55AA).
|
||||
* Vitesse tres haute pour PE12 (SCK), PE13 (MISO) et PE14 (MOSI). */
|
||||
GPIO_InitTypeDef spi_gpio = {0};
|
||||
spi_gpio.Pin = GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_14;
|
||||
spi_gpio.Mode = GPIO_MODE_AF_PP;
|
||||
spi_gpio.Pull = GPIO_NOPULL;
|
||||
spi_gpio.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
|
||||
spi_gpio.Alternate = GPIO_AF5_SPI4;
|
||||
HAL_GPIO_Init(GPIOE, &spi_gpio);
|
||||
|
||||
/* CubeMX genere les DMA de SPI4 avec adresse memoire FIXE (RX: DestInc, TX: SrcInc) : tous les
|
||||
* octets recus sont ecrits au meme endroit. A cocher dans CubeMX (SPI4 > DMA Settings >
|
||||
* "Increment Address" cote memoire) ; en attendant on corrige ici. */
|
||||
extern DMA_HandleTypeDef handle_GPDMA1_Channel4, handle_GPDMA1_Channel5;
|
||||
handle_GPDMA1_Channel4.Init.DestInc = DMA_DINC_INCREMENTED; /* SPI4_RX */
|
||||
handle_GPDMA1_Channel5.Init.SrcInc = DMA_SINC_INCREMENTED; /* SPI4_TX */
|
||||
if ((HAL_DMA_Init(&handle_GPDMA1_Channel4) != HAL_OK) || (HAL_DMA_Init(&handle_GPDMA1_Channel5) != HAL_OK))
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* Le bus est instable a ~19 Mbit/s (en-tetes decales d'un bit, donnees nulles) : on ralentit.
|
||||
* Reglage equivalent dans CubeMX : SPI4 > Baud Rate Prescaler (regenere ensuite sans effet ici). */
|
||||
__HAL_SPI_DISABLE(&NCP_SPI_HANDLE);
|
||||
MODIFY_REG(NCP_SPI_HANDLE.Instance->CFG1, SPI_CFG1_MBR, SPI_BAUDRATEPRESCALER_16);
|
||||
/* USER CODE END spi_port_init_1 */
|
||||
if (NCP_SPI_HANDLE.State == HAL_SPI_STATE_RESET)
|
||||
{
|
||||
@@ -221,8 +267,7 @@ int32_t spi_port_transfer(void *tx_buf, void *rx_buf, uint16_t len, uint32_t tim
|
||||
status = HAL_SPI_TransmitReceive(&NCP_SPI_HANDLE, tx_dummy, rx_buf, len, timeout);
|
||||
}
|
||||
/* USER CODE BEGIN spi_port_transfer_2 */
|
||||
|
||||
/* USER CODE END spi_port_transfer_2 */
|
||||
/* USER CODE END spi_port_transfer_2 */
|
||||
|
||||
return ((status == HAL_OK) ? 0 : -1);
|
||||
/* USER CODE BEGIN spi_port_transfer_End */
|
||||
@@ -254,14 +299,27 @@ int32_t spi_port_transfer_dma(void *tx_buf, void *rx_buf, uint16_t len)
|
||||
SCB_CleanDCache_by_Addr(tx_buf, len);
|
||||
#endif /* __DCACHE_PRESENT */
|
||||
/* USER CODE BEGIN spi_port_transfer_dma_trx */
|
||||
status = HAL_SPI_TransmitReceive_DMA(&NCP_SPI_HANDLE, tx_buf, rx_buf, len);
|
||||
/* USER CODE END spi_port_transfer_dma_trx */
|
||||
if (len > DMA_BOUNCE_SIZE)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
(void)memcpy(dma_tx_bounce, tx_buf, len);
|
||||
dma_rx_dest = rx_buf;
|
||||
dma_rx_len = len;
|
||||
status = HAL_SPI_TransmitReceive_DMA(&NCP_SPI_HANDLE, dma_tx_bounce, dma_rx_bounce, len);
|
||||
/* USER CODE END spi_port_transfer_dma_trx */
|
||||
}
|
||||
else
|
||||
{
|
||||
/* USER CODE BEGIN spi_port_transfer_dma_rx */
|
||||
status = HAL_SPI_Receive_DMA(&NCP_SPI_HANDLE, rx_buf, len);
|
||||
/* USER CODE END spi_port_transfer_dma_rx */
|
||||
if (len > DMA_BOUNCE_SIZE)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
dma_rx_dest = rx_buf;
|
||||
dma_rx_len = len;
|
||||
status = HAL_SPI_Receive_DMA(&NCP_SPI_HANDLE, dma_rx_bounce, len);
|
||||
/* USER CODE END spi_port_transfer_dma_rx */
|
||||
}
|
||||
/* USER CODE BEGIN spi_port_transfer_dma_2 */
|
||||
|
||||
@@ -314,7 +372,15 @@ int32_t spi_port_set_cs(int32_t state)
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN FD */
|
||||
|
||||
/* Recopie la reception DMA du tampon de rebond vers le tampon du driver, avant de signaler la fin. */
|
||||
static void spi_port_dma_rx_copyback(SPI_HandleTypeDef *hspi)
|
||||
{
|
||||
if (hspi == &NCP_SPI_HANDLE && dma_rx_dest != NULL)
|
||||
{
|
||||
(void)memcpy(dma_rx_dest, dma_rx_bounce, dma_rx_len);
|
||||
dma_rx_dest = NULL;
|
||||
}
|
||||
}
|
||||
/* USER CODE END FD */
|
||||
|
||||
/* Weak functions redefinition -----------------------------------------------*/
|
||||
@@ -335,8 +401,8 @@ void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
|
||||
void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
|
||||
{
|
||||
/* USER CODE BEGIN HAL_SPI_RxCpltCallback_1 */
|
||||
|
||||
/* USER CODE END HAL_SPI_RxCpltCallback_1 */
|
||||
spi_port_dma_rx_copyback(hspi);
|
||||
/* USER CODE END HAL_SPI_RxCpltCallback_1 */
|
||||
if (hspi == &NCP_SPI_HANDLE)
|
||||
{
|
||||
spi_port_transaction_complete_cb();
|
||||
@@ -349,8 +415,8 @@ void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
|
||||
void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
|
||||
{
|
||||
/* USER CODE BEGIN HAL_SPI_TxRxCpltCallback_1 */
|
||||
|
||||
/* USER CODE END HAL_SPI_TxRxCpltCallback_1 */
|
||||
spi_port_dma_rx_copyback(hspi);
|
||||
/* USER CODE END HAL_SPI_TxRxCpltCallback_1 */
|
||||
if (hspi == &NCP_SPI_HANDLE)
|
||||
{
|
||||
spi_port_transaction_complete_cb();
|
||||
|
||||
Reference in new issue
Block a user