CubeMX: SPI4 + SDMMC1/FatFs + I2S6, audio BSP et debug VS Code (Linux)
Regeneration CubeMX (Appli) preparant le driver ST67W611M1 et la carte SD : - SPI4 (PE12/13/14, CS PF8) + DMA GPDMA1 canaux 4/5, SPI_RDY (PD12/EXTI12), CHIP_EN (PD13) et BOOT (PD15) pour la X-NUCLEO-67W61M1 sur l'Arduino - SDMMC1 + FatFs (appels d'init non generes dans main, IRQ SDMMC1 prio 14), PM14 en open-drain ; I2S6_CK sur PA5 pour liberer PC12 (SDMMC1_CK) - HAL UART retire ; USE_BSP_COM_FEATURE=0 - Audio preserve : ADF 4/16/24, prio IRQ 2, DMA canal 0 en priorite haute, GPDMA1_Channel2_IRQHandler deplace dans audio_irq.c (hors fichiers generes), BSP_MX_I2S6_Init (renommage dans le BSP pour eviter le conflit avec CubeMX) - Middlewares/ST/ST67W6X_Network_Driver, FatFs et sources HAL SPI/SD ajoutes (driver ST67 pas encore integre au build) Build et debug sous Linux : - gcc/toolchain-env.sh, gdbserver.sh, arm-gdb.sh : outils de STM32CubeIDE par glob ; flash.sh les retrouve ; ruby_compat.rb pour Ruby >= 3.2 (TouchGFX) - makefile_appli : sources SD/SPI/FatFs/audio_irq ; chmod +x des .out TouchGFX - Objets de build (*.o, *.d, *.su) retires de l'index (deja dans .gitignore) - AGENTS.md : toolchain Linux, configs VS Code (cppdbg et ST stlinkgdbtarget), pieges de l'extension ST (.settings/ide.store.json, preRunCommands reset) Verifie sur carte : audio OK, debug Appli/Boot OK. Co-Authored-By: Claude Sonnet 5.5 <noreply@anthropic.com>
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/**
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******************************************************************************
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* @file stm32h7rsxx_hal_i2s_ex.c
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* @author MCD Application Team
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* @brief I2S HAL module driver.
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* This file provides firmware functions to manage the following
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* functionalities of I2S extension peripheral:
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* + Extension features Functions
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2022 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/**
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******************************************************************************
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===== I2S FULL DUPLEX FEATURE =====
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I2S Full Duplex APIs are available in stm32h7rsxx_hal_i2s.c/.h
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******************************************************************************
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*/
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/**
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******************************************************************************
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* @file stm32h7rsxx_hal_sd_ex.c
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* @author MCD Application Team
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* @brief SD card Extended HAL module driver.
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* This file provides firmware functions to manage the following
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* functionalities of the Secure Digital (SD) peripheral:
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* + Extended features functions
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*
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******************************************************************************
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* @attention
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*
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||||
* Copyright (c) 2022 STMicroelectronics.
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* All rights reserved.
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*
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||||
* This software is licensed under terms that can be found in the LICENSE file
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||||
* in the root directory of this software component.
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||||
* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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@verbatim
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==============================================================================
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##### How to use this driver #####
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==============================================================================
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[..]
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The SD Extension HAL driver can be used as follows:
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(+) Configure Buffer0 and Buffer1 start address and Buffer size using HAL_SDEx_ConfigDMAMultiBuffer() function.
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(+) Start Read and Write for multibuffer mode using HAL_SDEx_ReadBlocksDMAMultiBuffer()
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and HAL_SDEx_WriteBlocksDMAMultiBuffer() functions.
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@endverbatim
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32h7rsxx_hal.h"
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/** @addtogroup STM32H7RSxx_HAL_Driver
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* @{
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*/
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/** @defgroup SDEx SDEx
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* @brief SD Extended HAL module driver
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* @{
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*/
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#if defined (SDMMC1) || defined (SDMMC2)
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#ifdef HAL_SD_MODULE_ENABLED
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Private functions ---------------------------------------------------------*/
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/* Exported functions --------------------------------------------------------*/
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/** @addtogroup SDEx_Exported_Functions
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* @{
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*/
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/** @addtogroup SDEx_Exported_Functions_Group1
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* @brief Linked List management functions
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*
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@verbatim
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===============================================================================
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##### Linked List management functions #####
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===============================================================================
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[..]
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This subsection provides a set of functions allowing to manage the needed functions.
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@endverbatim
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* @{
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*/
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/**
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* @brief Build Linked List node.
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* @param pNode: Pointer to new node to add.
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* @param pNodeConf: Pointer to configuration parameters for new node to add.
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_SDEx_DMALinkedList_BuildNode(SD_DMALinkNodeTypeDef *pNode, SD_DMALinkNodeConfTypeDef *pNodeConf)
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{
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(void)SDMMC_DMALinkedList_BuildNode(pNode, pNodeConf);
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return (HAL_OK);
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}
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/**
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* @brief Insert new Linked List node.
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* @param pLinkedList: Pointer to the linkedlist that contains transfer nodes
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* @param pPrevNode: Pointer to previous node.
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* @param pNewNode: Pointer to new node to insert.
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_SDEx_DMALinkedList_InsertNode(SD_DMALinkedListTypeDef *pLinkedList,
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SD_DMALinkNodeTypeDef *pPrevNode, SD_DMALinkNodeTypeDef *pNewNode)
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{
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(void)SDMMC_DMALinkedList_InsertNode(pLinkedList, pPrevNode, pNewNode);
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return (HAL_OK);
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}
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/**
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* @brief Remove Linked List node.
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* @param pLinkedList: Pointer to the linkedlist that contains transfer nodes
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* @param pNode: Pointer to node to remove.
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_SDEx_DMALinkedList_RemoveNode(SD_DMALinkedListTypeDef *pLinkedList, SD_DMALinkNodeTypeDef *pNode)
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{
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if (SDMMC_DMALinkedList_RemoveNode(pLinkedList, pNode) != SDMMC_ERROR_NONE)
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{
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return HAL_ERROR;
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}
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else
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{
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return HAL_OK;
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}
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}
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/**
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* @brief Lock Linked List node.
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* @param pNode: Pointer to node to remove.
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_SDEx_DMALinkedList_LockNode(SD_DMALinkNodeTypeDef *pNode)
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{
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if (SDMMC_DMALinkedList_LockNode(pNode) != SDMMC_ERROR_NONE)
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{
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return HAL_ERROR;
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}
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else
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{
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return HAL_OK;
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}
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}
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/**
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* @brief Unlock Linked List node.
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* @param pNode: Pointer to node to remove.
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_SDEx_DMALinkedList_UnlockNode(SD_DMALinkNodeTypeDef *pNode)
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{
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if (SDMMC_DMALinkedList_UnlockNode(pNode) != SDMMC_ERROR_NONE)
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{
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return HAL_ERROR;
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}
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else
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{
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return HAL_OK;
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}
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}
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/**
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* @brief Enable Circular mode for DMA Linked List.
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* @param pLinkedList: Pointer to the linkedlist that contains transfer nodes
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_SDEx_DMALinkedList_EnableCircularMode(SD_DMALinkedListTypeDef *pLinkedList)
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{
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(void)SDMMC_DMALinkedList_EnableCircularMode(pLinkedList);
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return HAL_OK;
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}
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/**
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* @brief Disable Circular mode for DMA Linked List.
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* @param pLinkedList: Pointer to the linkedlist that contains transfer nodes
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_SDEx_DMALinkedList_DisableCircularMode(SD_DMALinkedListTypeDef *pLinkedList)
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{
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(void)SDMMC_DMALinkedList_DisableCircularMode(pLinkedList);
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return HAL_OK;
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}
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/**
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* @brief Reads block(s) from a specified address in a card. The received Data will be stored in linked list buffers.
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* linked list should be prepared before call this function .
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* @param hsd: SD handle
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* @param pLinkedList: pointer to first linked list node
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* @param BlockAdd: Block Address from where data is to be read
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* @param NumberOfBlocks: Total number of blocks to read
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_SDEx_DMALinkedList_ReadBlocks(SD_HandleTypeDef *hsd,
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const SDMMC_DMALinkedListTypeDef *pLinkedList,
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uint32_t BlockAdd, uint32_t NumberOfBlocks)
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{
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SDMMC_DataInitTypeDef config;
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uint32_t errorstate;
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uint32_t DmaBase0_reg;
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uint32_t DmaBase1_reg;
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uint32_t add = BlockAdd;
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if (hsd->State == HAL_SD_STATE_READY)
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{
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if ((add + NumberOfBlocks) > (hsd->SdCard.LogBlockNbr))
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{
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hsd->ErrorCode |= HAL_SD_ERROR_ADDR_OUT_OF_RANGE;
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return HAL_ERROR;
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}
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hsd->Instance->IDMABASER = (uint32_t) pLinkedList->pHeadNode->IDMABASER;
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hsd->Instance->IDMABSIZE = (uint32_t) pLinkedList->pHeadNode->IDMABSIZE;
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hsd->Instance->IDMABAR = (uint32_t) pLinkedList->pHeadNode;
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hsd->Instance->IDMALAR = (uint32_t) SDMMC_IDMALAR_ABR | SDMMC_IDMALAR_ULS | SDMMC_IDMALAR_ULA |
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sizeof(SDMMC_DMALinkNodeTypeDef) ; /* Initial configuration */
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DmaBase0_reg = hsd->Instance->IDMABASER;
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DmaBase1_reg = hsd->Instance->IDMABAR;
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if ((hsd->Instance->IDMABSIZE == 0U) || (DmaBase0_reg == 0U) || (DmaBase1_reg == 0U))
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{
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hsd->ErrorCode = HAL_SD_ERROR_ADDR_OUT_OF_RANGE;
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return HAL_ERROR;
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}
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/* Initialize data control register */
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hsd->Instance->DCTRL = 0;
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/* Clear old Flags*/
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__HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_DATA_FLAGS);
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hsd->ErrorCode = HAL_SD_ERROR_NONE;
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hsd->State = HAL_SD_STATE_BUSY;
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if (hsd->SdCard.CardType != CARD_SDHC_SDXC)
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{
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add *= 512U;
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}
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/* Configure the SD DPSM (Data Path State Machine) */
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config.DataTimeOut = SDMMC_DATATIMEOUT;
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config.DataLength = BLOCKSIZE * NumberOfBlocks;
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config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B;
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config.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC;
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config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK;
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config.DPSM = SDMMC_DPSM_DISABLE;
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(void)SDMMC_ConfigData(hsd->Instance, &config);
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hsd->Instance->DCTRL |= SDMMC_DCTRL_FIFORST;
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__SDMMC_CMDTRANS_ENABLE(hsd->Instance);
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hsd->Instance->IDMACTRL = SDMMC_ENABLE_IDMA_DOUBLE_BUFF0;
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/* Read Blocks in DMA mode */
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hsd->Context = (SD_CONTEXT_READ_MULTIPLE_BLOCK | SD_CONTEXT_DMA);
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/* Read Multi Block command */
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errorstate = SDMMC_CmdReadMultiBlock(hsd->Instance, add);
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if (errorstate != HAL_SD_ERROR_NONE)
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{
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hsd->State = HAL_SD_STATE_READY;
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hsd->ErrorCode |= errorstate;
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return HAL_ERROR;
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}
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__HAL_SD_ENABLE_IT(hsd, (SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | SDMMC_IT_RXOVERR | SDMMC_IT_DATAEND |
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SDMMC_IT_IDMABTC));
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return HAL_OK;
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}
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else
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{
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return HAL_BUSY;
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}
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}
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|
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/**
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* @brief Write block(s) to a specified address in a card. The transferred Data are stored linked list nodes buffers .
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* linked list should be prepared before call this function .
|
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* @param hsd: SD handle
|
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* @param pLinkedList: pointer to first linked list node
|
||||
* @param BlockAdd: Block Address from where data is to be read
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* @param NumberOfBlocks: Total number of blocks to read
|
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* @retval HAL status
|
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*/
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HAL_StatusTypeDef HAL_SDEx_DMALinkedList_WriteBlocks(SD_HandleTypeDef *hsd,
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const SDMMC_DMALinkedListTypeDef *pLinkedList,
|
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uint32_t BlockAdd, uint32_t NumberOfBlocks)
|
||||
|
||||
{
|
||||
SDMMC_DataInitTypeDef config;
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uint32_t errorstate;
|
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uint32_t DmaBase0_reg;
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uint32_t DmaBase1_reg;
|
||||
uint32_t add = BlockAdd;
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||||
|
||||
if (hsd->State == HAL_SD_STATE_READY)
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{
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if ((add + NumberOfBlocks) > (hsd->SdCard.LogBlockNbr))
|
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{
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||||
hsd->ErrorCode |= HAL_SD_ERROR_ADDR_OUT_OF_RANGE;
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return HAL_ERROR;
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}
|
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|
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hsd->Instance->IDMABASER = (uint32_t) pLinkedList->pHeadNode->IDMABASER;
|
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hsd->Instance->IDMABSIZE = (uint32_t) pLinkedList->pHeadNode->IDMABSIZE;
|
||||
|
||||
hsd->Instance->IDMABAR = (uint32_t) pLinkedList->pHeadNode;
|
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hsd->Instance->IDMALAR = (uint32_t) SDMMC_IDMALAR_ABR | SDMMC_IDMALAR_ULS | SDMMC_IDMALAR_ULA |
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sizeof(SDMMC_DMALinkNodeTypeDef) ; /* Initial configuration */
|
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DmaBase0_reg = hsd->Instance->IDMABASER;
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DmaBase1_reg = hsd->Instance->IDMABAR;
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|
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if ((hsd->Instance->IDMABSIZE == 0U) || (DmaBase0_reg == 0U) || (DmaBase1_reg == 0U))
|
||||
{
|
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hsd->ErrorCode = HAL_SD_ERROR_ADDR_OUT_OF_RANGE;
|
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return HAL_ERROR;
|
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}
|
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|
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/* Initialize data control register */
|
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hsd->Instance->DCTRL = 0;
|
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|
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hsd->ErrorCode = HAL_SD_ERROR_NONE;
|
||||
|
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hsd->State = HAL_SD_STATE_BUSY;
|
||||
|
||||
if (hsd->SdCard.CardType != CARD_SDHC_SDXC)
|
||||
{
|
||||
add *= 512U;
|
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}
|
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|
||||
/* Configure the SD DPSM (Data Path State Machine) */
|
||||
config.DataTimeOut = SDMMC_DATATIMEOUT;
|
||||
config.DataLength = BLOCKSIZE * NumberOfBlocks;
|
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config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B;
|
||||
config.TransferDir = SDMMC_TRANSFER_DIR_TO_CARD;
|
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config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK;
|
||||
config.DPSM = SDMMC_DPSM_DISABLE;
|
||||
(void)SDMMC_ConfigData(hsd->Instance, &config);
|
||||
|
||||
__SDMMC_CMDTRANS_ENABLE(hsd->Instance);
|
||||
|
||||
hsd->Instance->IDMACTRL = SDMMC_ENABLE_IDMA_DOUBLE_BUFF0;
|
||||
|
||||
/* Write Blocks in DMA mode */
|
||||
hsd->Context = (SD_CONTEXT_WRITE_MULTIPLE_BLOCK | SD_CONTEXT_DMA);
|
||||
|
||||
/* Write Multi Block command */
|
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errorstate = SDMMC_CmdWriteMultiBlock(hsd->Instance, add);
|
||||
if (errorstate != HAL_SD_ERROR_NONE)
|
||||
{
|
||||
hsd->State = HAL_SD_STATE_READY;
|
||||
hsd->ErrorCode |= errorstate;
|
||||
return HAL_ERROR;
|
||||
}
|
||||
|
||||
__HAL_SD_ENABLE_IT(hsd, (SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | SDMMC_IT_TXUNDERR | SDMMC_IT_DATAEND |
|
||||
SDMMC_IT_IDMABTC));
|
||||
|
||||
return HAL_OK;
|
||||
}
|
||||
else
|
||||
{
|
||||
return HAL_BUSY;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* HAL_SD_MODULE_ENABLED */
|
||||
#endif /* SDMMC1 || SDMMC2 */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,227 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7rsxx_hal_spi_ex.c
|
||||
* @author MCD Application Team
|
||||
* @brief Extended SPI HAL module driver.
|
||||
* This file provides firmware functions to manage the following
|
||||
* SPI peripheral extended functionalities :
|
||||
* + IO operation functions
|
||||
* + Peripheral Control functions
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7rsxx_hal.h"
|
||||
|
||||
/** @addtogroup STM32H7RSxx_HAL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SPIEx SPIEx
|
||||
* @brief SPI Extended HAL module driver
|
||||
* @{
|
||||
*/
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private defines -----------------------------------------------------------*/
|
||||
/* Private macros ------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/** @defgroup SPIEx_Exported_Functions SPIEx Exported Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup SPIEx_Exported_Functions_Group1 IO operation functions
|
||||
* @brief Data transfers functions
|
||||
*
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### IO operation functions #####
|
||||
===============================================================================
|
||||
[..]
|
||||
This subsection provides a set of extended functions to manage the SPI
|
||||
data transfers.
|
||||
|
||||
(#) SPIEx function:
|
||||
(++) HAL_SPIEx_FlushRxFifo()
|
||||
(++) HAL_SPIEx_EnableLockConfiguration()
|
||||
(++) HAL_SPIEx_ConfigureUnderrun()
|
||||
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Flush the RX fifo.
|
||||
* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
|
||||
* the configuration information for the specified SPI module.
|
||||
* @retval HAL status
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(const SPI_HandleTypeDef *hspi)
|
||||
{
|
||||
uint8_t count = 0;
|
||||
uint32_t itflag = hspi->Instance->SR;
|
||||
__IO uint32_t tmpreg;
|
||||
|
||||
while (((hspi->Instance->SR & SPI_FLAG_FRLVL) != SPI_RX_FIFO_0PACKET) || ((itflag & SPI_FLAG_RXWNE) != 0UL))
|
||||
{
|
||||
count += (uint8_t)4UL;
|
||||
tmpreg = hspi->Instance->RXDR;
|
||||
UNUSED(tmpreg); /* To avoid GCC warning */
|
||||
|
||||
if (IS_SPI_FULL_INSTANCE(hspi->Instance))
|
||||
{
|
||||
if (count > SPI_HIGHEND_FIFO_SIZE)
|
||||
{
|
||||
return HAL_TIMEOUT;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (count > SPI_LOWEND_FIFO_SIZE)
|
||||
{
|
||||
return HAL_TIMEOUT;
|
||||
}
|
||||
}
|
||||
}
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* @brief Enable the Lock for the AF configuration of associated IOs
|
||||
* and write protect the Content of Configuration register 2
|
||||
* when SPI is enabled
|
||||
* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
|
||||
* the configuration information for SPI module.
|
||||
* @retval None
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_SPIEx_EnableLockConfiguration(SPI_HandleTypeDef *hspi)
|
||||
{
|
||||
HAL_StatusTypeDef errorcode = HAL_OK;
|
||||
|
||||
/* Process Locked */
|
||||
__HAL_LOCK(hspi);
|
||||
|
||||
if (hspi->State != HAL_SPI_STATE_READY)
|
||||
{
|
||||
errorcode = HAL_BUSY;
|
||||
hspi->State = HAL_SPI_STATE_READY;
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(hspi);
|
||||
return errorcode;
|
||||
}
|
||||
|
||||
/* Check if the SPI is disabled to edit IOLOCK bit */
|
||||
if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
|
||||
{
|
||||
SET_BIT(hspi->Instance->CR1, SPI_CR1_IOLOCK);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable SPI peripheral */
|
||||
__HAL_SPI_DISABLE(hspi);
|
||||
|
||||
SET_BIT(hspi->Instance->CR1, SPI_CR1_IOLOCK);
|
||||
|
||||
/* Enable SPI peripheral */
|
||||
__HAL_SPI_ENABLE(hspi);
|
||||
}
|
||||
|
||||
hspi->State = HAL_SPI_STATE_READY;
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(hspi);
|
||||
return errorcode;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Configure the UNDERRUN condition and behavior of slave transmitter.
|
||||
* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
|
||||
* the configuration information for SPI module.
|
||||
* @param UnderrunDetection : Detection of underrun condition at slave transmitter
|
||||
* This parameter is not supported in this SPI version.
|
||||
* It is kept in order to not break the compatibility.
|
||||
* @param UnderrunBehaviour : Behavior of slave transmitter at underrun condition
|
||||
* This parameter can be a value of @ref SPI_Underrun_Behaviour.
|
||||
* @retval None
|
||||
*/
|
||||
HAL_StatusTypeDef HAL_SPIEx_ConfigureUnderrun(SPI_HandleTypeDef *hspi, uint32_t UnderrunDetection,
|
||||
uint32_t UnderrunBehaviour)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(UnderrunDetection);
|
||||
|
||||
HAL_StatusTypeDef errorcode = HAL_OK;
|
||||
|
||||
/* Process Locked */
|
||||
__HAL_LOCK(hspi);
|
||||
|
||||
/* Check State and Insure that Underrun configuration is managed only by Salve */
|
||||
if ((hspi->State != HAL_SPI_STATE_READY) || (hspi->Init.Mode != SPI_MODE_SLAVE))
|
||||
{
|
||||
errorcode = HAL_BUSY;
|
||||
hspi->State = HAL_SPI_STATE_READY;
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(hspi);
|
||||
return errorcode;
|
||||
}
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_SPI_UNDERRUN_BEHAVIOUR(UnderrunBehaviour));
|
||||
|
||||
/* Check if the SPI is disabled to edit CFG1 register */
|
||||
if ((hspi->Instance->CR1 & SPI_CR1_SPE) != SPI_CR1_SPE)
|
||||
{
|
||||
/* Configure Underrun fields */
|
||||
MODIFY_REG(hspi->Instance->CFG1, SPI_CFG1_UDRCFG, UnderrunBehaviour);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable SPI peripheral */
|
||||
__HAL_SPI_DISABLE(hspi);
|
||||
|
||||
/* Configure Underrun fields */
|
||||
MODIFY_REG(hspi->Instance->CFG1, SPI_CFG1_UDRCFG, UnderrunBehaviour);
|
||||
|
||||
/* Enable SPI peripheral */
|
||||
__HAL_SPI_ENABLE(hspi);
|
||||
}
|
||||
|
||||
|
||||
hspi->State = HAL_SPI_STATE_READY;
|
||||
/* Process Unlocked */
|
||||
__HAL_UNLOCK(hspi);
|
||||
return errorcode;
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
File diff suppressed because it is too large.
Load diff
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,243 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32h7rsxx_ll_dlyb.c
|
||||
* @author MCD Application Team
|
||||
* @brief DelayBlock Low Layer HAL module driver.
|
||||
*
|
||||
* This file provides firmware functions to manage the following
|
||||
* functionalities of the DelayBlock peripheral:
|
||||
* + input clock frequency
|
||||
* + up to 12 oversampling phases
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2022 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
@verbatim
|
||||
==============================================================================
|
||||
##### DelayBlock peripheral features #####
|
||||
==============================================================================
|
||||
[..] The DelayBlock is used to generate an Output clock which is de-phased from the Input
|
||||
clock. The phase of the Output clock is programmed by FW. The Output clock is then used
|
||||
to clock the receive data in i.e. a SDMMC, OSPI or QSPI interface.
|
||||
The delay is Voltage and Temperature dependent, which may require FW to do re-tuning
|
||||
and recenter the Output clock phase to the receive data.
|
||||
|
||||
[..] The DelayBlock features include the following:
|
||||
(+) Input clock frequency.
|
||||
(+) Up to 12 oversampling phases.
|
||||
|
||||
##### How to use this driver #####
|
||||
==============================================================================
|
||||
[..]
|
||||
This driver is a considered as a driver of service for external devices drivers
|
||||
that interfaces with the DELAY peripheral.
|
||||
The LL_DLYB_SetDelay() function, configure the Delay value configured on SEL and UNIT.
|
||||
The LL_DLYB_GetDelay() function, return the Delay value configured on SEL and UNIT.
|
||||
The LL_DLYB_GetClockPeriod()function, get the clock period.
|
||||
|
||||
|
||||
@endverbatim
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32h7rsxx_hal.h"
|
||||
|
||||
/** @addtogroup STM32H7RSxx_LL_Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @defgroup DLYB_LL DLYB
|
||||
* @brief DLYB LL module driver.
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined(HAL_SD_MODULE_ENABLED)
|
||||
#if defined (DLYB_SDMMC1) || defined (DLYB_SDMMC2)
|
||||
|
||||
/**
|
||||
@cond 0
|
||||
*/
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
#define DLYB_TIMEOUT 0xFFU
|
||||
#define DLYB_LNG_10_0_MASK 0x07FF0000U
|
||||
#define DLYB_LNG_11_10_MASK 0x0C000000U
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
|
||||
/**
|
||||
@endcond
|
||||
*/
|
||||
|
||||
/* Exported functions --------------------------------------------------------*/
|
||||
|
||||
/** @addtogroup DLYB_LL_Exported_Functions
|
||||
* @brief Configuration and control functions
|
||||
*
|
||||
@verbatim
|
||||
===============================================================================
|
||||
##### Control functions #####
|
||||
===============================================================================
|
||||
[..] This section provides functions allowing to
|
||||
(+) Control the DLYB.
|
||||
@endverbatim
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup DLYB_Control_Functions DLYB Control functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Set the Delay value configured on SEL and UNIT.
|
||||
* @param DLYBx: Pointer to DLYB instance.
|
||||
* @param pdlyb_cfg: Pointer to DLYB configuration structure.
|
||||
* @retval An ErrorStatus enumeration value:
|
||||
* - SUCCESS: the Delay value is set.
|
||||
* - ERROR: the Delay value is not set.
|
||||
*/
|
||||
void LL_DLYB_SetDelay(DLYB_TypeDef *DLYBx, const LL_DLYB_CfgTypeDef *pdlyb_cfg)
|
||||
{
|
||||
/* Check the DelayBlock instance */
|
||||
assert_param(IS_DLYB_ALL_INSTANCE(DLYBx));
|
||||
|
||||
/* Enable the length sampling */
|
||||
SET_BIT(DLYBx->CR, DLYB_CR_SEN);
|
||||
|
||||
/* Update the UNIT and SEL field */
|
||||
DLYBx->CFGR = (pdlyb_cfg->PhaseSel) | ((pdlyb_cfg->Units) << DLYB_CFGR_UNIT_Pos);
|
||||
|
||||
/* Disable the length sampling */
|
||||
CLEAR_BIT(DLYBx->CR, DLYB_CR_SEN);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get the Delay value configured on SEL and UNIT.
|
||||
* @param DLYBx: Pointer to DLYB instance.
|
||||
* @param pdlyb_cfg: Pointer to DLYB configuration structure.
|
||||
* @retval An ErrorStatus enumeration value:
|
||||
* - SUCCESS: the Delay value is received.
|
||||
* - ERROR: the Delay value is not received.
|
||||
*/
|
||||
void LL_DLYB_GetDelay(const DLYB_TypeDef *DLYBx, LL_DLYB_CfgTypeDef *pdlyb_cfg)
|
||||
{
|
||||
/* Check the DelayBlock instance */
|
||||
assert_param(IS_DLYB_ALL_INSTANCE(DLYBx));
|
||||
|
||||
/* Fill the DelayBlock configuration structure with SEL and UNIT value */
|
||||
pdlyb_cfg->Units = ((DLYBx->CFGR & DLYB_CFGR_UNIT) >> DLYB_CFGR_UNIT_Pos);
|
||||
pdlyb_cfg->PhaseSel = (DLYBx->CFGR & DLYB_CFGR_SEL);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Get the clock period.
|
||||
* @param DLYBx: Pointer to DLYB instance.
|
||||
* @param pdlyb_cfg: Pointer to DLYB configuration structure.
|
||||
* @retval An ErrorStatus enumeration value:
|
||||
* - SUCCESS: there is a valid period detected and stored in pdlyb_cfg.
|
||||
* - ERROR: there is no valid period detected.
|
||||
*/
|
||||
uint32_t LL_DLYB_GetClockPeriod(DLYB_TypeDef *DLYBx, LL_DLYB_CfgTypeDef *pdlyb_cfg)
|
||||
{
|
||||
uint32_t i = 0U;
|
||||
uint32_t nb ;
|
||||
uint32_t lng ;
|
||||
uint32_t tickstart;
|
||||
|
||||
/* Check the DelayBlock instance */
|
||||
assert_param(IS_DLYB_ALL_INSTANCE(DLYBx));
|
||||
|
||||
/* Enable the length sampling */
|
||||
SET_BIT(DLYBx->CR, DLYB_CR_SEN);
|
||||
|
||||
/* Delay line length detection */
|
||||
while (i < DLYB_MAX_UNIT)
|
||||
{
|
||||
/* Set the Delay of the UNIT(s)*/
|
||||
DLYBx->CFGR = DLYB_MAX_SELECT | (i << DLYB_CFGR_UNIT_Pos);
|
||||
|
||||
/* Waiting for a LNG valid value */
|
||||
tickstart = HAL_GetTick();
|
||||
while ((DLYBx->CFGR & DLYB_CFGR_LNGF) == 0U)
|
||||
{
|
||||
if ((HAL_GetTick() - tickstart) >= DLYB_TIMEOUT)
|
||||
{
|
||||
/* New check to avoid false timeout detection in case of preemption */
|
||||
if ((DLYBx->CFGR & DLYB_CFGR_LNGF) == 0U)
|
||||
{
|
||||
return (uint32_t) HAL_TIMEOUT;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if ((DLYBx->CFGR & DLYB_LNG_10_0_MASK) != 0U)
|
||||
{
|
||||
if ((DLYBx->CFGR & (DLYB_CFGR_LNG_11 | DLYB_CFGR_LNG_10)) != DLYB_LNG_11_10_MASK)
|
||||
{
|
||||
/* Delay line length is configured to one input clock period*/
|
||||
break;
|
||||
}
|
||||
}
|
||||
i++;
|
||||
}
|
||||
|
||||
if (DLYB_MAX_UNIT != i)
|
||||
{
|
||||
/* Determine how many unit delays (nb) span one input clock period */
|
||||
lng = (DLYBx->CFGR & DLYB_CFGR_LNG) >> 16U;
|
||||
nb = 10U;
|
||||
while ((nb > 0U) && ((lng >> nb) == 0U))
|
||||
{
|
||||
nb--;
|
||||
}
|
||||
if (nb != 0U)
|
||||
{
|
||||
pdlyb_cfg->PhaseSel = nb ;
|
||||
pdlyb_cfg->Units = i ;
|
||||
|
||||
/* Disable the length sampling */
|
||||
DLYBx->CR = DLYB_CR_SEN;
|
||||
|
||||
return (uint32_t)SUCCESS;
|
||||
}
|
||||
}
|
||||
|
||||
/* Disable the length sampling */
|
||||
DLYBx->CR = DLYB_CR_SEN;
|
||||
|
||||
return (uint32_t)ERROR;
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* DLYB_SDMMC1 || DLYB_SDMMC2 */
|
||||
#endif /* HAL_SD_MODULE_ENABLED */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
File diff suppressed because it is too large.
Load diff
Reference in new issue
Block a user