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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file stm32h7rsxx_it.c
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* @brief Interrupt Service Routines.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2023 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "stm32h7rsxx_it.h"
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#include "stm32h7s78_discovery_audio.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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/* USER CODE END Includes */
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN TD */
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/* USER CODE END TD */
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/* Private define ------------------------------------------------------------*/
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/* USER CODE BEGIN PD */
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/* USER CODE END PD */
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/* Private macro -------------------------------------------------------------*/
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/* USER CODE BEGIN PM */
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/* USER CODE END PM */
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/* Private variables ---------------------------------------------------------*/
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/* USER CODE BEGIN PV */
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/* USER CODE END PV */
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/* Private function prototypes -----------------------------------------------*/
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/* USER CODE BEGIN PFP */
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/* USER CODE END PFP */
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/* Private user code ---------------------------------------------------------*/
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/* External variables --------------------------------------------------------*/
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extern DMA_NodeTypeDef Node_GPDMA1_Channel0;
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extern DMA_QListTypeDef List_GPDMA1_Channel0;
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extern DMA_HandleTypeDef handle_GPDMA1_Channel0;
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extern MDF_HandleTypeDef AdfHandle0;
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extern DMA2D_HandleTypeDef hdma2d;
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extern GPU2D_HandleTypeDef hgpu2d;
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extern DMA_HandleTypeDef handle_HPDMA1_Channel1;
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extern DMA_HandleTypeDef handle_HPDMA1_Channel0;
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extern JPEG_HandleTypeDef hjpeg;
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extern LTDC_HandleTypeDef hltdc;
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extern TIM_HandleTypeDef htim6;
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extern DMA_HandleTypeDef hDmaI2sTx;
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/* USER CODE BEGIN EV */
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/* USER CODE END EV */
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/******************************************************************************/
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/* Cortex Processor Interruption and Exception Handlers */
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/******************************************************************************/
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/**
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* @brief This function handles Non maskable interrupt.
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*/
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void NMI_Handler(void)
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{
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/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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/* USER CODE END NonMaskableInt_IRQn 0 */
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/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
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while (1)
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{
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}
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/* USER CODE END NonMaskableInt_IRQn 1 */
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}
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/**
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* @brief This function handles Hard fault interrupt.
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*/
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void HardFault_Handler(void)
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{
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/* USER CODE BEGIN HardFault_IRQn 0 */
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/* USER CODE END HardFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_HardFault_IRQn 0 */
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/* USER CODE END W1_HardFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Memory management fault.
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*/
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void MemManage_Handler(void)
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{
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/* USER CODE BEGIN MemoryManagement_IRQn 0 */
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/* USER CODE END MemoryManagement_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
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/* USER CODE END W1_MemoryManagement_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Pre-fetch fault, memory access fault.
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*/
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void BusFault_Handler(void)
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{
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/* USER CODE BEGIN BusFault_IRQn 0 */
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/* USER CODE END BusFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_BusFault_IRQn 0 */
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/* USER CODE END W1_BusFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Undefined instruction or illegal state.
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*/
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void UsageFault_Handler(void)
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{
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/* USER CODE BEGIN UsageFault_IRQn 0 */
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/* USER CODE END UsageFault_IRQn 0 */
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while (1)
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{
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/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
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/* USER CODE END W1_UsageFault_IRQn 0 */
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}
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}
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/**
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* @brief This function handles Debug monitor.
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*/
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void DebugMon_Handler(void)
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{
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/* USER CODE BEGIN DebugMonitor_IRQn 0 */
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/* USER CODE END DebugMonitor_IRQn 0 */
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/* USER CODE BEGIN DebugMonitor_IRQn 1 */
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/* USER CODE END DebugMonitor_IRQn 1 */
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}
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/******************************************************************************/
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/* STM32H7RSxx Peripheral Interrupt Handlers */
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/* Add here the Interrupt Handlers for the used peripherals. */
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/* For the available peripheral interrupt handler names, */
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/* please refer to the startup file (startup_stm32h7rsxx.s). */
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/******************************************************************************/
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/**
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* @brief This function handles EXTI line3 interrupt.
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*/
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void EXTI3_IRQHandler(void)
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{
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/* USER CODE BEGIN EXTI3_IRQn 0 */
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/* USER CODE END EXTI3_IRQn 0 */
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HAL_GPIO_EXTI_IRQHandler(TP_IRQ_Pin);
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/* USER CODE BEGIN EXTI3_IRQn 1 */
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/* USER CODE END EXTI3_IRQn 1 */
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}
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/**
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* @brief This function handles GPDMA1 Channel 0 global interrupt.
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*/
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void GPDMA1_Channel0_IRQHandler(void)
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{
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/* USER CODE BEGIN GPDMA1_Channel0_IRQn 0 */
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/* USER CODE END GPDMA1_Channel0_IRQn 0 */
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HAL_DMA_IRQHandler(&handle_GPDMA1_Channel0);
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/* USER CODE BEGIN GPDMA1_Channel0_IRQn 1 */
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/* USER CODE END GPDMA1_Channel0_IRQn 1 */
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}
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void GPDMA1_Channel2_IRQHandler(void)
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{
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BSP_AUDIO_OUT_IRQHandler(0, AUDIO_OUT_HEADPHONE);
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}
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/**
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* @brief This function handles TIM6 global interrupt.
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*/
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void TIM6_IRQHandler(void)
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{
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/* USER CODE BEGIN TIM6_IRQn 0 */
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/* USER CODE END TIM6_IRQn 0 */
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HAL_TIM_IRQHandler(&htim6);
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/* USER CODE BEGIN TIM6_IRQn 1 */
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/* USER CODE END TIM6_IRQn 1 */
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}
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/**
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* @brief This function handles HPDMA1 Channel 0 global interrupt.
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*/
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void HPDMA1_Channel0_IRQHandler(void)
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{
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/* USER CODE BEGIN HPDMA1_Channel0_IRQn 0 */
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/* USER CODE END HPDMA1_Channel0_IRQn 0 */
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HAL_DMA_IRQHandler(&handle_HPDMA1_Channel0);
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/* USER CODE BEGIN HPDMA1_Channel0_IRQn 1 */
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/* USER CODE END HPDMA1_Channel0_IRQn 1 */
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}
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/**
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* @brief This function handles HPDMA1 Channel 1 global interrupt.
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*/
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void HPDMA1_Channel1_IRQHandler(void)
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{
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/* USER CODE BEGIN HPDMA1_Channel1_IRQn 0 */
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/* USER CODE END HPDMA1_Channel1_IRQn 0 */
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HAL_DMA_IRQHandler(&handle_HPDMA1_Channel1);
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/* USER CODE BEGIN HPDMA1_Channel1_IRQn 1 */
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/* USER CODE END HPDMA1_Channel1_IRQn 1 */
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}
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/**
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* @brief This function handles LTDC global interrupt.
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*/
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void LTDC_IRQHandler(void)
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{
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/* USER CODE BEGIN LTDC_IRQn 0 */
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/* USER CODE END LTDC_IRQn 0 */
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HAL_LTDC_IRQHandler(&hltdc);
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/* USER CODE BEGIN LTDC_IRQn 1 */
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/* USER CODE END LTDC_IRQn 1 */
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}
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/**
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* @brief This function handles DMA2D global interrupt.
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*/
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void DMA2D_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA2D_IRQn 0 */
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/* USER CODE END DMA2D_IRQn 0 */
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HAL_DMA2D_IRQHandler(&hdma2d);
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/* USER CODE BEGIN DMA2D_IRQn 1 */
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/* USER CODE END DMA2D_IRQn 1 */
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}
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/**
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* @brief This function handles JPEG global interrupt.
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*/
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void JPEG_IRQHandler(void)
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{
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/* USER CODE BEGIN JPEG_IRQn 0 */
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/* USER CODE END JPEG_IRQn 0 */
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HAL_JPEG_IRQHandler(&hjpeg);
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/* USER CODE BEGIN JPEG_IRQn 1 */
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/* USER CODE END JPEG_IRQn 1 */
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}
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/**
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* @brief This function handles ADF1 Filter 0 global Interrupt.
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*/
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void ADF1_FLT0_IRQHandler(void)
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{
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/* USER CODE BEGIN ADF1_FLT0_IRQn 0 */
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/* USER CODE END ADF1_FLT0_IRQn 0 */
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HAL_MDF_IRQHandler(&AdfHandle0);
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/* USER CODE BEGIN ADF1_FLT0_IRQn 1 */
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/* USER CODE END ADF1_FLT0_IRQn 1 */
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}
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/**
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* @brief This function handles GPU2D global interrupt.
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*/
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void GPU2D_IRQHandler(void)
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{
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/* USER CODE BEGIN GPU2D_IRQn 0 */
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/* USER CODE END GPU2D_IRQn 0 */
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HAL_GPU2D_IRQHandler(&hgpu2d);
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/* USER CODE BEGIN GPU2D_IRQn 1 */
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/* USER CODE END GPU2D_IRQn 1 */
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}
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/**
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* @brief This function handles GPU2D Error interrupt.
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*/
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void GPU2D_ER_IRQHandler(void)
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{
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/* USER CODE BEGIN GPU2D_ER_IRQn 0 */
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/* USER CODE END GPU2D_ER_IRQn 0 */
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HAL_GPU2D_ER_IRQHandler(&hgpu2d);
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/* USER CODE BEGIN GPU2D_ER_IRQn 1 */
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/* USER CODE END GPU2D_ER_IRQn 1 */
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}
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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