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/**
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******************************************************************************
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* @file stm32h7rsxx_hal_pwr.c
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* @author MCD Application Team
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* @brief PWR HAL module driver.
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* This file provides firmware functions to manage the following
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* functionalities of the Power Controller (PWR) peripheral:
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* + Initialization/De-Initialization Functions.
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* + Peripheral Control Functions.
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*
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2022 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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@verbatim
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==============================================================================
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##### PWR peripheral overview #####
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==============================================================================
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[..]
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(#) The Power control (PWR) provides an overview of the supply architecture
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for the different power domains and of the supply configuration
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controller.
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(#) Several low-power modes are available to save power when the CPU does not need to
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execute code :
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(+) Sleep (CPU clock stopped and still in RUN mode)
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(+) Stop (System clock stopped)
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(+) Standby (System powered down)
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==============================================================================
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##### How to use this driver #####
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==============================================================================
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[..]
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(#) Call HAL_PWR_EnableBkUpAccess() and HAL_PWR_DisableBkUpAccess() functions
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to enable/disable access to the backup domain (RCC Backup domain control
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register RCC_BDCR, RTC registers, TAMP registers, backup registers and
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backup SRAM).
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(#) Call HAL_PWR_ConfigPVD() after setting parameters to be configured (event
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mode and voltage threshold) in order to set up the Programmed Voltage
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Detector, then use HAL_PWR_EnablePVD() and HAL_PWR_DisablePVD()
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functions to start and stop the PVD detection.
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(+) PVD level can be one of the following values :
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(++) 2V0
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(++) 2V2
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(++) 2V4
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(++) 2V5
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(++) 2V6
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(++) 2V8
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(++) 2V9
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(++) External input analog voltage PVD_IN (compared internally to
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VREFINT)
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(#) Call HAL_PWR_EnableWakeUpPin() and HAL_PWR_DisableWakeUpPin() functions
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with the right parameter to configure the wake up pin polarity (Low or
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High), the wake up pin selection and to enable and disable it.
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(#) Call HAL_PWR_EnterSLEEPMode() function to enter the CPU in Sleep mode.
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Wake-up from Sleep mode could be following to an event or an
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interrupt according to low power mode intrinsic request called (__WFI()
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or __WFE()).
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(#) Call HAL_PWR_EnterSTOPMode() function to enter the whole system to Stop
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mode. Wake-up from Stop mode could be following to an event or an
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interrupt according to low power mode intrinsic request called (__WFI()
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or __WFE()).
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(#) Call HAL_PWR_EnterSTANDBYMode() function to enter the whole system in
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Standby mode. Wake-up from Standby mode can be following only by an
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interrupt.
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(#) Call HAL_PWR_EnableSleepOnExit() and HAL_PWR_DisableSleepOnExit() APIs to
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enable and disable the Cortex-M7 re-entry in Sleep mode after an
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interruption handling is over.
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(#) Call HAL_PWR_EnableSEVOnPend() and HAL_PWR_DisableSEVOnPend() functions
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to configure the Cortex-M7 to wake-up after any pending event / interrupt
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even if it's disabled or has insufficient priority to cause exception
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entry.
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*** PWR HAL driver macros list ***
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=============================================
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[..]
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Below the list of most used macros in PWR HAL driver.
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(+) __HAL_PWR_GET_FLAG() : Get the PWR pending flags.
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(+) __HAL_PWR_CLEAR_FLAG() : Clear the PWR pending flags.
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@endverbatim
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32h7rsxx_hal.h"
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/** @addtogroup STM32H7RSxx_HAL_Driver
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* @{
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*/
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/** @defgroup PWR PWR
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* @brief PWR HAL module driver
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* @{
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*/
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#ifdef HAL_PWR_MODULE_ENABLED
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/** @defgroup PWR_Private_Defines PWR Private Defines
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* @{
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*/
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/** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask
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* @{
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*/
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#define PVD_MODE_IT (0x00010000U)
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#define PVD_MODE_EVT (0x00020000U)
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#define PVD_RISING_EDGE (0x00000001U)
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#define PVD_FALLING_EDGE (0x00000002U)
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#define PVD_RISING_FALLING_EDGE (0x00000003U)
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/**
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* @}
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*/
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/**
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* @}
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*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Exported functions --------------------------------------------------------*/
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/** @defgroup PWR_Exported_Functions PWR Exported Functions
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* @{
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*/
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/** @defgroup PWR_Exported_Functions_Group1 Initialization and De-Initialization Functions
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* @brief Initialization and de-Initialization functions
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*
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@verbatim
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===============================================================================
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##### Initialization and De-Initialization Functions #####
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===============================================================================
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[..]
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This section provides functions allowing to deinitialize power peripheral.
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[..]
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After system reset, the backup domain (RCC Backup domain control register
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RCC_BDCR, RTC registers, TAMP registers, backup registers and backup SRAM)
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is protected against possible unwanted write accesses.
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The HAL_PWR_EnableBkUpAccess() function enables the access to the backup
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domain.
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The HAL_PWR_DisableBkUpAccess() function disables the access to the backup
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domain.
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@endverbatim
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* @{
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*/
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/**
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* @brief Deinitialize the HAL PWR peripheral registers to their default reset
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* values.
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* @note This functionality is not available in this product.
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* The prototype is kept just to maintain compatibility with other
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* products.
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* @retval None.
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*/
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void HAL_PWR_DeInit(void)
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{
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}
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/**
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* @brief Enable access to the backup domain (RCC Backup domain control
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* register RCC_BDCR, RTC registers, TAMP registers, backup registers
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* and backup SRAM).
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* @note After a system reset, the backup domain is protected against
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* possible unwanted write accesses.
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* @retval None.
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*/
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void HAL_PWR_EnableBkUpAccess(void)
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{
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SET_BIT(PWR->CR1, PWR_CR1_DBP);
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}
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/**
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* @brief Disable access to the backup domain (RCC Backup domain control
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* register RCC_BDCR, RTC registers, TAMP registers, backup registers
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* and backup SRAM).
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* @retval None.
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*/
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void HAL_PWR_DisableBkUpAccess(void)
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{
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CLEAR_BIT(PWR->CR1, PWR_CR1_DBP);
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}
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/**
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* @}
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*/
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/** @defgroup PWR_Exported_Functions_Group2 Peripheral Control Functions
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* @brief Power Control functions
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*
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@verbatim
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===============================================================================
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##### Peripheral Control Functions #####
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===============================================================================
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[..]
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This section provides functions allowing to control power peripheral.
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*** PVD configuration ***
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=========================
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[..]
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(+) The PVD is used to monitor the VDD power supply by comparing it to a
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threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR1
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register).
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(+) A PVDO flag is available to indicate if VDD is higher or lower
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than the PVD threshold. This event is internally connected to the EXTI
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line 16 to generate an interrupt if enabled.
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It is configurable through __HAL_PWR_PVD_EXTI_ENABLE_IT() macro.
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(+) The PVD is stopped in STANDBY mode.
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*** Wake-up pin configuration ***
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=================================
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[..]
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(+) Wake-up pin is used to wake up the system from STANDBY mode.
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The pin pull is configurable through the WKUPEPR register to be in
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No-pull, Pull-up and Pull-down.
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The pin polarity is configurable through the WKUPEPR register to be
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active on rising or falling edges.
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(+) There are up to four Wake-up pin in the STM32H7RS devices family.
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*** Low Power modes configuration ***
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=====================================
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[..]
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The device present 3 principles low-power modes :
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(+) SLEEP mode : Cortex-M7 is stopped and all PWR domains are remaining
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active (Powered and Clocked).
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(+) STOP mode : Cortex-M7 is stopped, clocks are stopped and the
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regulator is running. The Main regulator or the LP
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regulator could be selected.
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(+) STANDBY mode : All PWR domains enter DSTANDBY mode and the VCORE
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supply regulator is powered off.
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*** SLEEP mode ***
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==================
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[..]
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(+) Entry:
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The SLEEP mode is entered by using the HAL_PWR_EnterSLEEPMode(Regulator,
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SLEEPEntry) function.
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(++) PWR_SLEEPENTRY_WFI : Enter SLEEP mode with WFI instruction.
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(++) PWR_SLEEPENTRY_WFE : Enter SLEEP mode with WFE instruction and
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clear of pending events before.
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(++) PWR_SLEEPENTRY_WFE_NO_EVT_CLEAR: Enter SLEEP mode with WFE instruction and
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no clear of pending event before.
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-@@- The Regulator parameter is not used for the STM32H7RS family
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and is kept as parameter just to maintain compatibility with the
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lower power families. (STM32L).
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(+) Exit:
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Any peripheral interrupt acknowledged by the nested vectored interrupt
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controller (NVIC) can wake up the device from SLEEP mode.
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*** STOP mode ***
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=================
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[..]
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In system STOP mode, the CPU clock is stopped. All CPU subsystem peripheral
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clocks are stopped too.
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The voltage regulator can be configured either in normal or low-power mode.
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To minimize the consumption in STOP mode, FLASH can be powered off before
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entering the STOP mode using the HAL_PWREx_EnableFlashPowerDown() function.
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It can be switched on again by software after exiting the STOP mode using
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the HAL_PWREx_DisableFlashPowerDown() function.
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(+) Entry:
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The STOP mode is entered using the HAL_PWR_EnterSTOPMode(Regulator,
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STOPEntry) function with:
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(++) Regulator:
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(+++) PWR_MAINREGULATOR_ON: Main regulator ON.
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This parameter is not used for the STM32H7RS family and is kept as parameter
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just to maintain compatibility with the lower power families.
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(++) STOPEntry:
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(+++) PWR_STOPENTRY_WFI : Enter STOP mode with WFI instruction.
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(+++) PWR_STOPENTRY_WFE : Enter STOP mode with WFE instruction and
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clear of pending events before.
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(+++) PWR_STOPENTRY_WFE_NO_EVT_CLEAR: Enter STOP mode with WFE instruction and
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no clear of pending event before.
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(+) Exit:
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Any EXTI Line (Internal or External) configured in Interrupt/Event mode.
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*** STANDBY mode ***
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====================
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[..]
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(+)
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The system STANDBY mode allows to achieve the lowest power consumption.
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It is based on the Cortex-M7 deep SLEEP mode, with the voltage regulator
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disabled. The system is consequently powered off. The PLL, the HSI
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oscillator and the HSE oscillator are also switched off. SRAM and register
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contents are lost except for the RTC registers, RTC backup registers,
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backup SRAM and standby circuitry.
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[..]
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The voltage regulator is OFF.
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(++) Entry:
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(+++) The STANDBY mode is entered using the HAL_PWR_EnterSTANDBYMode()
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function.
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(++) Exit:
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(+++) WKUP pin rising or falling edge, RTC alarm (Alarm A and Alarm B),
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RTC wakeup, tamper event, time stamp event, external reset in NRST
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pin, IWDG reset.
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*** Auto-wakeup (AWU) from low-power mode ***
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=============================================
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[..]
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(+) The MCU can be woken up from low-power mode by an RTC Alarm event, an
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RTC Wakeup event, a tamper event or a time-stamp event, without
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depending on an external interrupt (Auto-wakeup mode).
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(+) RTC auto-wakeup (AWU) from the STOP and STANDBY modes
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(++) To wake up from the STOP mode with an RTC alarm event, it is
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necessary to configure the RTC to generate the RTC alarm using the
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HAL_RTC_SetAlarm_IT() function.
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(++) To wake up from the STOP mode with an RTC Tamper or time stamp event,
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it is necessary to configure the RTC to detect the tamper or time
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stamp event using the HAL_RTCEx_SetTimeStamp_IT() or
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HAL_RTCEx_SetTamper_IT() functions.
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(++) To wake up from the STOP mode with an RTC WakeUp event, it is
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necessary to configure the RTC to generate the RTC WakeUp event
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using the HAL_RTCEx_SetWakeUpTimer_IT() function.
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@endverbatim
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* @{
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*/
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/**
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* @brief Configure the voltage threshold detected by the Programmed Voltage
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* Detector (PVD).
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* @param sConfigPVD : Pointer to a PWR_PVDTypeDef structure that contains the
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* PVD configuration information (PVDLevel and EventMode).
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* @note Refer to the electrical characteristics of your device datasheet for
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* more details about the voltage threshold corresponding to each
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* detection level.
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* @note As PVD and AVD share the same EXTI line, the EXTI operating mode to
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* configure will replace a possible previous configuration done through
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* HAL_PWREx_ConfigAVD.
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* @retval None.
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*/
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void HAL_PWR_ConfigPVD(const PWR_PVDTypeDef *sConfigPVD)
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{
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/* Check the PVD configuration parameter */
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if (sConfigPVD == NULL)
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{
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return;
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}
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/* Check the parameters */
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assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
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assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
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/* Set PLS[7:5] bits according to PVDLevel value */
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MODIFY_REG(PWR->CR1, PWR_CR1_PLS, sConfigPVD->PVDLevel);
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/* Clear any previous config. Keep it clear if no event or IT mode is selected */
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__HAL_PWR_PVD_EXTI_DISABLE_EVENT();
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__HAL_PWR_PVD_EXTI_DISABLE_IT();
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__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();
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__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
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/* Configure the PVD in interrupt mode */
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if ((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
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{
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__HAL_PWR_PVD_EXTI_ENABLE_IT();
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}
|
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|
||||
/* Configure the PVD in event mode */
|
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if ((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
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||||
{
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__HAL_PWR_PVD_EXTI_ENABLE_EVENT();
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}
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||||
/* Rising edge configuration */
|
||||
if ((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
|
||||
{
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||||
__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();
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}
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||||
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||||
/* Falling edge configuration */
|
||||
if ((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
|
||||
{
|
||||
__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
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||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable the programmable voltage detector (PVD).
|
||||
* @retval None.
|
||||
*/
|
||||
void HAL_PWR_EnablePVD(void)
|
||||
{
|
||||
SET_BIT(PWR->CR1, PWR_CR1_PVDE);
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||||
}
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||||
|
||||
/**
|
||||
* @brief Disable the programmable voltage detector (PVD).
|
||||
* @retval None.
|
||||
*/
|
||||
void HAL_PWR_DisablePVD(void)
|
||||
{
|
||||
CLEAR_BIT(PWR->CR1, PWR_CR1_PVDE);
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||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable the WakeUp PINx functionality.
|
||||
* @param WakeUpPinPolarity : Specifies which Wake-Up pin to enable.
|
||||
* This parameter can be one of the following legacy values, which
|
||||
* sets the default (rising edge):
|
||||
* @arg PWR_WAKEUP_PIN1,
|
||||
* PWR_WAKEUP_PIN2,
|
||||
* PWR_WAKEUP_PIN3,
|
||||
* PWR_WAKEUP_PIN4.
|
||||
* or one of the following values where the user can explicitly states
|
||||
* the enabled pin and the chosen polarity:
|
||||
* @arg PWR_WAKEUP_PIN1_HIGH, PWR_WAKEUP_PIN1_LOW,
|
||||
* PWR_WAKEUP_PIN2_HIGH, PWR_WAKEUP_PIN2_LOW,
|
||||
* PWR_WAKEUP_PIN3_HIGH, PWR_WAKEUP_PIN3_LOW,
|
||||
* PWR_WAKEUP_PIN4_HIGH, PWR_WAKEUP_PIN4_LOW.
|
||||
* @note PWR_WAKEUP_PINx and PWR_WAKEUP_PINx_HIGH are equivalent.
|
||||
* @retval None.
|
||||
*/
|
||||
void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinPolarity));
|
||||
|
||||
/*
|
||||
Enable and Specify the Wake-Up pin polarity and the pull configuration
|
||||
for the event detection (rising or falling edge).
|
||||
*/
|
||||
MODIFY_REG(PWR->WKUPEPR, PWR_WKUPEPR_WKUPEN | PWR_WKUPEPR_WKUPP, WakeUpPinPolarity);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable the WakeUp PINx functionality.
|
||||
* @param WakeUpPinx : Specifies the Power Wake-Up pin to disable.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg PWR_WAKEUP_PIN1,
|
||||
* PWR_WAKEUP_PIN2,
|
||||
* PWR_WAKEUP_PIN3,
|
||||
* PWR_WAKEUP_PIN4,
|
||||
* PWR_WAKEUP_PIN1_HIGH, PWR_WAKEUP_PIN1_LOW,
|
||||
* PWR_WAKEUP_PIN2_HIGH, PWR_WAKEUP_PIN2_LOW,
|
||||
* PWR_WAKEUP_PIN3_HIGH, PWR_WAKEUP_PIN3_LOW,
|
||||
* PWR_WAKEUP_PIN4_HIGH, PWR_WAKEUP_PIN4_LOW.
|
||||
* @retval None.
|
||||
*/
|
||||
void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
|
||||
{
|
||||
/* Check the parameters */
|
||||
assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
|
||||
|
||||
/* Disable the wake up pin selected */
|
||||
CLEAR_BIT(PWR->WKUPEPR, (PWR_WKUPEPR_WKUPEN & WakeUpPinx));
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enter the current core in SLEEP mode (CSLEEP).
|
||||
* @param Regulator : NA in this family project
|
||||
* Specifies the regulator state in SLEEP mode.
|
||||
* @note This parameter is not used for the STM32H7RS family and is kept as
|
||||
* parameter just to maintain compatibility with the lower power
|
||||
* families.
|
||||
* @param SLEEPEntry : Specifies if SLEEP mode is entered with WFI or WFE
|
||||
* intrinsic instruction.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg PWR_SLEEPENTRY_WFI : Enter SLEEP mode with WFI instruction.
|
||||
* @arg PWR_SLEEPENTRY_WFE : Enter SLEEP mode with WFE instruction and
|
||||
* clear of pending events before.
|
||||
* @arg PWR_SLEEPENTRY_WFE_NO_EVT_CLEAR : Enter SLEEP mode with WFE instruction and
|
||||
* no clear of pending event before.
|
||||
* @retval None.
|
||||
*/
|
||||
void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
|
||||
{
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(Regulator);
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
|
||||
|
||||
/* Clear SLEEPDEEP bit of Cortex System Control Register */
|
||||
CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
|
||||
|
||||
/* Select Sleep mode entry */
|
||||
if (SLEEPEntry == PWR_SLEEPENTRY_WFI)
|
||||
{
|
||||
/* Request Wait For Interrupt */
|
||||
__WFI();
|
||||
}
|
||||
else
|
||||
{
|
||||
if (SLEEPEntry != PWR_SLEEPENTRY_WFE_NO_EVT_CLEAR)
|
||||
{
|
||||
/* Clear all pending event */
|
||||
__SEV();
|
||||
__WFE();
|
||||
}
|
||||
|
||||
/* Request Wait For Event */
|
||||
__WFE();
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enter the whole system to Stop mode.
|
||||
* @note This API will enter the system in STOP mode
|
||||
* @param Regulator : This parameter is not used for this product family.
|
||||
and is kept as parameter just to maintain compatibility with the
|
||||
lower power families.
|
||||
* @param STOPEntry : Specifies if STOP mode in entered with WFI or WFE
|
||||
* intrinsic instruction.
|
||||
* This parameter can be one of the following values:
|
||||
* @arg PWR_STOPENTRY_WFI : Enter STOP mode with WFI instruction.
|
||||
* @arg PWR_STOPENTRY_WFE : Enter STOP mode with WFE instruction and
|
||||
* clear of pending events before.
|
||||
* @arg PWR_STOPENTRY_WFE_NO_EVT_CLEAR : Enter STOP mode with WFE instruction and
|
||||
* no clear of pending event before.
|
||||
* @note In System STOP mode, all I/O pins keep the same state as in Run mode.
|
||||
* @note When exiting System STOP mode by issuing an interrupt or a wakeup
|
||||
* event, the HSI RC oscillator is selected as default system wakeup
|
||||
* clock.
|
||||
* @note In System STOP mode, when the voltage regulator operates in low
|
||||
* power mode, an additional startup delay is incurred when the system
|
||||
* is waking up. By keeping the internal regulator ON during STOP mode,
|
||||
* the consumption is higher although the startup time is reduced.
|
||||
* @retval None.
|
||||
*/
|
||||
void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
|
||||
{
|
||||
|
||||
/* Prevent unused argument(s) compilation warning */
|
||||
UNUSED(Regulator);
|
||||
|
||||
/* Check the parameters */
|
||||
assert_param(IS_PWR_STOP_ENTRY(STOPEntry));
|
||||
|
||||
/* Select Stop mode when device enters Deepsleep */
|
||||
CLEAR_BIT(PWR->CSR3, PWR_CSR3_PDDS);
|
||||
|
||||
/* Set SLEEPDEEP bit of Cortex System Control Register */
|
||||
SET_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
|
||||
|
||||
/* Ensure that all instructions are done before entering STOP mode */
|
||||
__DSB();
|
||||
__ISB();
|
||||
|
||||
/* Select Stop mode entry */
|
||||
if (STOPEntry == PWR_STOPENTRY_WFI)
|
||||
{
|
||||
/* Request Wait For Interrupt */
|
||||
__WFI();
|
||||
}
|
||||
else
|
||||
{
|
||||
if (STOPEntry != PWR_STOPENTRY_WFE_NO_EVT_CLEAR)
|
||||
{
|
||||
/* Clear all pending event */
|
||||
__SEV();
|
||||
__WFE();
|
||||
}
|
||||
/* Request Wait For Event */
|
||||
__WFE();
|
||||
}
|
||||
|
||||
/* Clear SLEEPDEEP bit of Cortex-M7 in the System Control Register */
|
||||
CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enter the whole system to Standby mode.
|
||||
* @note The Standby mode allows achieving the lowest power consumption.
|
||||
* @note When the system enters in Standby mode, the voltage regulator is disabled.
|
||||
* The complete VCORE domain is consequently powered off.
|
||||
* The PLLs, HSI oscillator, CSI oscillator, HSI48 and the HSE oscillator are
|
||||
* also switched off.
|
||||
* SRAM and register contents are lost except for backup domain registers
|
||||
* (RTC registers, RTC backup register and backup RAM), and Standby circuitry.
|
||||
* @note When the System exit STANDBY mode by issuing an interrupt or a
|
||||
* wakeup event, the HSI RC oscillator is selected as system clock.
|
||||
* @retval None.
|
||||
*/
|
||||
void HAL_PWR_EnterSTANDBYMode(void)
|
||||
{
|
||||
/* Select Standby when device enters Deepsleep */
|
||||
SET_BIT(PWR->CSR3, PWR_CSR3_PDDS);
|
||||
|
||||
/* Set SLEEPDEEP bit of Cortex System Control Register */
|
||||
SET_BIT(SCB->SCR, SCB_SCR_SLEEPDEEP_Msk);
|
||||
|
||||
/* Ensure that all instructions are done before entering STANDBY mode */
|
||||
__DSB();
|
||||
__ISB();
|
||||
|
||||
/* Request Wait For Interrupt */
|
||||
__WFI();
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Indicate SLEEP-ON-EXIT feature when returning from handler mode to
|
||||
* thread mode.
|
||||
* @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the
|
||||
* processor re-enters Sleep mode when an interruption handling is over.
|
||||
* Setting this bit is useful when the processor is expected to run
|
||||
* only on interruptions handling.
|
||||
* @retval None.
|
||||
*/
|
||||
void HAL_PWR_EnableSleepOnExit(void)
|
||||
{
|
||||
/* Set SLEEPONEXIT bit of Cortex-M7 System Control Register */
|
||||
SET_BIT(SCB->SCR, SCB_SCR_SLEEPONEXIT_Msk);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable SLEEP-ON-EXIT feature when returning from handler mode to
|
||||
* thread mode.
|
||||
* @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the
|
||||
* processor re-enters Sleep mode when an interruption handling is over.
|
||||
* @retval None.
|
||||
*/
|
||||
void HAL_PWR_DisableSleepOnExit(void)
|
||||
{
|
||||
/* Clear SLEEPONEXIT bit of Cortex-M7 System Control Register */
|
||||
CLEAR_BIT(SCB->SCR, SCB_SCR_SLEEPONEXIT_Msk);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Enable CORTEX SEV-ON-PEND feature.
|
||||
* @note Sets SEVONPEND bit of SCR register. When this bit is set, any
|
||||
* pending event / interrupt even if it's disabled or has insufficient
|
||||
* priority to cause exception entry wakes up the Cortex-M7.
|
||||
* @retval None.
|
||||
*/
|
||||
void HAL_PWR_EnableSEVOnPend(void)
|
||||
{
|
||||
/* Set SEVONPEND bit of Cortex-M7 System Control Register */
|
||||
SET_BIT(SCB->SCR, SCB_SCR_SEVONPEND_Msk);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Disable CORTEX SEVONPEND feature.
|
||||
* @note Resets SEVONPEND bit of SCR register. When this bit is reset, only
|
||||
* enabled pending causes exception entry wakes up the Cortex-M7.
|
||||
* @retval None.
|
||||
*/
|
||||
void HAL_PWR_DisableSEVOnPend(void)
|
||||
{
|
||||
/* Clear SEVONPEND bit of Cortex-M7 System Control Register */
|
||||
CLEAR_BIT(SCB->SCR, SCB_SCR_SEVONPEND_Msk);
|
||||
}
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
Reference in new issue
Block a user