This commit is contained in:
Thomas Laduguie committed 2026-09-04 09:57:30 +02:00
commit 75fbf8809d
489 files changed
+398278

No files matched your search

@@ -0,0 +1,283 @@
/**
******************************************************************************
* @file stm32_psram_driver.c
* @author MCD Application Team
* @brief This file implements the PSRAM driver.
******************************************************************************
* @attention
*
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32_extmem.h"
#include "stm32_extmem_conf.h"
#if EXTMEM_DRIVER_PSRAM == 1
#if EXTMEM_SAL_XSPI == 1
#include "../sal/stm32_sal_xspi_api.h"
#else
#error "the driver PSRAM requires the enable of EXTMEM_SAL_XSPI"
#endif /* EXTMEM_SAL_XSPI */
#include "stm32_psram_driver_api.h"
#if EXTMEM_DRIVER_PSRAM_DEBUG_LEVEL > 0 && defined(EXTMEM_MACRO_DEBUG)
#include <stdio.h>
#endif /* EXTMEM_DRIVER_PSRAM_DEBUG_LEVEL > 0 && EXTMEM_MACRO_DEBUG */
/** @defgroup PSRAM PSRAM driver
* @ingroup EXTMEM_DRIVER
* @{
*/
/* Private Macro ------------------------------------------------------------*/
/** @defgroup PSRAM_Private_Macro Private Macro
* @{
*/
/**
* @brief Default Timeout value (ms)
*/
#define DRIVER_DEFAULT_TIMEOUT 300
#if EXTMEM_DRIVER_PSRAM_DEBUG_LEVEL > 0 && defined(EXTMEM_MACRO_DEBUG)
/**
* @brief Debug macro for a string
*/
#define DEBUG_STR(_STR_) { \
EXTMEM_MACRO_DEBUG("\tPSRAM::"); \
EXTMEM_MACRO_DEBUG(_STR_); \
EXTMEM_MACRO_DEBUG("\n\r"); \
}
#else
/**
* @brief Debug macro for a string
*/
#define DEBUG_STR(_STR_)
#endif /* EXTMEM_DRIVER_PSRAM_DEBUG_LEVEL > 0 && defined(EXTMEM_MACRO_DEBUG) */
/**
* @}
*/
/* Private typedefs ---------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/** @defgroup PSRAM_Private_Functions Private Functions
* @{
*/
EXTMEM_DRIVER_PSRAM_StatusTypeDef PSRAM_ExecuteCommand(EXTMEM_DRIVER_PSRAM_ObjectTypeDef *PsramObject, uint8_t Index);
/**
* @}
*/
/** @defgroup PSRAM_Exported_Functions Exported Functions
* @{
*/
/**
* @brief Initializes the PSRAM driver.
* @param Peripheral Pointer to the peripheral handle.
* @param Config Link configuration.
* @param ClockInput Input clock frequency.
* @param PsramObject Pointer to the PSRAM driver object.
* @retval @ref EXTMEM_DRIVER_PSRAM_StatusTypeDef
*/
EXTMEM_DRIVER_PSRAM_StatusTypeDef EXTMEM_DRIVER_PSRAM_Init(void *Peripheral, EXTMEM_LinkConfig_TypeDef Config,
uint32_t ClockInput,
EXTMEM_DRIVER_PSRAM_ObjectTypeDef *PsramObject)
{
EXTMEM_DRIVER_PSRAM_StatusTypeDef retr = EXTMEM_DRIVER_PSRAM_OK;
uint32_t ClockOut;
SAL_XSPI_PhysicalLinkTypeDef linkvalue;
/* Initialize the instance */
DEBUG_STR("initialize the instance")
/* Initialize XSPI low layer */
(void)SAL_XSPI_Init(&PsramObject->psram_private.SALObject, Peripheral);
/* Abort any ongoing XSPI action */
(void)SAL_XSPI_DisableMapMode(&PsramObject->psram_private.SALObject);
/* Set the frequency prescaler */
DEBUG_STR("set memory speed according freqIn and freqMax supported by the memory")
if (HAL_OK != SAL_XSPI_SetClock(&PsramObject->psram_private.SALObject, ClockInput, PsramObject->psram_public.FreqMax,
&ClockOut))
{
retr = EXTMEM_DRIVER_PSRAM_ERROR;
goto error;
}
/* Set the memory size */
DEBUG_STR("set memory size according")
(void)SAL_XSPI_MemoryConfig(&PsramObject->psram_private.SALObject, PARAM_FLASHSIZE,
&PsramObject->psram_public.MemorySize);
/* Set the memory size */
DEBUG_STR("set xspi link config")
linkvalue = PHY_LINK_RAM8;
(void)SAL_XSPI_MemoryConfig(&PsramObject->psram_private.SALObject, PARAM_PHY_LINK, &linkvalue);
/* Set the configuration to perform register operation */
(void)SAL_XSPI_MemoryConfig(&PsramObject->psram_private.SALObject, PARAM_DUMMY_CYCLES,
&PsramObject->psram_public.REG_DummyCycle);
/* Execute the command sequence */
for (uint8_t command_index = 0u; command_index < PsramObject->psram_public.NumberOfConfig; command_index++)
{
retr = PSRAM_ExecuteCommand(PsramObject, command_index);
if (retr != EXTMEM_DRIVER_PSRAM_OK)
{
goto error;
}
}
switch (Config)
{
case EXTMEM_LINK_CONFIG_16LINES:
linkvalue = PHY_LINK_RAM16;
(void)SAL_XSPI_MemoryConfig(&PsramObject->psram_private.SALObject, PARAM_PHY_LINK, &linkvalue);
break;
case EXTMEM_LINK_CONFIG_8LINES:
linkvalue = PHY_LINK_RAM8;
(void)SAL_XSPI_MemoryConfig(&PsramObject->psram_private.SALObject, PARAM_PHY_LINK, &linkvalue);
break;
default:
retr = EXTMEM_DRIVER_PSRAM_ERROR;
goto error;
break;
}
error:
return retr;
}
/**
* @brief Deinitializes the PSRAM driver.
* @param PsramObject Pointer to the PSRAM driver object.
* @retval @ref EXTMEM_DRIVER_PSRAM_StatusTypeDef
*/
EXTMEM_DRIVER_PSRAM_StatusTypeDef EXTMEM_DRIVER_PSRAM_DeInit(EXTMEM_DRIVER_PSRAM_ObjectTypeDef *PsramObject)
{
/* Abort any ongoing XSPI action */
(void)SAL_XSPI_DisableMapMode(&PsramObject->psram_private.SALObject);
return EXTMEM_DRIVER_PSRAM_OK;
}
/**
* @brief Enables memory-mapped mode for the PSRAM device.
* @param PsramObject Pointer to the PSRAM driver object.
* @retval @ref EXTMEM_DRIVER_PSRAM_StatusTypeDef
*/
EXTMEM_DRIVER_PSRAM_StatusTypeDef EXTMEM_DRIVER_PSRAM_Enable_MemoryMappedMode(EXTMEM_DRIVER_PSRAM_ObjectTypeDef
*PsramObject)
{
EXTMEM_DRIVER_PSRAM_StatusTypeDef retr = EXTMEM_DRIVER_PSRAM_OK;
/* Configure the read wrap mode */
if (HAL_OK != SAL_XSPI_ConfigureWrappMode(&PsramObject->psram_private.SALObject,
PsramObject->psram_public.WrapRead_command,
PsramObject->psram_public.Write_DummyCycle))
{
retr = EXTMEM_DRIVER_PSRAM_ERROR_MAP_ENABLE;
}
/* Enable memory mapped mode */
if (HAL_OK != SAL_XSPI_EnableMapMode(&PsramObject->psram_private.SALObject,
PsramObject->psram_public.Read_command,
PsramObject->psram_public.Read_DummyCycle,
PsramObject->psram_public.Write_command,
PsramObject->psram_public.Write_DummyCycle))
{
retr = EXTMEM_DRIVER_PSRAM_ERROR_MAP_ENABLE;
}
return retr;
}
/**
* @brief Disables memory-mapped mode for the PSRAM device.
* @param PsramObject Pointer to the PSRAM driver object.
* @retval @ref EXTMEM_DRIVER_PSRAM_StatusTypeDef
*/
EXTMEM_DRIVER_PSRAM_StatusTypeDef EXTMEM_DRIVER_PSRAM_Disable_MemoryMappedMode(EXTMEM_DRIVER_PSRAM_ObjectTypeDef
*PsramObject)
{
EXTMEM_DRIVER_PSRAM_StatusTypeDef retr = EXTMEM_DRIVER_PSRAM_OK;
/* Disable memory mapped mode */
if (HAL_OK != SAL_XSPI_DisableMapMode(&PsramObject->psram_private.SALObject))
{
retr = EXTMEM_DRIVER_PSRAM_ERROR_MAP_DISABLE;
}
return retr;
}
/**
* @}
*/
/** @addtogroup PSRAM_Private_Functions
* @{
*/
/**
* @brief Executes a configuration command for the PSRAM device.
*
* @param PsramObject Pointer to the PSRAM driver object.
* @param Index Index of the command to execute.
* @retval @ref EXTMEM_DRIVER_PSRAM_StatusTypeDef
*/
EXTMEM_DRIVER_PSRAM_StatusTypeDef PSRAM_ExecuteCommand(EXTMEM_DRIVER_PSRAM_ObjectTypeDef *PsramObject, uint8_t Index)
{
EXTMEM_DRIVER_PSRAM_StatusTypeDef retr = EXTMEM_DRIVER_PSRAM_OK;
uint8_t regval[2];
if (PsramObject->psram_public.ReadREGSize > 2u)
{
retr = EXTMEM_DRIVER_PSRAM_ERROR_REGSIZE;
goto error;
}
if (HAL_OK != SAL_XSPI_Read(&PsramObject->psram_private.SALObject,
PsramObject->psram_public.ReadREG,
PsramObject->psram_public.config[Index].REGAddress,
regval, PsramObject->psram_public.ReadREGSize))
{
retr = EXTMEM_DRIVER_PSRAM_ERROR_READREG;
goto error;
}
MODIFY_REG(regval[0],
PsramObject->psram_public.config[Index].WriteMask,
PsramObject->psram_public.config[Index].WriteValue);
if (HAL_OK != SAL_XSPI_Write(&PsramObject->psram_private.SALObject,
PsramObject->psram_public.WriteREG,
PsramObject->psram_public.config[Index].REGAddress,
regval, PsramObject->psram_public.ReadREGSize))
{
retr = EXTMEM_DRIVER_PSRAM_ERROR_WRITEREG;
goto error;
}
error:
return retr;
}
/**
* @}
*/
/**
* @}
*/
#endif /* EXTMEM_DRIVER_PSRAM == 1 */
@@ -0,0 +1,87 @@
/**
******************************************************************************
* @file stm32_psram_driver_api.h
* @author MCD Application Team
* @brief This file contains PSRAM driver API definitions.
******************************************************************************
* @attention
*
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32_PSRAM_DRIVER_H
#define __STM32_PSRAM_DRIVER_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#if EXTMEM_DRIVER_PSRAM == 1
/** @addtogroup PSRAM
* @ingroup EXTMEM_DRIVER
* @{
*/
/* Exported constants --------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/
/** @defgroup PSRAM_Exported_Types Exported Types
* @{
*/
/**
* @brief Enumeration of error codes for the PSRAM driver.
*/
typedef enum
{
EXTMEM_DRIVER_PSRAM_OK = 0,
EXTMEM_DRIVER_PSRAM_ERROR_READREG = -1,
EXTMEM_DRIVER_PSRAM_ERROR_WRITEREG = -2,
EXTEM_DRIVER_PSRAM_ERROR_READ = -3,
EXTEM_DRIVER_PSRAM_ERROR_WRITE = -4,
EXTMEM_DRIVER_PSRAM_ERROR_MAP_ENABLE = -5,
EXTMEM_DRIVER_PSRAM_ERROR_MAP_DISABLE = -6,
EXTMEM_DRIVER_PSRAM_ERROR_REGSIZE = -7,
EXTMEM_DRIVER_PSRAM_ERROR = -128,
} EXTMEM_DRIVER_PSRAM_StatusTypeDef;
/* Exported functions --------------------------------------------------------*/
/**
* @addtogroup PSRAM_Exported_Functions Exported Functions
* @{
*/
EXTMEM_DRIVER_PSRAM_StatusTypeDef EXTMEM_DRIVER_PSRAM_Init(void *Peripheral, EXTMEM_LinkConfig_TypeDef Config,
uint32_t ClockInput,
EXTMEM_DRIVER_PSRAM_ObjectTypeDef *PsramObject);
EXTMEM_DRIVER_PSRAM_StatusTypeDef EXTMEM_DRIVER_PSRAM_DeInit(EXTMEM_DRIVER_PSRAM_ObjectTypeDef *PsramObject);
EXTMEM_DRIVER_PSRAM_StatusTypeDef EXTMEM_DRIVER_PSRAM_Enable_MemoryMappedMode(EXTMEM_DRIVER_PSRAM_ObjectTypeDef
*PsramObject);
EXTMEM_DRIVER_PSRAM_StatusTypeDef EXTMEM_DRIVER_PSRAM_Disable_MemoryMappedMode(EXTMEM_DRIVER_PSRAM_ObjectTypeDef
*PsramObject);
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#endif /* EXTMEM_DRIVER_PSRAM == 1 */
#ifdef __cplusplus
}
#endif
#endif /* __STM32_PSRAM_DRIVER_H */
@@ -0,0 +1,106 @@
/**
******************************************************************************
* @file stm32_psram_driver_type.h
* @author MCD Application Team
* @brief This file contains PSRAM driver type definitions.
******************************************************************************
* @attention
*
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32_PSRAM_TYPE_H
#define __STM32_PSRAM_TYPE_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
/** @addtogroup PSRAM
* @ingroup EXTMEM_DRIVER
* @{
*/
#if EXTMEM_DRIVER_PSRAM == 1
/* Exported constants --------------------------------------------------------*/
/** @defgroup PSRAM_Exported_constants Exported constants
* @{
*/
/**
* @brief PSRAM driver maximum number of commands
*/
#define PSRAM_MAX_COMMAND 3u
/**
* @}
*/
/* Exported types ------------------------------------------------------------*/
/** @defgroup PSRAM_Exported_Types Exported Types
* @{
*/
/**
* @brief PSRAM driver object definition
*/
typedef struct
{
struct
{
SAL_XSPI_ObjectTypeDef SALObject; /*!< SAL XSPI object. */
} psram_private; /*!< Private data for the PSRAM driver object. */
struct
{
uint32_t MemorySize; /*!< Memory size (see @ref XSPI_MemorySize). */
uint32_t FreqMax; /*!< Maximum supported memory frequency. */
/* Configuration */
uint8_t NumberOfConfig; /*!< Number of configuration steps; each step performs a read and write operation. */
struct
{
uint8_t WriteMask; /*!< Mask for write operation. */
uint8_t WriteValue; /*!< Value to write. */
uint8_t REGAddress; /*!< Address of the register. */
} config[PSRAM_MAX_COMMAND];
/* Command REG */
uint8_t ReadREG;
uint8_t WriteREG;
uint8_t ReadREGSize;
uint8_t REG_DummyCycle;
/* Command Read and Write */
uint8_t Write_command;
uint8_t Write_DummyCycle;
uint8_t Read_command;
uint8_t WrapRead_command;
uint8_t Read_DummyCycle;
} psram_public; /*!< Public data for the PSRAM driver object. */
} EXTMEM_DRIVER_PSRAM_ObjectTypeDef;
/**
* @}
*/
/**
* @}
*/
#endif /* EXTMEM_DRIVER_PSRAM == 1 */
#ifdef __cplusplus
}
#endif
#endif /* __STM32_PSRAM_TYPE_H */