/* USER CODE BEGIN Header */ /** ****************************************************************************** * @file : main.c * @brief : Main program body ****************************************************************************** * @attention * * Copyright (c) 2023 STMicroelectronics. * All rights reserved. * * This software is licensed under terms that can be found in the LICENSE file * in the root directory of this software component. * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ /* USER CODE END Header */ /* Includes ------------------------------------------------------------------*/ #include "main.h" #include "extmem_manager.h" /* Private includes ----------------------------------------------------------*/ /* USER CODE BEGIN Includes */ /* USER CODE END Includes */ /* Private typedef -----------------------------------------------------------*/ /* USER CODE BEGIN PTD */ /* USER CODE END PTD */ /* Private define ------------------------------------------------------------*/ /* USER CODE BEGIN PD */ /* USER CODE END PD */ /* Private macro -------------------------------------------------------------*/ /* USER CODE BEGIN PM */ /* USER CODE END PM */ /* Private variables ---------------------------------------------------------*/ XSPI_HandleTypeDef hxspi1; XSPI_HandleTypeDef hxspi2; /* USER CODE BEGIN PV */ /* USER CODE END PV */ /* Private function prototypes -----------------------------------------------*/ void SystemClock_Config(void); static void MX_GPIO_Init(void); static void MX_HPDMA1_Init(void); static void MX_GPDMA1_Init(void); static void MX_XSPI1_Init(void); static void MX_XSPI2_Init(void); static void MX_FLASH_Init(void); static void MX_SBS_Init(void); /* USER CODE BEGIN PFP */ /* USER CODE END PFP */ /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ /* USER CODE END 0 */ /** * @brief The application entry point. * @retval int */ int main(void) { /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ /* Enable the CPU Cache */ /* Enable I-Cache---------------------------------------------------------*/ SCB_EnableICache(); /* Enable D-Cache---------------------------------------------------------*/ SCB_EnableDCache(); /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_HPDMA1_Init(); MX_GPDMA1_Init(); MX_XSPI1_Init(); MX_XSPI2_Init(); MX_FLASH_Init(); MX_SBS_Init(); MX_EXTMEM_MANAGER_Init(); /* USER CODE BEGIN 2 */ /* USER CODE END 2 */ /* Launch the application */ if (BOOT_OK != BOOT_Application()) { Error_Handler(); } /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1) { /* USER CODE END WHILE */ /* USER CODE BEGIN 3 */ } /* USER CODE END 3 */ } /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; /** Configure the main internal regulator output voltage */ if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE0) != HAL_OK) { Error_Handler(); } /** Configure LSE Drive Capability */ HAL_PWR_EnableBkUpAccess(); /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; RCC_OscInitStruct.PLL1.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL1.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL1.PLLM = 4; RCC_OscInitStruct.PLL1.PLLN = 200; RCC_OscInitStruct.PLL1.PLLP = 2; RCC_OscInitStruct.PLL1.PLLQ = 2; RCC_OscInitStruct.PLL1.PLLR = 2; RCC_OscInitStruct.PLL1.PLLS = 2; RCC_OscInitStruct.PLL1.PLLT = 2; RCC_OscInitStruct.PLL1.PLLFractional = 0; RCC_OscInitStruct.PLL2.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL2.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL2.PLLM = 5; RCC_OscInitStruct.PLL2.PLLN = 128; RCC_OscInitStruct.PLL2.PLLP = 25; RCC_OscInitStruct.PLL2.PLLQ = 10; RCC_OscInitStruct.PLL2.PLLR = 2; RCC_OscInitStruct.PLL2.PLLS = 8; RCC_OscInitStruct.PLL2.PLLT = 2; RCC_OscInitStruct.PLL2.PLLFractional = 0; RCC_OscInitStruct.PLL3.PLLState = RCC_PLL_ON; RCC_OscInitStruct.PLL3.PLLSource = RCC_PLLSOURCE_HSE; RCC_OscInitStruct.PLL3.PLLM = 2; RCC_OscInitStruct.PLL3.PLLN = 50; RCC_OscInitStruct.PLL3.PLLP = 2; RCC_OscInitStruct.PLL3.PLLQ = 2; RCC_OscInitStruct.PLL3.PLLR = 24; RCC_OscInitStruct.PLL3.PLLS = 2; RCC_OscInitStruct.PLL3.PLLT = 2; RCC_OscInitStruct.PLL3.PLLFractional = 0; if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { Error_Handler(); } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2 |RCC_CLOCKTYPE_PCLK4|RCC_CLOCKTYPE_PCLK5; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2; RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2; RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2; RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2; RCC_ClkInitStruct.APB5CLKDivider = RCC_APB5_DIV2; if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7) != HAL_OK) { Error_Handler(); } } /** * @brief FLASH Initialization Function * @param None * @retval None */ static void MX_FLASH_Init(void) { /* USER CODE BEGIN FLASH_Init 0 */ /* USER CODE END FLASH_Init 0 */ FLASH_OBProgramInitTypeDef pOBInit = {0}; /* USER CODE BEGIN FLASH_Init 1 */ /* USER CODE END FLASH_Init 1 */ HAL_FLASHEx_OBGetConfig(&pOBInit); if ((pOBInit.USERConfig1 & OB_IWDG_SW) != OB_IWDG_SW|| (pOBInit.USERConfig1 & OB_XSPI1_HSLV_ENABLE) != OB_XSPI1_HSLV_ENABLE|| (pOBInit.USERConfig1 & OB_XSPI2_HSLV_ENABLE) != OB_XSPI2_HSLV_ENABLE|| (pOBInit.USERConfig2 & OB_I2C_NI3C_I2C) != OB_I2C_NI3C_I2C) { if (HAL_FLASH_Unlock() != HAL_OK) { Error_Handler(); } if (HAL_FLASH_OB_Unlock() != HAL_OK) { Error_Handler(); } pOBInit.OptionType = OPTIONBYTE_USER; pOBInit.USERType = OB_USER_IWDG_SW|OB_USER_XSPI1_HSLV |OB_USER_XSPI2_HSLV|OB_USER_I2C_NI3C; pOBInit.USERConfig1 = OB_IWDG_SW|OB_XSPI1_HSLV_ENABLE |OB_XSPI2_HSLV_ENABLE; pOBInit.USERConfig2 = OB_I2C_NI3C_I2C; if (HAL_FLASHEx_OBProgram(&pOBInit) != HAL_OK) { Error_Handler(); } if (HAL_FLASH_OB_Lock() != HAL_OK) { Error_Handler(); } if (HAL_FLASH_Lock() != HAL_OK) { Error_Handler(); } } /* USER CODE BEGIN FLASH_Init 2 */ /* USER CODE END FLASH_Init 2 */ } /** * @brief GPDMA1 Initialization Function * @param None * @retval None */ static void MX_GPDMA1_Init(void) { /* USER CODE BEGIN GPDMA1_Init 0 */ /* USER CODE END GPDMA1_Init 0 */ /* Peripheral clock enable */ __HAL_RCC_GPDMA1_CLK_ENABLE(); /* USER CODE BEGIN GPDMA1_Init 1 */ /* USER CODE END GPDMA1_Init 1 */ /* USER CODE BEGIN GPDMA1_Init 2 */ /* USER CODE END GPDMA1_Init 2 */ } /** * @brief HPDMA1 Initialization Function * @param None * @retval None */ static void MX_HPDMA1_Init(void) { /* USER CODE BEGIN HPDMA1_Init 0 */ /* USER CODE END HPDMA1_Init 0 */ /* Peripheral clock enable */ __HAL_RCC_HPDMA1_CLK_ENABLE(); /* USER CODE BEGIN HPDMA1_Init 1 */ /* USER CODE END HPDMA1_Init 1 */ /* USER CODE BEGIN HPDMA1_Init 2 */ /* USER CODE END HPDMA1_Init 2 */ } /** * @brief SBS Initialization Function * @param None * @retval None */ static void MX_SBS_Init(void) { /* USER CODE BEGIN SBS_Init 0 */ /* USER CODE END SBS_Init 0 */ /* USER CODE BEGIN SBS_Init 1 */ /* USER CODE END SBS_Init 1 */ /* USER CODE BEGIN SBS_Init 2 */ /* USER CODE END SBS_Init 2 */ } /** * @brief XSPI1 Initialization Function * @param None * @retval None */ static void MX_XSPI1_Init(void) { /* USER CODE BEGIN XSPI1_Init 0 */ /* USER CODE END XSPI1_Init 0 */ XSPIM_CfgTypeDef sXspiManagerCfg = {0}; /* USER CODE BEGIN XSPI1_Init 1 */ /* USER CODE END XSPI1_Init 1 */ /* XSPI1 parameter configuration*/ hxspi1.Instance = XSPI1; hxspi1.Init.FifoThresholdByte = 2; hxspi1.Init.MemoryMode = HAL_XSPI_SINGLE_MEM; hxspi1.Init.MemoryType = HAL_XSPI_MEMTYPE_APMEM_16BITS; hxspi1.Init.MemorySize = HAL_XSPI_SIZE_256MB; hxspi1.Init.ChipSelectHighTimeCycle = 5; hxspi1.Init.FreeRunningClock = HAL_XSPI_FREERUNCLK_DISABLE; hxspi1.Init.ClockMode = HAL_XSPI_CLOCK_MODE_0; hxspi1.Init.WrapSize = HAL_XSPI_WRAP_32_BYTES; hxspi1.Init.ClockPrescaler = 0; hxspi1.Init.SampleShifting = HAL_XSPI_SAMPLE_SHIFT_NONE; hxspi1.Init.ChipSelectBoundary = HAL_XSPI_BONDARYOF_16KB; hxspi1.Init.MaxTran = 0; hxspi1.Init.Refresh = 400; hxspi1.Init.MemorySelect = HAL_XSPI_CSSEL_NCS1; if (HAL_XSPI_Init(&hxspi1) != HAL_OK) { Error_Handler(); } sXspiManagerCfg.nCSOverride = HAL_XSPI_CSSEL_OVR_NCS1; sXspiManagerCfg.IOPort = HAL_XSPIM_IOPORT_1; sXspiManagerCfg.Req2AckTime = 1; if (HAL_XSPIM_Config(&hxspi1, &sXspiManagerCfg, HAL_XSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) { Error_Handler(); } /* USER CODE BEGIN XSPI1_Init 2 */ /* USER CODE END XSPI1_Init 2 */ } /** * @brief XSPI2 Initialization Function * @param None * @retval None */ static void MX_XSPI2_Init(void) { /* USER CODE BEGIN XSPI2_Init 0 */ /* USER CODE END XSPI2_Init 0 */ XSPIM_CfgTypeDef sXspiManagerCfg = {0}; /* USER CODE BEGIN XSPI2_Init 1 */ /* USER CODE END XSPI2_Init 1 */ /* XSPI2 parameter configuration*/ hxspi2.Instance = XSPI2; hxspi2.Init.FifoThresholdByte = 4; hxspi2.Init.MemoryMode = HAL_XSPI_SINGLE_MEM; hxspi2.Init.MemoryType = HAL_XSPI_MEMTYPE_MACRONIX; hxspi2.Init.MemorySize = HAL_XSPI_SIZE_1GB; hxspi2.Init.ChipSelectHighTimeCycle = 2; hxspi2.Init.FreeRunningClock = HAL_XSPI_FREERUNCLK_DISABLE; hxspi2.Init.ClockMode = HAL_XSPI_CLOCK_MODE_0; hxspi2.Init.WrapSize = HAL_XSPI_WRAP_NOT_SUPPORTED; hxspi2.Init.ClockPrescaler = 0; hxspi2.Init.SampleShifting = HAL_XSPI_SAMPLE_SHIFT_NONE; hxspi2.Init.ChipSelectBoundary = HAL_XSPI_BONDARYOF_NONE; hxspi2.Init.MaxTran = 0; hxspi2.Init.Refresh = 0; hxspi2.Init.MemorySelect = HAL_XSPI_CSSEL_NCS1; if (HAL_XSPI_Init(&hxspi2) != HAL_OK) { Error_Handler(); } sXspiManagerCfg.nCSOverride = HAL_XSPI_CSSEL_OVR_NCS1; sXspiManagerCfg.IOPort = HAL_XSPIM_IOPORT_2; sXspiManagerCfg.Req2AckTime = 1; if (HAL_XSPIM_Config(&hxspi2, &sXspiManagerCfg, HAL_XSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) { Error_Handler(); } /* USER CODE BEGIN XSPI2_Init 2 */ /* USER CODE END XSPI2_Init 2 */ } /** * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { /* USER CODE BEGIN MX_GPIO_Init_1 */ /* USER CODE END MX_GPIO_Init_1 */ /* GPIO Ports Clock Enable */ __HAL_RCC_GPION_CLK_ENABLE(); __HAL_RCC_GPIOO_CLK_ENABLE(); __HAL_RCC_GPIOP_CLK_ENABLE(); /* USER CODE BEGIN MX_GPIO_Init_2 */ /* USER CODE END MX_GPIO_Init_2 */ } /* USER CODE BEGIN 4 */ /* USER CODE END 4 */ /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) { } /* USER CODE END Error_Handler_Debug */ } #ifdef USE_FULL_ASSERT /** * @brief Reports the name of the source file and the source line number * where the assert_param error has occurred. * @param file: pointer to the source file name * @param line: assert_param error line source number * @retval None */ void assert_failed(uint8_t *file, uint32_t line) { /* USER CODE BEGIN 6 */ /* User can add his own implementation to report the file name and line number, ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ /* USER CODE END 6 */ } #endif /* USE_FULL_ASSERT */