Files
CelloEffects/Drivers/STM32H7RSxx_HAL_Driver/Inc/stm32h7rsxx_ll_dlyb.h
T
thomasandClaude Sonnet 5.5 66bb319423 CubeMX: SPI4 + SDMMC1/FatFs + I2S6, audio BSP et debug VS Code (Linux)
Regeneration CubeMX (Appli) preparant le driver ST67W611M1 et la carte SD :
- SPI4 (PE12/13/14, CS PF8) + DMA GPDMA1 canaux 4/5, SPI_RDY (PD12/EXTI12),
  CHIP_EN (PD13) et BOOT (PD15) pour la X-NUCLEO-67W61M1 sur l'Arduino
- SDMMC1 + FatFs (appels d'init non generes dans main, IRQ SDMMC1 prio 14),
  PM14 en open-drain ; I2S6_CK sur PA5 pour liberer PC12 (SDMMC1_CK)
- HAL UART retire ; USE_BSP_COM_FEATURE=0
- Audio preserve : ADF 4/16/24, prio IRQ 2, DMA canal 0 en priorite haute,
  GPDMA1_Channel2_IRQHandler deplace dans audio_irq.c (hors fichiers generes),
  BSP_MX_I2S6_Init (renommage dans le BSP pour eviter le conflit avec CubeMX)
- Middlewares/ST/ST67W6X_Network_Driver, FatFs et sources HAL SPI/SD ajoutes
  (driver ST67 pas encore integre au build)

Build et debug sous Linux :
- gcc/toolchain-env.sh, gdbserver.sh, arm-gdb.sh : outils de STM32CubeIDE par
  glob ; flash.sh les retrouve ; ruby_compat.rb pour Ruby >= 3.2 (TouchGFX)
- makefile_appli : sources SD/SPI/FatFs/audio_irq ; chmod +x des .out TouchGFX
- Objets de build (*.o, *.d, *.su) retires de l'index (deja dans .gitignore)
- AGENTS.md : toolchain Linux, configs VS Code (cppdbg et ST stlinkgdbtarget),
  pieges de l'extension ST (.settings/ide.store.json, preRunCommands reset)

Verifie sur carte : audio OK, debug Appli/Boot OK.

Co-Authored-By: Claude Sonnet 5.5 <noreply@anthropic.com>
2026-10-23 22:49:06 +02:00

144 lines
3.2 KiB
C

/**
******************************************************************************
* @file stm32h7rsxx_ll_dlyb.h
* @author MCD Application Team
* @brief Header file of DelayBlock module.
******************************************************************************
* @attention
*
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32H7RSxx_LL_DLYB_H
#define STM32H7RSxx_LL_DLYB_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32h7rsxx_hal_def.h"
/** @addtogroup STM32H7RSxx_LL_Driver
* @{
*/
#if defined(HAL_SD_MODULE_ENABLED)
#if defined (DLYB_SDMMC1) || defined (DLYB_SDMMC2)
/* Exported types ------------------------------------------------------------*/
/** @defgroup DLYB_LL DLYB
* @{
*/
/**
* @brief DLYB Configuration Structure definition
*/
typedef struct
{
uint32_t Units; /*!< Specifies the Delay of a unit delay cell.
This parameter can be a value between 0 and DLYB_MAX_UNIT */
uint32_t PhaseSel; /*!< Specifies the Phase for the output clock.
This parameter can be a value between 0 and DLYB_MAX_SELECT */
} LL_DLYB_CfgTypeDef;
/* Exported constants --------------------------------------------------------*/
/** @defgroup DLYB_Exported_Constants DLYB Exported Constants
* @{
*/
#define DLYB_MAX_UNIT ((uint32_t)0x00000080U) /*!< Max UNIT value (128) */
#define DLYB_MAX_SELECT ((uint32_t)0x0000000CU) /*!< Max SELECT value (12) */
/**
* @}
*/
/** @defgroup DLYB_LL_Flags DLYB Flags
* @{
*/
#define DLYB_FLAG_LNGF DLYB_CFGR_LNGF
/**
* @}
*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup DLYB_LL_Exported_Functions DLYB Exported Functions
* @{
*/
/** @defgroup DLYB_LL_Configuration Configuration functions
* @{
*/
/**
* @brief DLYB Enable
* @param DLYBx DLYB Instance
* @retval None
*/
__STATIC_INLINE void LL_DLYB_Enable(DLYB_TypeDef *DLYBx)
{
SET_BIT(DLYBx->CR, DLYB_CR_DEN);
}
/** @brief Disable the DLYB.
* @param DLYBx DLYB Instance.
* @retval None
*/
__STATIC_INLINE void LL_DLYB_Disable(DLYB_TypeDef *DLYBx)
{
CLEAR_BIT(DLYBx->CR, DLYB_CR_DEN);
}
/**
* @}
*/
/** @defgroup DLYB_Control_Functions DLYB Control functions
* @{
*/
void LL_DLYB_SetDelay(DLYB_TypeDef *DLYBx, const LL_DLYB_CfgTypeDef *pdlyb_cfg);
void LL_DLYB_GetDelay(const DLYB_TypeDef *DLYBx, LL_DLYB_CfgTypeDef *pdlyb_cfg);
uint32_t LL_DLYB_GetClockPeriod(DLYB_TypeDef *DLYBx, LL_DLYB_CfgTypeDef *pdlyb_cfg);
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#endif /* DLYB_SDMMC1 || DLYB_SDMMC2 */
#endif /* HAL_SD_MODULE_ENABLED */
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* STM32H7RSxx_LL_DLYB_H */