Regeneration CubeMX (Appli) preparant le driver ST67W611M1 et la carte SD : - SPI4 (PE12/13/14, CS PF8) + DMA GPDMA1 canaux 4/5, SPI_RDY (PD12/EXTI12), CHIP_EN (PD13) et BOOT (PD15) pour la X-NUCLEO-67W61M1 sur l'Arduino - SDMMC1 + FatFs (appels d'init non generes dans main, IRQ SDMMC1 prio 14), PM14 en open-drain ; I2S6_CK sur PA5 pour liberer PC12 (SDMMC1_CK) - HAL UART retire ; USE_BSP_COM_FEATURE=0 - Audio preserve : ADF 4/16/24, prio IRQ 2, DMA canal 0 en priorite haute, GPDMA1_Channel2_IRQHandler deplace dans audio_irq.c (hors fichiers generes), BSP_MX_I2S6_Init (renommage dans le BSP pour eviter le conflit avec CubeMX) - Middlewares/ST/ST67W6X_Network_Driver, FatFs et sources HAL SPI/SD ajoutes (driver ST67 pas encore integre au build) Build et debug sous Linux : - gcc/toolchain-env.sh, gdbserver.sh, arm-gdb.sh : outils de STM32CubeIDE par glob ; flash.sh les retrouve ; ruby_compat.rb pour Ruby >= 3.2 (TouchGFX) - makefile_appli : sources SD/SPI/FatFs/audio_irq ; chmod +x des .out TouchGFX - Objets de build (*.o, *.d, *.su) retires de l'index (deja dans .gitignore) - AGENTS.md : toolchain Linux, configs VS Code (cppdbg et ST stlinkgdbtarget), pieges de l'extension ST (.settings/ide.store.json, preRunCommands reset) Verifie sur carte : audio OK, debug Appli/Boot OK. Co-Authored-By: Claude Sonnet 5.5 <noreply@anthropic.com>
144 lines
3.2 KiB
C
144 lines
3.2 KiB
C
/**
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******************************************************************************
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* @file stm32h7rsxx_ll_dlyb.h
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* @author MCD Application Team
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* @brief Header file of DelayBlock module.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2022 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef STM32H7RSxx_LL_DLYB_H
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#define STM32H7RSxx_LL_DLYB_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32h7rsxx_hal_def.h"
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/** @addtogroup STM32H7RSxx_LL_Driver
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* @{
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*/
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#if defined(HAL_SD_MODULE_ENABLED)
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#if defined (DLYB_SDMMC1) || defined (DLYB_SDMMC2)
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/* Exported types ------------------------------------------------------------*/
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/** @defgroup DLYB_LL DLYB
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* @{
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*/
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/**
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* @brief DLYB Configuration Structure definition
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*/
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typedef struct
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{
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uint32_t Units; /*!< Specifies the Delay of a unit delay cell.
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This parameter can be a value between 0 and DLYB_MAX_UNIT */
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uint32_t PhaseSel; /*!< Specifies the Phase for the output clock.
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This parameter can be a value between 0 and DLYB_MAX_SELECT */
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} LL_DLYB_CfgTypeDef;
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup DLYB_Exported_Constants DLYB Exported Constants
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* @{
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*/
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#define DLYB_MAX_UNIT ((uint32_t)0x00000080U) /*!< Max UNIT value (128) */
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#define DLYB_MAX_SELECT ((uint32_t)0x0000000CU) /*!< Max SELECT value (12) */
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/**
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* @}
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*/
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/** @defgroup DLYB_LL_Flags DLYB Flags
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* @{
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*/
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#define DLYB_FLAG_LNGF DLYB_CFGR_LNGF
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/**
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* @}
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*/
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/* Exported functions --------------------------------------------------------*/
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/** @defgroup DLYB_LL_Exported_Functions DLYB Exported Functions
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* @{
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*/
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/** @defgroup DLYB_LL_Configuration Configuration functions
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* @{
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*/
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/**
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* @brief DLYB Enable
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* @param DLYBx DLYB Instance
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* @retval None
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*/
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__STATIC_INLINE void LL_DLYB_Enable(DLYB_TypeDef *DLYBx)
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{
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SET_BIT(DLYBx->CR, DLYB_CR_DEN);
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}
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/** @brief Disable the DLYB.
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* @param DLYBx DLYB Instance.
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* @retval None
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*/
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__STATIC_INLINE void LL_DLYB_Disable(DLYB_TypeDef *DLYBx)
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{
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CLEAR_BIT(DLYBx->CR, DLYB_CR_DEN);
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}
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/**
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* @}
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*/
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/** @defgroup DLYB_Control_Functions DLYB Control functions
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* @{
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*/
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void LL_DLYB_SetDelay(DLYB_TypeDef *DLYBx, const LL_DLYB_CfgTypeDef *pdlyb_cfg);
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void LL_DLYB_GetDelay(const DLYB_TypeDef *DLYBx, LL_DLYB_CfgTypeDef *pdlyb_cfg);
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uint32_t LL_DLYB_GetClockPeriod(DLYB_TypeDef *DLYBx, LL_DLYB_CfgTypeDef *pdlyb_cfg);
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#endif /* DLYB_SDMMC1 || DLYB_SDMMC2 */
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#endif /* HAL_SD_MODULE_ENABLED */
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* STM32H7RSxx_LL_DLYB_H */
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